1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) Jonathan P Dawson 2013
5 from nmigen
import Module
, Signal
, Cat
6 from nmigen
.cli
import main
, verilog
8 from fpbase
import FPNumIn
, FPNumOut
, FPOp
, Overflow
, FPBase
, FPNumBase
11 class FPState(FPBase
):
12 def __init__(self
, state_from
):
13 self
.state_from
= state_from
15 def set_inputs(self
, inputs
):
17 for k
,v
in inputs
.items():
20 def set_outputs(self
, outputs
):
21 self
.outputs
= outputs
22 for k
,v
in outputs
.items():
26 class FPGetOpA(FPState
):
30 def __init__(self
, in_a
, width
):
31 FPState
.__init
__(self
, "get_a")
33 self
.a
= FPNumIn(in_a
, width
)
36 self
.get_op(m
, self
.in_a
, self
.a
, "get_b")
39 class FPGetOpB(FPState
):
44 self
.get_op(m
, self
.in_b
, self
.b
, "special_cases")
47 class FPAddSpecialCasesMod
:
48 """ special cases: NaNs, infs, zeros, denormalised
49 NOTE: some of these are unique to add. see "Special Operations"
50 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
53 def __init__(self
, width
):
54 self
.in_a
= FPNumBase(width
)
55 self
.in_b
= FPNumBase(width
)
56 self
.out_z
= FPNumOut(width
, False)
57 self
.out_do_z
= Signal(reset_less
=True)
59 def setup(self
, m
, in_a
, in_b
, out_z
, out_do_z
):
60 """ links module to inputs and outputs
62 m
.d
.comb
+= self
.in_a
.copy(in_a
)
63 m
.d
.comb
+= self
.in_b
.copy(in_b
)
64 m
.d
.comb
+= out_z
.v
.eq(self
.out_z
.v
)
65 m
.d
.comb
+= out_do_z
.eq(self
.out_do_z
)
67 def elaborate(self
, platform
):
70 m
.submodules
.sc_in_a
= self
.in_a
71 m
.submodules
.sc_in_b
= self
.in_b
72 m
.submodules
.sc_out_z
= self
.out_z
75 m
.d
.comb
+= s_nomatch
.eq(self
.in_a
.s
!= self
.in_b
.s
)
78 m
.d
.comb
+= m_match
.eq(self
.in_a
.m
== self
.in_b
.m
)
80 # if a is NaN or b is NaN return NaN
81 with m
.If(self
.in_a
.is_nan | self
.in_b
.is_nan
):
82 m
.d
.comb
+= self
.out_do_z
.eq(1)
83 m
.d
.comb
+= self
.out_z
.nan(1)
85 # XXX WEIRDNESS for FP16 non-canonical NaN handling
88 ## if a is zero and b is NaN return -b
89 #with m.If(a.is_zero & (a.s==0) & b.is_nan):
90 # m.d.comb += self.out_do_z.eq(1)
91 # m.d.comb += z.create(b.s, b.e, Cat(b.m[3:-2], ~b.m[0]))
93 ## if b is zero and a is NaN return -a
94 #with m.Elif(b.is_zero & (b.s==0) & a.is_nan):
95 # m.d.comb += self.out_do_z.eq(1)
96 # m.d.comb += z.create(a.s, a.e, Cat(a.m[3:-2], ~a.m[0]))
98 ## if a is -zero and b is NaN return -b
99 #with m.Elif(a.is_zero & (a.s==1) & b.is_nan):
100 # m.d.comb += self.out_do_z.eq(1)
101 # m.d.comb += z.create(a.s & b.s, b.e, Cat(b.m[3:-2], 1))
103 ## if b is -zero and a is NaN return -a
104 #with m.Elif(b.is_zero & (b.s==1) & a.is_nan):
105 # m.d.comb += self.out_do_z.eq(1)
106 # m.d.comb += z.create(a.s & b.s, a.e, Cat(a.m[3:-2], 1))
108 # if a is inf return inf (or NaN)
109 with m
.Elif(self
.in_a
.is_inf
):
110 m
.d
.comb
+= self
.out_do_z
.eq(1)
111 m
.d
.comb
+= self
.out_z
.inf(self
.in_a
.s
)
112 # if a is inf and signs don't match return NaN
113 with m
.If(self
.in_b
.exp_128
& s_nomatch
):
114 m
.d
.comb
+= self
.out_z
.nan(1)
116 # if b is inf return inf
117 with m
.Elif(self
.in_b
.is_inf
):
118 m
.d
.comb
+= self
.out_do_z
.eq(1)
119 m
.d
.comb
+= self
.out_z
.inf(self
.in_b
.s
)
121 # if a is zero and b zero return signed-a/b
122 with m
.Elif(self
.in_a
.is_zero
& self
.in_b
.is_zero
):
123 m
.d
.comb
+= self
.out_do_z
.eq(1)
124 m
.d
.comb
+= self
.out_z
.create(self
.in_a
.s
& self
.in_b
.s
,
128 # if a is zero return b
129 with m
.Elif(self
.in_a
.is_zero
):
130 m
.d
.comb
+= self
.out_do_z
.eq(1)
131 m
.d
.comb
+= self
.out_z
.create(self
.in_b
.s
, self
.in_b
.e
,
134 # if b is zero return a
135 with m
.Elif(self
.in_b
.is_zero
):
136 m
.d
.comb
+= self
.out_do_z
.eq(1)
137 m
.d
.comb
+= self
.out_z
.create(self
.in_a
.s
, self
.in_a
.e
,
140 # if a equal to -b return zero (+ve zero)
141 with m
.Elif(s_nomatch
& m_match
& (self
.in_a
.e
== self
.in_b
.e
)):
142 m
.d
.comb
+= self
.out_do_z
.eq(1)
143 m
.d
.comb
+= self
.out_z
.zero(0)
145 # Denormalised Number checks
147 m
.d
.comb
+= self
.out_do_z
.eq(0)
152 class FPAddSpecialCases(FPState
):
153 """ special cases: NaNs, infs, zeros, denormalised
154 NOTE: some of these are unique to add. see "Special Operations"
155 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
158 def __init__(self
, width
):
159 FPState
.__init
__(self
, "special_cases")
160 self
.mod
= FPAddSpecialCasesMod(width
)
161 self
.out_z
= FPNumOut(width
, False)
162 self
.out_do_z
= Signal(reset_less
=True)
165 with m
.If(self
.out_do_z
):
166 m
.d
.sync
+= self
.z
.v
.eq(self
.out_z
.v
) # only take the output
169 m
.next
= "denormalise"
172 class FPAddDeNorm(FPState
):
175 # Denormalised Number checks
177 self
.denormalise(m
, self
.a
)
178 self
.denormalise(m
, self
.b
)
181 class FPAddAlignMulti(FPState
):
184 # NOTE: this does *not* do single-cycle multi-shifting,
185 # it *STAYS* in the align state until exponents match
187 # exponent of a greater than b: shift b down
188 with m
.If(self
.a
.e
> self
.b
.e
):
189 m
.d
.sync
+= self
.b
.shift_down()
190 # exponent of b greater than a: shift a down
191 with m
.Elif(self
.a
.e
< self
.b
.e
):
192 m
.d
.sync
+= self
.a
.shift_down()
193 # exponents equal: move to next stage.
198 class FPAddAlignSingle(FPState
):
201 # This one however (single-cycle) will do the shift
204 # XXX TODO: the shifter used here is quite expensive
205 # having only one would be better
207 ediff
= Signal((len(self
.a
.e
), True), reset_less
=True)
208 ediffr
= Signal((len(self
.a
.e
), True), reset_less
=True)
209 m
.d
.comb
+= ediff
.eq(self
.a
.e
- self
.b
.e
)
210 m
.d
.comb
+= ediffr
.eq(self
.b
.e
- self
.a
.e
)
211 with m
.If(ediff
> 0):
212 m
.d
.sync
+= self
.b
.shift_down_multi(ediff
)
213 # exponent of b greater than a: shift a down
214 with m
.Elif(ediff
< 0):
215 m
.d
.sync
+= self
.a
.shift_down_multi(ediffr
)
220 class FPAddStage0(FPState
):
221 """ First stage of add. covers same-sign (add) and subtract
222 special-casing when mantissas are greater or equal, to
223 give greatest accuracy.
228 m
.d
.sync
+= self
.z
.e
.eq(self
.a
.e
)
229 # same-sign (both negative or both positive) add mantissas
230 with m
.If(self
.a
.s
== self
.b
.s
):
232 self
.tot
.eq(Cat(self
.a
.m
, 0) + Cat(self
.b
.m
, 0)),
233 self
.z
.s
.eq(self
.a
.s
)
235 # a mantissa greater than b, use a
236 with m
.Elif(self
.a
.m
>= self
.b
.m
):
238 self
.tot
.eq(Cat(self
.a
.m
, 0) - Cat(self
.b
.m
, 0)),
239 self
.z
.s
.eq(self
.a
.s
)
241 # b mantissa greater than a, use b
244 self
.tot
.eq(Cat(self
.b
.m
, 0) - Cat(self
.a
.m
, 0)),
245 self
.z
.s
.eq(self
.b
.s
)
249 class FPAddStage1(FPState
):
250 """ Second stage of add: preparation for normalisation.
251 detects when tot sum is too big (tot[27] is kinda a carry bit)
255 m
.next
= "normalise_1"
256 # tot[27] gets set when the sum overflows. shift result down
257 with m
.If(self
.tot
[-1]):
259 self
.z
.m
.eq(self
.tot
[4:]),
260 self
.of
.m0
.eq(self
.tot
[4]),
261 self
.of
.guard
.eq(self
.tot
[3]),
262 self
.of
.round_bit
.eq(self
.tot
[2]),
263 self
.of
.sticky
.eq(self
.tot
[1] | self
.tot
[0]),
264 self
.z
.e
.eq(self
.z
.e
+ 1)
269 self
.z
.m
.eq(self
.tot
[3:]),
270 self
.of
.m0
.eq(self
.tot
[3]),
271 self
.of
.guard
.eq(self
.tot
[2]),
272 self
.of
.round_bit
.eq(self
.tot
[1]),
273 self
.of
.sticky
.eq(self
.tot
[0])
277 class FPNorm1(FPState
):
280 self
.normalise_1(m
, self
.z
, self
.of
, "normalise_2")
283 class FPNorm2(FPState
):
286 self
.normalise_2(m
, self
.z
, self
.of
, "round")
291 def __init__(self
, width
):
292 self
.in_roundz
= Signal(reset_less
=True)
293 self
.in_z
= FPNumBase(width
, False)
294 self
.out_z
= FPNumBase(width
, False)
296 def setup(self
, m
, in_z
, out_z
, in_of
):
297 """ links module to inputs and outputs
299 m
.d
.comb
+= self
.in_z
.copy(in_z
)
300 m
.d
.comb
+= out_z
.copy(self
.out_z
)
301 m
.d
.comb
+= self
.in_roundz
.eq(in_of
.roundz
)
303 def elaborate(self
, platform
):
305 m
.d
.comb
+= self
.out_z
.copy(self
.in_z
)
306 with m
.If(self
.in_roundz
):
307 m
.d
.comb
+= self
.out_z
.m
.eq(self
.in_z
.m
+ 1) # mantissa rounds up
308 with m
.If(self
.in_z
.m
== self
.in_z
.m1s
): # all 1s
309 m
.d
.comb
+= self
.out_z
.e
.eq(self
.in_z
.e
+ 1) # exponent up
313 class FPRound(FPState
):
315 def __init__(self
, width
):
316 FPState
.__init
__(self
, "round")
317 self
.mod
= FPRoundMod(width
)
318 self
.out_z
= FPNumBase(width
)
321 m
.d
.sync
+= self
.z
.copy(self
.out_z
)
322 m
.next
= "corrections"
325 class FPCorrectionsMod
:
327 def __init__(self
, width
):
328 self
.in_z
= FPNumOut(width
, False)
329 self
.out_z
= FPNumOut(width
, False)
331 def setup(self
, m
, in_z
, out_z
):
332 """ links module to inputs and outputs
334 m
.d
.comb
+= self
.in_z
.copy(in_z
)
335 m
.d
.comb
+= out_z
.copy(self
.out_z
)
337 def elaborate(self
, platform
):
339 m
.submodules
.corr_in_z
= self
.in_z
340 m
.submodules
.corr_out_z
= self
.out_z
341 m
.d
.comb
+= self
.out_z
.copy(self
.in_z
)
342 with m
.If(self
.in_z
.is_denormalised
):
343 m
.d
.comb
+= self
.out_z
.e
.eq(self
.in_z
.N127
)
345 # with m.If(self.in_z.is_overflowed):
346 # m.d.comb += self.out_z.inf(self.in_z.s)
348 # m.d.comb += self.out_z.create(self.in_z.s, self.in_z.e, self.in_z.m)
352 class FPCorrections(FPState
):
354 def __init__(self
, width
):
355 FPState
.__init
__(self
, "corrections")
356 self
.mod
= FPCorrectionsMod(width
)
357 self
.out_z
= FPNumBase(width
)
360 m
.d
.sync
+= self
.z
.copy(self
.out_z
)
366 def __init__(self
, width
):
367 self
.in_z
= FPNumOut(width
, False)
368 self
.out_z
= FPNumOut(width
, False)
370 def setup(self
, m
, in_z
, out_z
):
371 """ links module to inputs and outputs
373 m
.d
.comb
+= self
.in_z
.copy(in_z
)
374 m
.d
.comb
+= out_z
.v
.eq(self
.out_z
.v
)
376 def elaborate(self
, platform
):
378 m
.submodules
.pack_in_z
= self
.in_z
379 with m
.If(self
.in_z
.is_overflowed
):
380 m
.d
.comb
+= self
.out_z
.inf(self
.in_z
.s
)
382 m
.d
.comb
+= self
.out_z
.create(self
.in_z
.s
, self
.in_z
.e
, self
.in_z
.m
)
386 class FPPack(FPState
):
388 def __init__(self
, width
):
389 FPState
.__init
__(self
, "pack")
390 self
.mod
= FPPackMod(width
)
391 self
.out_z
= FPNumOut(width
, False)
394 m
.d
.sync
+= self
.z
.v
.eq(self
.out_z
.v
)
398 class FPPutZ(FPState
):
401 self
.put_z(m
, self
.z
, self
.out_z
, "get_a")
406 def __init__(self
, width
, single_cycle
=False):
408 self
.single_cycle
= single_cycle
410 self
.in_a
= FPOp(width
)
411 self
.in_b
= FPOp(width
)
412 self
.out_z
= FPOp(width
)
416 def add_state(self
, state
):
417 self
.states
.append(state
)
420 def get_fragment(self
, platform
=None):
421 """ creates the HDL code-fragment for FPAdd
426 #a = FPNumIn(self.in_a, self.width)
427 b
= FPNumIn(self
.in_b
, self
.width
)
428 z
= FPNumOut(self
.width
, False)
430 m
.submodules
.fpnum_b
= b
431 m
.submodules
.fpnum_z
= z
434 tot
= Signal(w
, reset_less
=True) # sticky/round/guard, {mantissa} result, 1 overflow
437 m
.submodules
.overflow
= of
439 geta
= self
.add_state(FPGetOpA(self
.in_a
, self
.width
))
440 #geta.set_inputs({"in_a": self.in_a})
441 #geta.set_outputs({"a": a})
443 # XXX m.d.comb += a.v.eq(self.in_a.v) # links in_a to a
444 m
.submodules
.fpnum_a
= a
446 getb
= self
.add_state(FPGetOpB("get_b"))
447 getb
.set_inputs({"in_b": self
.in_b
})
448 getb
.set_outputs({"b": b
})
449 # XXX m.d.comb += b.v.eq(self.in_b.v) # links in_b to b
451 sc
= self
.add_state(FPAddSpecialCases(self
.width
))
452 sc
.set_inputs({"a": a
, "b": b
})
453 sc
.set_outputs({"z": z
})
454 sc
.mod
.setup(m
, a
, b
, sc
.out_z
, sc
.out_do_z
)
455 m
.submodules
.specialcases
= sc
.mod
457 dn
= self
.add_state(FPAddDeNorm("denormalise"))
458 dn
.set_inputs({"a": a
, "b": b
})
459 dn
.set_outputs({"a": a
, "b": b
}) # XXX outputs same as inputs
461 if self
.single_cycle
:
462 alm
= self
.add_state(FPAddAlignSingle("align"))
464 alm
= self
.add_state(FPAddAlignMulti("align"))
465 alm
.set_inputs({"a": a
, "b": b
})
466 alm
.set_outputs({"a": a
, "b": b
}) # XXX outputs same as inputs
468 add0
= self
.add_state(FPAddStage0("add_0"))
469 add0
.set_inputs({"a": a
, "b": b
})
470 add0
.set_outputs({"z": z
, "tot": tot
})
472 add1
= self
.add_state(FPAddStage1("add_1"))
473 add1
.set_inputs({"tot": tot
, "z": z
}) # Z input passes through
474 add1
.set_outputs({"z": z
, "of": of
}) # XXX Z as output
476 n1
= self
.add_state(FPNorm1("normalise_1"))
477 n1
.set_inputs({"z": z
, "of": of
}) # XXX Z as output
478 n1
.set_outputs({"z": z
}) # XXX Z as output
480 n2
= self
.add_state(FPNorm2("normalise_2"))
481 n2
.set_inputs({"z": z
, "of": of
}) # XXX Z as output
482 n2
.set_outputs({"z": z
}) # XXX Z as output
484 rn
= self
.add_state(FPRound(self
.width
))
485 rn
.set_inputs({"z": z
, "of": of
}) # XXX Z as output
486 rn
.set_outputs({"z": z
}) # XXX Z as output
487 rn
.mod
.setup(m
, z
, rn
.out_z
, of
)
488 m
.submodules
.roundz
= rn
.mod
490 cor
= self
.add_state(FPCorrections(self
.width
))
491 cor
.set_inputs({"z": z
}) # XXX Z as output
492 cor
.set_outputs({"z": z
}) # XXX Z as output
493 cor
.mod
.setup(m
, z
, cor
.out_z
)
494 m
.submodules
.corrections
= cor
.mod
496 pa
= self
.add_state(FPPack(self
.width
))
497 pa
.set_inputs({"z": z
}) # XXX Z as output
498 pa
.set_outputs({"z": z
}) # XXX Z as output
499 pa
.mod
.setup(m
, z
, pa
.out_z
)
500 m
.submodules
.pack
= pa
.mod
502 pz
= self
.add_state(FPPutZ("put_z"))
503 pz
.set_inputs({"z": z
})
504 pz
.set_outputs({"out_z": self
.out_z
})
508 for state
in self
.states
:
509 with m
.State(state
.state_from
):
515 if __name__
== "__main__":
516 alu
= FPADD(width
=32)
517 main(alu
, ports
=alu
.in_a
.ports() + alu
.in_b
.ports() + alu
.out_z
.ports())
520 # works... but don't use, just do "python fname.py convert -t v"
521 #print (verilog.convert(alu, ports=[
522 # ports=alu.in_a.ports() + \
523 # alu.in_b.ports() + \