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ac/llvm: fix amdgcn.rcp for v2f16
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_1f_param_scalar(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0)
223 {
224 if (LLVMGetTypeKind(result_type) != LLVMVectorTypeKind)
225 return emit_intrin_1f_param(ctx, intrin, result_type, src0);
226
227 LLVMTypeRef elem_type = LLVMGetElementType(result_type);
228 LLVMValueRef ret = LLVMGetUndef(result_type);
229
230 /* Scalarize the intrinsic, because vectors are not supported. */
231 for (unsigned i = 0; i < LLVMGetVectorSize(result_type); i++) {
232 char name[64], type[64];
233 LLVMValueRef params[] = {
234 ac_to_float(ctx, ac_llvm_extract_elem(ctx, src0, i)),
235 };
236
237 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
238 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
239 assert(length < sizeof(name));
240 ret = LLVMBuildInsertElement(ctx->builder, ret,
241 ac_build_intrinsic(ctx, name, elem_type, params,
242 1, AC_FUNC_ATTR_READNONE),
243 LLVMConstInt(ctx->i32, i, 0), "");
244 }
245 return ret;
246 }
247
248 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
249 const char *intrin,
250 LLVMTypeRef result_type,
251 LLVMValueRef src0, LLVMValueRef src1)
252 {
253 char name[64], type[64];
254 LLVMValueRef params[] = {
255 ac_to_float(ctx, src0),
256 ac_to_float(ctx, src1),
257 };
258
259 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
260 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
261 assert(length < sizeof(name));
262 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
263 }
264
265 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMTypeRef result_type,
268 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
269 {
270 char name[64], type[64];
271 LLVMValueRef params[] = {
272 ac_to_float(ctx, src0),
273 ac_to_float(ctx, src1),
274 ac_to_float(ctx, src2),
275 };
276
277 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
278 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
279 assert(length < sizeof(name));
280 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
281 }
282
283 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
284 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
285 {
286 LLVMTypeRef src1_type = LLVMTypeOf(src1);
287 LLVMTypeRef src2_type = LLVMTypeOf(src2);
288
289 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
290
291 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
292 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
293 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
294 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
295 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
296 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
297 }
298
299 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
300 ctx->i32_0, "");
301 return LLVMBuildSelect(ctx->builder, v,
302 ac_to_integer_or_pointer(ctx, src1),
303 ac_to_integer_or_pointer(ctx, src2), "");
304 }
305
306 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
307 LLVMValueRef src0)
308 {
309 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
310 }
311
312 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
313 const char *intrin,
314 LLVMValueRef src0, LLVMValueRef src1)
315 {
316 LLVMTypeRef ret_type;
317 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
318 LLVMValueRef res;
319 LLVMValueRef params[] = { src0, src1 };
320 ret_type = LLVMStructTypeInContext(ctx->context, types,
321 2, true);
322
323 res = ac_build_intrinsic(ctx, intrin, ret_type,
324 params, 2, AC_FUNC_ATTR_READNONE);
325
326 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
327 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
328 return res;
329 }
330
331 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
332 LLVMValueRef src0,
333 unsigned bitsize)
334 {
335 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
336 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
337 "");
338 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
339
340 switch (bitsize) {
341 case 16:
342 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
343 case 32:
344 return result;
345 case 64:
346 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
347 default:
348 unreachable("Unsupported bit size.");
349 }
350 }
351
352 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
353 LLVMValueRef src0)
354 {
355 src0 = ac_to_float(ctx, src0);
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
363 LLVMValueRef src0,
364 unsigned bitsize)
365 {
366 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
367
368 switch (bitsize) {
369 case 8:
370 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
371 case 16:
372 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
373 case 32:
374 return result;
375 case 64:
376 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
377 default:
378 unreachable("Unsupported bit size.");
379 }
380 }
381
382 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
383 LLVMValueRef src0)
384 {
385 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
386 return LLVMBuildSExt(ctx->builder,
387 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
388 ctx->i32, "");
389 }
390
391 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
392 LLVMValueRef src0)
393 {
394 LLVMValueRef result;
395 LLVMValueRef cond = NULL;
396
397 src0 = ac_to_float(ctx, src0);
398 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
399
400 if (ctx->chip_class >= GFX8) {
401 LLVMValueRef args[2];
402 /* Check if the result is a denormal - and flush to 0 if so. */
403 args[0] = result;
404 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
405 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
406 }
407
408 /* need to convert back up to f32 */
409 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
410
411 if (ctx->chip_class >= GFX8)
412 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
413 else {
414 /* for GFX6-GFX7 */
415 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
416 * so compare the result and flush to 0 if it's smaller.
417 */
418 LLVMValueRef temp, cond2;
419 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
420 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
421 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
422 temp, "");
423 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
424 temp, ctx->f32_0, "");
425 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
426 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
427 }
428 return result;
429 }
430
431 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
432 LLVMValueRef src0, LLVMValueRef src1)
433 {
434 LLVMValueRef dst64, result;
435 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
436 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
437
438 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
439 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
440 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
441 return result;
442 }
443
444 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
445 LLVMValueRef src0, LLVMValueRef src1)
446 {
447 LLVMValueRef dst64, result;
448 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
449 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
450
451 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
452 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
453 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
454 return result;
455 }
456
457 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
458 LLVMValueRef bits, LLVMValueRef offset)
459 {
460 /* mask = ((1 << bits) - 1) << offset */
461 return LLVMBuildShl(ctx->builder,
462 LLVMBuildSub(ctx->builder,
463 LLVMBuildShl(ctx->builder,
464 ctx->i32_1,
465 bits, ""),
466 ctx->i32_1, ""),
467 offset, "");
468 }
469
470 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
471 LLVMValueRef mask, LLVMValueRef insert,
472 LLVMValueRef base)
473 {
474 /* Calculate:
475 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
476 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
477 */
478 return LLVMBuildXor(ctx->builder, base,
479 LLVMBuildAnd(ctx->builder, mask,
480 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
481 }
482
483 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
484 LLVMValueRef src0,
485 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
486 LLVMValueRef args[2]))
487 {
488 LLVMValueRef comp[2];
489
490 src0 = ac_to_float(ctx, src0);
491 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
492 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
493
494 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
495 }
496
497 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
498 LLVMValueRef src0)
499 {
500 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
501 LLVMValueRef temps[2], val;
502 int i;
503
504 for (i = 0; i < 2; i++) {
505 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
506 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
507 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
508 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
509 }
510 return ac_build_gather_values(ctx, temps, 2);
511 }
512
513 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
514 nir_op op,
515 LLVMValueRef src0)
516 {
517 unsigned mask;
518 int idx;
519 LLVMValueRef result;
520
521 if (op == nir_op_fddx_fine)
522 mask = AC_TID_MASK_LEFT;
523 else if (op == nir_op_fddy_fine)
524 mask = AC_TID_MASK_TOP;
525 else
526 mask = AC_TID_MASK_TOP_LEFT;
527
528 /* for DDX we want to next X pixel, DDY next Y pixel. */
529 if (op == nir_op_fddx_fine ||
530 op == nir_op_fddx_coarse ||
531 op == nir_op_fddx)
532 idx = 1;
533 else
534 idx = 2;
535
536 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
537 return result;
538 }
539
540 struct waterfall_context {
541 LLVMBasicBlockRef phi_bb[2];
542 bool use_waterfall;
543 };
544
545 /* To deal with divergent descriptors we can create a loop that handles all
546 * lanes with the same descriptor on a given iteration (henceforth a
547 * waterfall loop).
548 *
549 * These helper create the begin and end of the loop leaving the caller
550 * to implement the body.
551 *
552 * params:
553 * - ctx is the usal nir context
554 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
555 * - value is the possibly divergent value for which we built the loop
556 * - divergent is whether value is actually divergent. If false we just pass
557 * things through.
558 */
559 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
560 struct waterfall_context *wctx,
561 LLVMValueRef value, bool divergent)
562 {
563 /* If the app claims the value is divergent but it is constant we can
564 * end up with a dynamic index of NULL. */
565 if (!value)
566 divergent = false;
567
568 wctx->use_waterfall = divergent;
569 if (!divergent)
570 return value;
571
572 ac_build_bgnloop(&ctx->ac, 6000);
573
574 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
575
576 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
577 scalar_value, "uniform_active");
578
579 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
580 ac_build_ifcc(&ctx->ac, active, 6001);
581
582 return scalar_value;
583 }
584
585 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
586 struct waterfall_context *wctx,
587 LLVMValueRef value)
588 {
589 LLVMValueRef ret = NULL;
590 LLVMValueRef phi_src[2];
591 LLVMValueRef cc_phi_src[2] = {
592 LLVMConstInt(ctx->ac.i32, 0, false),
593 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
594 };
595
596 if (!wctx->use_waterfall)
597 return value;
598
599 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
600
601 ac_build_endif(&ctx->ac, 6001);
602
603 if (value) {
604 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
605 phi_src[1] = value;
606
607 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
608 }
609
610 /*
611 * By using the optimization barrier on the exit decision, we decouple
612 * the operations from the break, and hence avoid LLVM hoisting the
613 * opteration into the break block.
614 */
615 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
616 ac_build_optimization_barrier(&ctx->ac, &cc);
617
618 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
619 ac_build_ifcc(&ctx->ac, active, 6002);
620 ac_build_break(&ctx->ac);
621 ac_build_endif(&ctx->ac, 6002);
622
623 ac_build_endloop(&ctx->ac, 6000);
624 return ret;
625 }
626
627 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
628 {
629 LLVMValueRef src[4], result = NULL;
630 unsigned num_components = instr->dest.dest.ssa.num_components;
631 unsigned src_components;
632 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
633
634 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
635 switch (instr->op) {
636 case nir_op_vec2:
637 case nir_op_vec3:
638 case nir_op_vec4:
639 src_components = 1;
640 break;
641 case nir_op_pack_half_2x16:
642 case nir_op_pack_snorm_2x16:
643 case nir_op_pack_unorm_2x16:
644 src_components = 2;
645 break;
646 case nir_op_unpack_half_2x16:
647 src_components = 1;
648 break;
649 case nir_op_cube_face_coord:
650 case nir_op_cube_face_index:
651 src_components = 3;
652 break;
653 default:
654 src_components = num_components;
655 break;
656 }
657 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
658 src[i] = get_alu_src(ctx, instr->src[i], src_components);
659
660 switch (instr->op) {
661 case nir_op_mov:
662 result = src[0];
663 break;
664 case nir_op_fneg:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
667 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
668 /* fneg will be optimized by backend compiler with sign
669 * bit removed via XOR. This is probably a LLVM bug.
670 */
671 result = ac_build_canonicalize(&ctx->ac, result,
672 instr->dest.dest.ssa.bit_size);
673 }
674 break;
675 case nir_op_ineg:
676 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
677 break;
678 case nir_op_inot:
679 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
680 break;
681 case nir_op_iadd:
682 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
683 break;
684 case nir_op_fadd:
685 src[0] = ac_to_float(&ctx->ac, src[0]);
686 src[1] = ac_to_float(&ctx->ac, src[1]);
687 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
688 break;
689 case nir_op_fsub:
690 src[0] = ac_to_float(&ctx->ac, src[0]);
691 src[1] = ac_to_float(&ctx->ac, src[1]);
692 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
693 break;
694 case nir_op_isub:
695 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
696 break;
697 case nir_op_imul:
698 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
699 break;
700 case nir_op_imod:
701 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
702 break;
703 case nir_op_umod:
704 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_fmod:
707 /* lower_fmod only lower 16-bit and 32-bit fmod */
708 assert(instr->dest.dest.ssa.bit_size == 64);
709 src[0] = ac_to_float(&ctx->ac, src[0]);
710 src[1] = ac_to_float(&ctx->ac, src[1]);
711 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
712 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
713 ac_to_float_type(&ctx->ac, def_type), result);
714 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
715 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
716 break;
717 case nir_op_irem:
718 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
719 break;
720 case nir_op_idiv:
721 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
722 break;
723 case nir_op_udiv:
724 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_fmul:
727 src[0] = ac_to_float(&ctx->ac, src[0]);
728 src[1] = ac_to_float(&ctx->ac, src[1]);
729 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
730 break;
731 case nir_op_frcp:
732 /* For doubles, we need precise division to pass GLCTS. */
733 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
734 ac_get_type_size(def_type) == 8) {
735 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
736 ac_to_float(&ctx->ac, src[0]), "");
737 } else {
738 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rcp",
739 ac_to_float_type(&ctx->ac, def_type), src[0]);
740 }
741 if (ctx->abi->clamp_div_by_zero)
742 result = ac_build_fmin(&ctx->ac, result,
743 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
744 break;
745 case nir_op_iand:
746 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
747 break;
748 case nir_op_ior:
749 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
750 break;
751 case nir_op_ixor:
752 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
753 break;
754 case nir_op_ishl:
755 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
756 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
757 LLVMTypeOf(src[0]), "");
758 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
759 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
760 LLVMTypeOf(src[0]), "");
761 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
762 break;
763 case nir_op_ishr:
764 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
765 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
766 LLVMTypeOf(src[0]), "");
767 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
768 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
769 LLVMTypeOf(src[0]), "");
770 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
771 break;
772 case nir_op_ushr:
773 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
774 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
775 LLVMTypeOf(src[0]), "");
776 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
777 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
778 LLVMTypeOf(src[0]), "");
779 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
780 break;
781 case nir_op_ilt32:
782 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
783 break;
784 case nir_op_ine32:
785 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
786 break;
787 case nir_op_ieq32:
788 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
789 break;
790 case nir_op_ige32:
791 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
792 break;
793 case nir_op_ult32:
794 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
795 break;
796 case nir_op_uge32:
797 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
798 break;
799 case nir_op_feq32:
800 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
801 break;
802 case nir_op_fneu32:
803 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
804 break;
805 case nir_op_flt32:
806 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
807 break;
808 case nir_op_fge32:
809 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
810 break;
811 case nir_op_fabs:
812 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
813 ac_to_float_type(&ctx->ac, def_type), src[0]);
814 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
815 /* fabs will be optimized by backend compiler with sign
816 * bit removed via AND.
817 */
818 result = ac_build_canonicalize(&ctx->ac, result,
819 instr->dest.dest.ssa.bit_size);
820 }
821 break;
822 case nir_op_iabs:
823 result = emit_iabs(&ctx->ac, src[0]);
824 break;
825 case nir_op_imax:
826 result = ac_build_imax(&ctx->ac, src[0], src[1]);
827 break;
828 case nir_op_imin:
829 result = ac_build_imin(&ctx->ac, src[0], src[1]);
830 break;
831 case nir_op_umax:
832 result = ac_build_umax(&ctx->ac, src[0], src[1]);
833 break;
834 case nir_op_umin:
835 result = ac_build_umin(&ctx->ac, src[0], src[1]);
836 break;
837 case nir_op_isign:
838 result = ac_build_isign(&ctx->ac, src[0],
839 instr->dest.dest.ssa.bit_size);
840 break;
841 case nir_op_fsign:
842 src[0] = ac_to_float(&ctx->ac, src[0]);
843 result = ac_build_fsign(&ctx->ac, src[0],
844 instr->dest.dest.ssa.bit_size);
845 break;
846 case nir_op_ffloor:
847 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
848 ac_to_float_type(&ctx->ac, def_type), src[0]);
849 break;
850 case nir_op_ftrunc:
851 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
852 ac_to_float_type(&ctx->ac, def_type), src[0]);
853 break;
854 case nir_op_fceil:
855 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
856 ac_to_float_type(&ctx->ac, def_type), src[0]);
857 break;
858 case nir_op_fround_even:
859 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
860 ac_to_float_type(&ctx->ac, def_type),src[0]);
861 break;
862 case nir_op_ffract:
863 src[0] = ac_to_float(&ctx->ac, src[0]);
864 result = ac_build_fract(&ctx->ac, src[0],
865 instr->dest.dest.ssa.bit_size);
866 break;
867 case nir_op_fsin:
868 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
869 ac_to_float_type(&ctx->ac, def_type), src[0]);
870 break;
871 case nir_op_fcos:
872 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
873 ac_to_float_type(&ctx->ac, def_type), src[0]);
874 break;
875 case nir_op_fsqrt:
876 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
877 ac_to_float_type(&ctx->ac, def_type), src[0]);
878 break;
879 case nir_op_fexp2:
880 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
881 ac_to_float_type(&ctx->ac, def_type), src[0]);
882 break;
883 case nir_op_flog2:
884 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
885 ac_to_float_type(&ctx->ac, def_type), src[0]);
886 break;
887 case nir_op_frsq:
888 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
889 ac_to_float_type(&ctx->ac, def_type), src[0]);
890 if (ctx->abi->clamp_div_by_zero)
891 result = ac_build_fmin(&ctx->ac, result,
892 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
893 break;
894 case nir_op_frexp_exp:
895 src[0] = ac_to_float(&ctx->ac, src[0]);
896 result = ac_build_frexp_exp(&ctx->ac, src[0],
897 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
898 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
899 result = LLVMBuildSExt(ctx->ac.builder, result,
900 ctx->ac.i32, "");
901 break;
902 case nir_op_frexp_sig:
903 src[0] = ac_to_float(&ctx->ac, src[0]);
904 result = ac_build_frexp_mant(&ctx->ac, src[0],
905 instr->dest.dest.ssa.bit_size);
906 break;
907 case nir_op_fpow:
908 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
909 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
910 break;
911 case nir_op_fmax:
912 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
913 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
914 if (ctx->ac.chip_class < GFX9 &&
915 instr->dest.dest.ssa.bit_size == 32) {
916 /* Only pre-GFX9 chips do not flush denorms. */
917 result = ac_build_canonicalize(&ctx->ac, result,
918 instr->dest.dest.ssa.bit_size);
919 }
920 break;
921 case nir_op_fmin:
922 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
923 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
924 if (ctx->ac.chip_class < GFX9 &&
925 instr->dest.dest.ssa.bit_size == 32) {
926 /* Only pre-GFX9 chips do not flush denorms. */
927 result = ac_build_canonicalize(&ctx->ac, result,
928 instr->dest.dest.ssa.bit_size);
929 }
930 break;
931 case nir_op_ffma:
932 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
933 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
934 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
935 break;
936 case nir_op_ldexp:
937 src[0] = ac_to_float(&ctx->ac, src[0]);
938 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
939 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
940 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
941 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
942 else
943 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
944 break;
945 case nir_op_bfm:
946 result = emit_bfm(&ctx->ac, src[0], src[1]);
947 break;
948 case nir_op_bitfield_select:
949 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
950 break;
951 case nir_op_ubfe:
952 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
953 break;
954 case nir_op_ibfe:
955 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
956 break;
957 case nir_op_bitfield_reverse:
958 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
959 break;
960 case nir_op_bit_count:
961 result = ac_build_bit_count(&ctx->ac, src[0]);
962 break;
963 case nir_op_vec2:
964 case nir_op_vec3:
965 case nir_op_vec4:
966 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
967 src[i] = ac_to_integer(&ctx->ac, src[i]);
968 result = ac_build_gather_values(&ctx->ac, src, num_components);
969 break;
970 case nir_op_f2i8:
971 case nir_op_f2i16:
972 case nir_op_f2i32:
973 case nir_op_f2i64:
974 src[0] = ac_to_float(&ctx->ac, src[0]);
975 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
976 break;
977 case nir_op_f2u8:
978 case nir_op_f2u16:
979 case nir_op_f2u32:
980 case nir_op_f2u64:
981 src[0] = ac_to_float(&ctx->ac, src[0]);
982 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
983 break;
984 case nir_op_i2f16:
985 case nir_op_i2f32:
986 case nir_op_i2f64:
987 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
988 break;
989 case nir_op_u2f16:
990 case nir_op_u2f32:
991 case nir_op_u2f64:
992 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
993 break;
994 case nir_op_f2f16_rtz:
995 case nir_op_f2f16:
996 case nir_op_f2fmp:
997 src[0] = ac_to_float(&ctx->ac, src[0]);
998
999 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
1000 * all f32->f16 conversions have to round towards zero, because both scalar
1001 * and vec2 down-conversions have to round equally.
1002 */
1003 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
1004 instr->op == nir_op_f2f16_rtz) {
1005 src[0] = ac_to_float(&ctx->ac, src[0]);
1006
1007 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
1008 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
1009
1010 /* Fast path conversion. This only works if NIR is vectorized
1011 * to vec2 16.
1012 */
1013 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
1014 LLVMValueRef args[] = {
1015 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
1016 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
1017 };
1018 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
1019 break;
1020 }
1021
1022 assert(ac_get_llvm_num_components(src[0]) == 1);
1023 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
1024 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
1025 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
1026 } else {
1027 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1028 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1029 else
1030 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1031 }
1032 break;
1033 case nir_op_f2f16_rtne:
1034 case nir_op_f2f32:
1035 case nir_op_f2f64:
1036 src[0] = ac_to_float(&ctx->ac, src[0]);
1037 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1038 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1039 else
1040 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1041 break;
1042 case nir_op_u2u8:
1043 case nir_op_u2u16:
1044 case nir_op_u2ump:
1045 case nir_op_u2u32:
1046 case nir_op_u2u64:
1047 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1048 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1049 else
1050 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1051 break;
1052 case nir_op_i2i8:
1053 case nir_op_i2i16:
1054 case nir_op_i2imp:
1055 case nir_op_i2i32:
1056 case nir_op_i2i64:
1057 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1058 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1059 else
1060 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1061 break;
1062 case nir_op_b32csel:
1063 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1064 break;
1065 case nir_op_find_lsb:
1066 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1067 break;
1068 case nir_op_ufind_msb:
1069 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1070 break;
1071 case nir_op_ifind_msb:
1072 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1073 break;
1074 case nir_op_uadd_carry:
1075 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1076 break;
1077 case nir_op_usub_borrow:
1078 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1079 break;
1080 case nir_op_b2f16:
1081 case nir_op_b2f32:
1082 case nir_op_b2f64:
1083 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1084 break;
1085 case nir_op_f2b32:
1086 result = emit_f2b(&ctx->ac, src[0]);
1087 break;
1088 case nir_op_b2i8:
1089 case nir_op_b2i16:
1090 case nir_op_b2i32:
1091 case nir_op_b2i64:
1092 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1093 break;
1094 case nir_op_i2b32:
1095 result = emit_i2b(&ctx->ac, src[0]);
1096 break;
1097 case nir_op_fquantize2f16:
1098 result = emit_f2f16(&ctx->ac, src[0]);
1099 break;
1100 case nir_op_umul_high:
1101 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1102 break;
1103 case nir_op_imul_high:
1104 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1105 break;
1106 case nir_op_pack_half_2x16:
1107 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1108 break;
1109 case nir_op_pack_snorm_2x16:
1110 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1111 break;
1112 case nir_op_pack_unorm_2x16:
1113 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1114 break;
1115 case nir_op_unpack_half_2x16:
1116 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1117 break;
1118 case nir_op_fddx:
1119 case nir_op_fddy:
1120 case nir_op_fddx_fine:
1121 case nir_op_fddy_fine:
1122 case nir_op_fddx_coarse:
1123 case nir_op_fddy_coarse:
1124 result = emit_ddxy(ctx, instr->op, src[0]);
1125 break;
1126
1127 case nir_op_unpack_64_2x32_split_x: {
1128 assert(ac_get_llvm_num_components(src[0]) == 1);
1129 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1130 ctx->ac.v2i32,
1131 "");
1132 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1133 ctx->ac.i32_0, "");
1134 break;
1135 }
1136
1137 case nir_op_unpack_64_2x32_split_y: {
1138 assert(ac_get_llvm_num_components(src[0]) == 1);
1139 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1140 ctx->ac.v2i32,
1141 "");
1142 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1143 ctx->ac.i32_1, "");
1144 break;
1145 }
1146
1147 case nir_op_pack_64_2x32_split: {
1148 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1149 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1150 break;
1151 }
1152
1153 case nir_op_pack_32_2x16_split: {
1154 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1155 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1156 break;
1157 }
1158
1159 case nir_op_unpack_32_2x16_split_x: {
1160 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1161 ctx->ac.v2i16,
1162 "");
1163 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1164 ctx->ac.i32_0, "");
1165 break;
1166 }
1167
1168 case nir_op_unpack_32_2x16_split_y: {
1169 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1170 ctx->ac.v2i16,
1171 "");
1172 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1173 ctx->ac.i32_1, "");
1174 break;
1175 }
1176
1177 case nir_op_cube_face_coord: {
1178 src[0] = ac_to_float(&ctx->ac, src[0]);
1179 LLVMValueRef results[2];
1180 LLVMValueRef in[3];
1181 for (unsigned chan = 0; chan < 3; chan++)
1182 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1183 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1184 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1185 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1186 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1187 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1188 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1189 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1190 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1191 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1192 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1193 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1194 result = ac_build_gather_values(&ctx->ac, results, 2);
1195 break;
1196 }
1197
1198 case nir_op_cube_face_index: {
1199 src[0] = ac_to_float(&ctx->ac, src[0]);
1200 LLVMValueRef in[3];
1201 for (unsigned chan = 0; chan < 3; chan++)
1202 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1203 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1204 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1205 break;
1206 }
1207
1208 default:
1209 fprintf(stderr, "Unknown NIR alu instr: ");
1210 nir_print_instr(&instr->instr, stderr);
1211 fprintf(stderr, "\n");
1212 abort();
1213 }
1214
1215 if (result) {
1216 assert(instr->dest.dest.is_ssa);
1217 result = ac_to_integer_or_pointer(&ctx->ac, result);
1218 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1219 }
1220 }
1221
1222 static void visit_load_const(struct ac_nir_context *ctx,
1223 const nir_load_const_instr *instr)
1224 {
1225 LLVMValueRef values[4], value = NULL;
1226 LLVMTypeRef element_type =
1227 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1228
1229 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1230 switch (instr->def.bit_size) {
1231 case 8:
1232 values[i] = LLVMConstInt(element_type,
1233 instr->value[i].u8, false);
1234 break;
1235 case 16:
1236 values[i] = LLVMConstInt(element_type,
1237 instr->value[i].u16, false);
1238 break;
1239 case 32:
1240 values[i] = LLVMConstInt(element_type,
1241 instr->value[i].u32, false);
1242 break;
1243 case 64:
1244 values[i] = LLVMConstInt(element_type,
1245 instr->value[i].u64, false);
1246 break;
1247 default:
1248 fprintf(stderr,
1249 "unsupported nir load_const bit_size: %d\n",
1250 instr->def.bit_size);
1251 abort();
1252 }
1253 }
1254 if (instr->def.num_components > 1) {
1255 value = LLVMConstVector(values, instr->def.num_components);
1256 } else
1257 value = values[0];
1258
1259 ctx->ssa_defs[instr->def.index] = value;
1260 }
1261
1262 static LLVMValueRef
1263 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1264 {
1265 LLVMValueRef size =
1266 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1267 LLVMConstInt(ctx->ac.i32, 2, false), "");
1268
1269 /* GFX8 only */
1270 if (ctx->ac.chip_class == GFX8 && in_elements) {
1271 /* On GFX8, the descriptor contains the size in bytes,
1272 * but TXQ must return the size in elements.
1273 * The stride is always non-zero for resources using TXQ.
1274 */
1275 LLVMValueRef stride =
1276 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1277 ctx->ac.i32_1, "");
1278 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1279 LLVMConstInt(ctx->ac.i32, 16, false), "");
1280 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1281 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1282
1283 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1284 }
1285 return size;
1286 }
1287
1288 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1289 * incorrectly forces nearest filtering if the texture format is integer.
1290 * The only effect it has on Gather4, which always returns 4 texels for
1291 * bilinear filtering, is that the final coordinates are off by 0.5 of
1292 * the texel size.
1293 *
1294 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1295 * or (0.5 / size) from the normalized coordinates.
1296 *
1297 * However, cube textures with 8_8_8_8 data formats require a different
1298 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1299 * precision in 32-bit data formats, so it needs to be applied dynamically at
1300 * runtime. In this case, return an i1 value that indicates whether the
1301 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1302 */
1303 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1304 nir_variable *var,
1305 struct ac_image_args *args,
1306 const nir_tex_instr *instr)
1307 {
1308 const struct glsl_type *type = glsl_without_array(var->type);
1309 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1310 LLVMValueRef wa_8888 = NULL;
1311 LLVMValueRef half_texel[2];
1312 LLVMValueRef result;
1313
1314 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1315
1316 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1317 LLVMValueRef formats;
1318 LLVMValueRef data_format;
1319 LLVMValueRef wa_formats;
1320
1321 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1322
1323 data_format = LLVMBuildLShr(ctx->builder, formats,
1324 LLVMConstInt(ctx->i32, 20, false), "");
1325 data_format = LLVMBuildAnd(ctx->builder, data_format,
1326 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1327 wa_8888 = LLVMBuildICmp(
1328 ctx->builder, LLVMIntEQ, data_format,
1329 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1330 "");
1331
1332 uint32_t wa_num_format =
1333 stype == GLSL_TYPE_UINT ?
1334 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1335 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1336 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1337 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1338 "");
1339 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1340 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1341
1342 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1343 args->resource = LLVMBuildInsertElement(
1344 ctx->builder, args->resource, formats, ctx->i32_1, "");
1345 }
1346
1347 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1348 assert(!wa_8888);
1349 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1350 } else {
1351 struct ac_image_args resinfo = {};
1352 LLVMBasicBlockRef bbs[2];
1353
1354 LLVMValueRef unnorm = NULL;
1355 LLVMValueRef default_offset = ctx->f32_0;
1356 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1357 !instr->is_array) {
1358 /* In vulkan, whether the sampler uses unnormalized
1359 * coordinates or not is a dynamic property of the
1360 * sampler. Hence, to figure out whether or not we
1361 * need to divide by the texture size, we need to test
1362 * the sampler at runtime. This tests the bit set by
1363 * radv_init_sampler().
1364 */
1365 LLVMValueRef sampler0 =
1366 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1367 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1368 LLVMConstInt(ctx->i32, 15, false), "");
1369 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1370 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1371 default_offset = LLVMConstReal(ctx->f32, -0.5);
1372 }
1373
1374 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1375 if (wa_8888 || unnorm) {
1376 assert(!(wa_8888 && unnorm));
1377 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1378 /* Skip the texture size query entirely if we don't need it. */
1379 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1380 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1381 }
1382
1383 /* Query the texture size. */
1384 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1385 resinfo.opcode = ac_image_get_resinfo;
1386 resinfo.dmask = 0xf;
1387 resinfo.lod = ctx->i32_0;
1388 resinfo.resource = args->resource;
1389 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1390 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1391
1392 /* Compute -0.5 / size. */
1393 for (unsigned c = 0; c < 2; c++) {
1394 half_texel[c] =
1395 LLVMBuildExtractElement(ctx->builder, size,
1396 LLVMConstInt(ctx->i32, c, 0), "");
1397 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1398 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1399 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1400 LLVMConstReal(ctx->f32, -0.5), "");
1401 }
1402
1403 if (wa_8888 || unnorm) {
1404 ac_build_endif(ctx, 2000);
1405
1406 for (unsigned c = 0; c < 2; c++) {
1407 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1408 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1409 values, bbs);
1410 }
1411 }
1412 }
1413
1414 for (unsigned c = 0; c < 2; c++) {
1415 LLVMValueRef tmp;
1416 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1417 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1418 }
1419
1420 args->attributes = AC_FUNC_ATTR_READNONE;
1421 result = ac_build_image_opcode(ctx, args);
1422
1423 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1424 LLVMValueRef tmp, tmp2;
1425
1426 /* if the cube workaround is in place, f2i the result. */
1427 for (unsigned c = 0; c < 4; c++) {
1428 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1429 if (stype == GLSL_TYPE_UINT)
1430 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1431 else
1432 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1433 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1434 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1435 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1436 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1437 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1438 }
1439 }
1440 return result;
1441 }
1442
1443 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1444 {
1445 nir_deref_instr *texture_deref_instr = NULL;
1446
1447 for (unsigned i = 0; i < instr->num_srcs; i++) {
1448 switch (instr->src[i].src_type) {
1449 case nir_tex_src_texture_deref:
1450 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1451 break;
1452 default:
1453 break;
1454 }
1455 }
1456 return texture_deref_instr;
1457 }
1458
1459 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1460 const nir_tex_instr *instr,
1461 struct ac_image_args *args)
1462 {
1463 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1464 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1465
1466 assert(instr->dest.is_ssa);
1467 return ac_build_buffer_load_format(&ctx->ac,
1468 args->resource,
1469 args->coords[0],
1470 ctx->ac.i32_0,
1471 util_last_bit(mask),
1472 0, true,
1473 instr->dest.ssa.bit_size == 16);
1474 }
1475
1476 args->opcode = ac_image_sample;
1477
1478 switch (instr->op) {
1479 case nir_texop_txf:
1480 case nir_texop_txf_ms:
1481 case nir_texop_samples_identical:
1482 args->opcode = args->level_zero ||
1483 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1484 ac_image_load : ac_image_load_mip;
1485 args->level_zero = false;
1486 break;
1487 case nir_texop_txs:
1488 case nir_texop_query_levels:
1489 args->opcode = ac_image_get_resinfo;
1490 if (!args->lod)
1491 args->lod = ctx->ac.i32_0;
1492 args->level_zero = false;
1493 break;
1494 case nir_texop_tex:
1495 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1496 assert(!args->lod);
1497 args->level_zero = true;
1498 }
1499 break;
1500 case nir_texop_tg4:
1501 args->opcode = ac_image_gather4;
1502 if (!args->lod && !args->bias)
1503 args->level_zero = true;
1504 break;
1505 case nir_texop_lod:
1506 args->opcode = ac_image_get_lod;
1507 break;
1508 case nir_texop_fragment_fetch:
1509 case nir_texop_fragment_mask_fetch:
1510 args->opcode = ac_image_load;
1511 args->level_zero = false;
1512 break;
1513 default:
1514 break;
1515 }
1516
1517 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1518 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1519 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1520 const struct glsl_type *type = glsl_without_array(var->type);
1521 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1522 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1523 return lower_gather4_integer(&ctx->ac, var, args, instr);
1524 }
1525 }
1526
1527 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1528 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1529 if ((args->dim == ac_image_2darray ||
1530 args->dim == ac_image_2d) && !args->coords[1]) {
1531 args->coords[1] = ctx->ac.i32_0;
1532 }
1533 }
1534
1535 args->attributes = AC_FUNC_ATTR_READNONE;
1536 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1537 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1538 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1539 /* Prevent texture instructions with implicit derivatives from being
1540 * sinked into branches. */
1541 switch (instr->op) {
1542 case nir_texop_tex:
1543 case nir_texop_txb:
1544 case nir_texop_lod:
1545 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1546 break;
1547 default:
1548 break;
1549 }
1550 }
1551
1552 return ac_build_image_opcode(&ctx->ac, args);
1553 }
1554
1555 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1556 nir_intrinsic_instr *instr)
1557 {
1558 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1559 LLVMValueRef index = get_src(ctx, instr->src[1]);
1560
1561 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1562 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1563 return result;
1564 }
1565
1566 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1567 nir_intrinsic_instr *instr)
1568 {
1569 LLVMValueRef ptr, addr;
1570 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1571 unsigned index = nir_intrinsic_base(instr);
1572
1573 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1574 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1575
1576 /* Load constant values from user SGPRS when possible, otherwise
1577 * fallback to the default path that loads directly from memory.
1578 */
1579 if (LLVMIsConstant(src0) &&
1580 instr->dest.ssa.bit_size == 32) {
1581 unsigned count = instr->dest.ssa.num_components;
1582 unsigned offset = index;
1583
1584 offset += LLVMConstIntGetZExtValue(src0);
1585 offset /= 4;
1586
1587 offset -= ctx->args->base_inline_push_consts;
1588
1589 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1590 if (offset + count <= num_inline_push_consts) {
1591 LLVMValueRef push_constants[num_inline_push_consts];
1592 for (unsigned i = 0; i < num_inline_push_consts; i++)
1593 push_constants[i] = ac_get_arg(&ctx->ac,
1594 ctx->args->inline_push_consts[i]);
1595 return ac_build_gather_values(&ctx->ac,
1596 push_constants + offset,
1597 count);
1598 }
1599 }
1600
1601 ptr = LLVMBuildGEP(ctx->ac.builder,
1602 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1603
1604 if (instr->dest.ssa.bit_size == 8) {
1605 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1606 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1607 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1608 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1609
1610 LLVMValueRef params[3];
1611 if (load_dwords > 1) {
1612 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1613 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1614 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1615 } else {
1616 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1617 params[0] = ctx->ac.i32_0;
1618 params[1] = res;
1619 }
1620 params[2] = addr;
1621 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1622
1623 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1624 if (instr->dest.ssa.num_components > 1)
1625 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1626 return res;
1627 } else if (instr->dest.ssa.bit_size == 16) {
1628 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1629 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1630 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1631 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1632 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1633 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1634 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1635 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1636 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1637 LLVMConstInt(ctx->ac.i32, 4, false)};
1638 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1639 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1640 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1641 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1642 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1643 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1644 }
1645
1646 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1647
1648 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1649 }
1650
1651 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1652 const nir_intrinsic_instr *instr)
1653 {
1654 LLVMValueRef index = get_src(ctx, instr->src[0]);
1655
1656 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1657 }
1658
1659 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1660 {
1661 uint32_t new_mask = 0;
1662 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1663 if (mask & (1u << i))
1664 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1665 return new_mask;
1666 }
1667
1668 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1669 unsigned start, unsigned count)
1670 {
1671 LLVMValueRef mask[] = {
1672 ctx->i32_0, ctx->i32_1,
1673 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1674
1675 unsigned src_elements = ac_get_llvm_num_components(src);
1676
1677 if (count == src_elements) {
1678 assert(start == 0);
1679 return src;
1680 } else if (count == 1) {
1681 assert(start < src_elements);
1682 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1683 } else {
1684 assert(start + count <= src_elements);
1685 assert(count <= 4);
1686 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1687 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1688 }
1689 }
1690
1691 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1692 enum gl_access_qualifier access,
1693 bool may_store_unaligned,
1694 bool writeonly_memory)
1695 {
1696 unsigned cache_policy = 0;
1697
1698 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1699 * store opcodes not aligned to a dword are affected. The only way to
1700 * get unaligned stores is through shader images.
1701 */
1702 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1703 /* If this is write-only, don't keep data in L1 to prevent
1704 * evicting L1 cache lines that may be needed by other
1705 * instructions.
1706 */
1707 writeonly_memory ||
1708 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1709 cache_policy |= ac_glc;
1710 }
1711
1712 if (access & ACCESS_STREAM_CACHE_POLICY)
1713 cache_policy |= ac_slc | ac_glc;
1714
1715 return cache_policy;
1716 }
1717
1718 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1719 struct waterfall_context *wctx,
1720 const nir_intrinsic_instr *instr,
1721 nir_src src)
1722 {
1723 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1724 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1725 }
1726
1727 static void visit_store_ssbo(struct ac_nir_context *ctx,
1728 nir_intrinsic_instr *instr)
1729 {
1730 if (ctx->ac.postponed_kill) {
1731 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1732 ctx->ac.postponed_kill, "");
1733 ac_build_ifcc(&ctx->ac, cond, 7000);
1734 }
1735
1736 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1737 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1738 unsigned writemask = nir_intrinsic_write_mask(instr);
1739 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1740 bool writeonly_memory = access & ACCESS_NON_READABLE;
1741 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1742
1743 struct waterfall_context wctx;
1744 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1745
1746 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1747 LLVMValueRef base_data = src_data;
1748 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1749 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1750
1751 while (writemask) {
1752 int start, count;
1753 LLVMValueRef data, offset;
1754 LLVMTypeRef data_type;
1755
1756 u_bit_scan_consecutive_range(&writemask, &start, &count);
1757
1758 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1759 * writes into a 2-element and a 1-element write. */
1760 if (count == 3 &&
1761 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1762 writemask |= 1 << (start + 2);
1763 count = 2;
1764 }
1765 int num_bytes = count * elem_size_bytes; /* count in bytes */
1766
1767 /* we can only store 4 DWords at the same time.
1768 * can only happen for 64 Bit vectors. */
1769 if (num_bytes > 16) {
1770 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1771 count = 2;
1772 num_bytes = 16;
1773 }
1774
1775 /* check alignment of 16 Bit stores */
1776 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1777 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1778 count = 1;
1779 num_bytes = 2;
1780 }
1781
1782 /* Due to alignment issues, split stores of 8-bit/16-bit
1783 * vectors.
1784 */
1785 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1786 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1787 count = 1;
1788 num_bytes = elem_size_bytes;
1789 }
1790
1791 data = extract_vector_range(&ctx->ac, base_data, start, count);
1792
1793 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1794 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1795
1796 if (num_bytes == 1) {
1797 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1798 offset, ctx->ac.i32_0,
1799 cache_policy);
1800 } else if (num_bytes == 2) {
1801 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1802 offset, ctx->ac.i32_0,
1803 cache_policy);
1804 } else {
1805 int num_channels = num_bytes / 4;
1806
1807 switch (num_bytes) {
1808 case 16: /* v4f32 */
1809 data_type = ctx->ac.v4f32;
1810 break;
1811 case 12: /* v3f32 */
1812 data_type = ctx->ac.v3f32;
1813 break;
1814 case 8: /* v2f32 */
1815 data_type = ctx->ac.v2f32;
1816 break;
1817 case 4: /* f32 */
1818 data_type = ctx->ac.f32;
1819 break;
1820 default:
1821 unreachable("Malformed vector store.");
1822 }
1823 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1824
1825 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1826 num_channels, offset,
1827 ctx->ac.i32_0, 0,
1828 cache_policy);
1829 }
1830 }
1831
1832 exit_waterfall(ctx, &wctx, NULL);
1833
1834 if (ctx->ac.postponed_kill)
1835 ac_build_endif(&ctx->ac, 7000);
1836 }
1837
1838 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1839 LLVMValueRef descriptor,
1840 LLVMValueRef offset,
1841 LLVMValueRef compare,
1842 LLVMValueRef exchange)
1843 {
1844 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1845 if (ctx->abi->robust_buffer_access) {
1846 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1847
1848 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1849 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1850
1851 ac_build_ifcc(&ctx->ac, cond, -1);
1852
1853 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1854 }
1855
1856 LLVMValueRef ptr_parts[2] = {
1857 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1858 LLVMBuildAnd(ctx->ac.builder,
1859 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1860 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1861 };
1862
1863 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1864 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1865
1866 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1867
1868 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1869 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1870 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1871 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1872
1873 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1874 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1875
1876 if (ctx->abi->robust_buffer_access) {
1877 ac_build_endif(&ctx->ac, -1);
1878
1879 LLVMBasicBlockRef incoming_blocks[2] = {
1880 start_block,
1881 then_block,
1882 };
1883
1884 LLVMValueRef incoming_values[2] = {
1885 LLVMConstInt(ctx->ac.i64, 0, 0),
1886 result,
1887 };
1888 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1889 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1890 return ret;
1891 } else {
1892 return result;
1893 }
1894 }
1895
1896 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1897 nir_intrinsic_instr *instr)
1898 {
1899 if (ctx->ac.postponed_kill) {
1900 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1901 ctx->ac.postponed_kill, "");
1902 ac_build_ifcc(&ctx->ac, cond, 7001);
1903 }
1904
1905 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1906 const char *op;
1907 char name[64], type[8];
1908 LLVMValueRef params[6], descriptor;
1909 LLVMValueRef result;
1910 int arg_count = 0;
1911
1912 struct waterfall_context wctx;
1913 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1914
1915 switch (instr->intrinsic) {
1916 case nir_intrinsic_ssbo_atomic_add:
1917 op = "add";
1918 break;
1919 case nir_intrinsic_ssbo_atomic_imin:
1920 op = "smin";
1921 break;
1922 case nir_intrinsic_ssbo_atomic_umin:
1923 op = "umin";
1924 break;
1925 case nir_intrinsic_ssbo_atomic_imax:
1926 op = "smax";
1927 break;
1928 case nir_intrinsic_ssbo_atomic_umax:
1929 op = "umax";
1930 break;
1931 case nir_intrinsic_ssbo_atomic_and:
1932 op = "and";
1933 break;
1934 case nir_intrinsic_ssbo_atomic_or:
1935 op = "or";
1936 break;
1937 case nir_intrinsic_ssbo_atomic_xor:
1938 op = "xor";
1939 break;
1940 case nir_intrinsic_ssbo_atomic_exchange:
1941 op = "swap";
1942 break;
1943 case nir_intrinsic_ssbo_atomic_comp_swap:
1944 op = "cmpswap";
1945 break;
1946 default:
1947 abort();
1948 }
1949
1950 descriptor = ctx->abi->load_ssbo(ctx->abi,
1951 rsrc_base,
1952 true);
1953
1954 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1955 return_type == ctx->ac.i64) {
1956 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1957 get_src(ctx, instr->src[1]),
1958 get_src(ctx, instr->src[2]),
1959 get_src(ctx, instr->src[3]));
1960 } else {
1961 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1962 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1963 }
1964 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1965 params[arg_count++] = descriptor;
1966
1967 if (LLVM_VERSION_MAJOR >= 9) {
1968 /* XXX: The new raw/struct atomic intrinsics are buggy with
1969 * LLVM 8, see r358579.
1970 */
1971 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1972 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1973 params[arg_count++] = ctx->ac.i32_0; /* slc */
1974
1975 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1976 snprintf(name, sizeof(name),
1977 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1978 } else {
1979 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1980 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1981 params[arg_count++] = ctx->ac.i1false; /* slc */
1982
1983 assert(return_type == ctx->ac.i32);
1984 snprintf(name, sizeof(name),
1985 "llvm.amdgcn.buffer.atomic.%s", op);
1986 }
1987
1988 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1989 arg_count, 0);
1990 }
1991
1992 result = exit_waterfall(ctx, &wctx, result);
1993 if (ctx->ac.postponed_kill)
1994 ac_build_endif(&ctx->ac, 7001);
1995 return result;
1996 }
1997
1998 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1999 nir_intrinsic_instr *instr)
2000 {
2001 struct waterfall_context wctx;
2002 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
2003
2004 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
2005 int num_components = instr->num_components;
2006 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2007 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
2008
2009 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2010 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
2011 LLVMValueRef vindex = ctx->ac.i32_0;
2012
2013 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
2014 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2015
2016 LLVMValueRef results[4];
2017 for (int i = 0; i < num_components;) {
2018 int num_elems = num_components - i;
2019 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2020 num_elems = 1;
2021 if (num_elems * elem_size_bytes > 16)
2022 num_elems = 16 / elem_size_bytes;
2023 int load_bytes = num_elems * elem_size_bytes;
2024
2025 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2026
2027 LLVMValueRef ret;
2028
2029 if (load_bytes == 1) {
2030 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2031 rsrc,
2032 offset,
2033 ctx->ac.i32_0,
2034 immoffset,
2035 cache_policy);
2036 } else if (load_bytes == 2) {
2037 ret = ac_build_tbuffer_load_short(&ctx->ac,
2038 rsrc,
2039 offset,
2040 ctx->ac.i32_0,
2041 immoffset,
2042 cache_policy);
2043 } else {
2044 int num_channels = util_next_power_of_two(load_bytes) / 4;
2045 bool can_speculate = access & ACCESS_CAN_REORDER;
2046
2047 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2048 vindex, offset, immoffset, 0,
2049 cache_policy, can_speculate, false);
2050 }
2051
2052 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2053 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2054 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2055
2056 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2057 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2058
2059 for (unsigned j = 0; j < num_elems; j++) {
2060 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2061 }
2062 i += num_elems;
2063 }
2064
2065 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2066 return exit_waterfall(ctx, &wctx, ret);
2067 }
2068
2069 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2070 struct waterfall_context *wctx,
2071 const nir_intrinsic_instr *instr)
2072 {
2073 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2074 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2075 }
2076
2077 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2078 nir_intrinsic_instr *instr)
2079 {
2080 struct waterfall_context wctx;
2081 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2082
2083 LLVMValueRef ret;
2084 LLVMValueRef rsrc = rsrc_base;
2085 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2086 int num_components = instr->num_components;
2087
2088 if (ctx->abi->load_ubo)
2089 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2090
2091 if (instr->dest.ssa.bit_size == 64)
2092 num_components *= 2;
2093
2094 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2095 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2096 LLVMValueRef results[num_components];
2097 for (unsigned i = 0; i < num_components; ++i) {
2098 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2099 load_bytes * i, 0);
2100
2101 if (load_bytes == 1) {
2102 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2103 rsrc,
2104 offset,
2105 ctx->ac.i32_0,
2106 immoffset,
2107 0);
2108 } else {
2109 assert(load_bytes == 2);
2110 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2111 rsrc,
2112 offset,
2113 ctx->ac.i32_0,
2114 immoffset,
2115 0);
2116 }
2117 }
2118 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2119 } else {
2120 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2121 NULL, 0, 0, true, true);
2122
2123 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2124 }
2125
2126 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2127 get_def_type(ctx, &instr->dest.ssa), "");
2128
2129 return exit_waterfall(ctx, &wctx, ret);
2130 }
2131
2132 static void
2133 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2134 bool vs_in, unsigned *vertex_index_out,
2135 LLVMValueRef *vertex_index_ref,
2136 unsigned *const_out, LLVMValueRef *indir_out)
2137 {
2138 nir_variable *var = nir_deref_instr_get_variable(instr);
2139 nir_deref_path path;
2140 unsigned idx_lvl = 1;
2141
2142 nir_deref_path_init(&path, instr, NULL);
2143
2144 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2145 if (vertex_index_ref) {
2146 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2147 if (vertex_index_out)
2148 *vertex_index_out = 0;
2149 } else {
2150 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2151 }
2152 ++idx_lvl;
2153 }
2154
2155 uint32_t const_offset = 0;
2156 LLVMValueRef offset = NULL;
2157
2158 if (var->data.compact) {
2159 assert(instr->deref_type == nir_deref_type_array);
2160 const_offset = nir_src_as_uint(instr->arr.index);
2161 goto out;
2162 }
2163
2164 for (; path.path[idx_lvl]; ++idx_lvl) {
2165 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2166 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2167 unsigned index = path.path[idx_lvl]->strct.index;
2168
2169 for (unsigned i = 0; i < index; i++) {
2170 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2171 const_offset += glsl_count_attribute_slots(ft, vs_in);
2172 }
2173 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2174 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2175 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2176 const_offset += size *
2177 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2178 } else {
2179 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2180 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2181 if (offset)
2182 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2183 else
2184 offset = array_off;
2185 }
2186 } else
2187 unreachable("Uhandled deref type in get_deref_instr_offset");
2188 }
2189
2190 out:
2191 nir_deref_path_finish(&path);
2192
2193 if (const_offset && offset)
2194 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2195 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2196 "");
2197
2198 *const_out = const_offset;
2199 *indir_out = offset;
2200 }
2201
2202 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2203 nir_intrinsic_instr *instr,
2204 bool load_inputs)
2205 {
2206 LLVMValueRef result;
2207 LLVMValueRef vertex_index = NULL;
2208 LLVMValueRef indir_index = NULL;
2209 unsigned const_index = 0;
2210
2211 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2212
2213 unsigned location = var->data.location;
2214 unsigned driver_location = var->data.driver_location;
2215 const bool is_patch = var->data.patch ||
2216 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2217 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2218 const bool is_compact = var->data.compact;
2219
2220 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2221 false, NULL, is_patch ? NULL : &vertex_index,
2222 &const_index, &indir_index);
2223
2224 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2225
2226 LLVMTypeRef src_component_type;
2227 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2228 src_component_type = LLVMGetElementType(dest_type);
2229 else
2230 src_component_type = dest_type;
2231
2232 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2233 vertex_index, indir_index,
2234 const_index, location, driver_location,
2235 var->data.location_frac,
2236 instr->num_components,
2237 is_patch, is_compact, load_inputs);
2238 if (instr->dest.ssa.bit_size == 16) {
2239 result = ac_to_integer(&ctx->ac, result);
2240 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2241 }
2242 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2243 }
2244
2245 static unsigned
2246 type_scalar_size_bytes(const struct glsl_type *type)
2247 {
2248 assert(glsl_type_is_vector_or_scalar(type) ||
2249 glsl_type_is_matrix(type));
2250 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2251 }
2252
2253 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2254 nir_intrinsic_instr *instr)
2255 {
2256 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2257 nir_variable *var = nir_deref_instr_get_variable(deref);
2258
2259 LLVMValueRef values[8];
2260 int idx = 0;
2261 int ve = instr->dest.ssa.num_components;
2262 unsigned comp = 0;
2263 LLVMValueRef indir_index;
2264 LLVMValueRef ret;
2265 unsigned const_index;
2266 unsigned stride = 4;
2267 int mode = deref->mode;
2268
2269 if (var) {
2270 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2271 var->data.mode == nir_var_shader_in;
2272 idx = var->data.driver_location;
2273 comp = var->data.location_frac;
2274 mode = var->data.mode;
2275
2276 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2277 &const_index, &indir_index);
2278
2279 if (var->data.compact) {
2280 stride = 1;
2281 const_index += comp;
2282 comp = 0;
2283 }
2284 }
2285
2286 if (instr->dest.ssa.bit_size == 64 &&
2287 (deref->mode == nir_var_shader_in ||
2288 deref->mode == nir_var_shader_out ||
2289 deref->mode == nir_var_function_temp))
2290 ve *= 2;
2291
2292 switch (mode) {
2293 case nir_var_shader_in:
2294 /* TODO: remove this after RADV switches to lowered IO */
2295 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2296 ctx->stage == MESA_SHADER_TESS_EVAL) {
2297 return load_tess_varyings(ctx, instr, true);
2298 }
2299
2300 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2301 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2302 LLVMValueRef indir_index;
2303 unsigned const_index, vertex_index;
2304 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2305 &const_index, &indir_index);
2306 assert(indir_index == NULL);
2307
2308 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2309 var->data.driver_location,
2310 var->data.location_frac,
2311 instr->num_components, vertex_index, const_index, type);
2312 }
2313
2314 for (unsigned chan = comp; chan < ve + comp; chan++) {
2315 if (indir_index) {
2316 unsigned count = glsl_count_attribute_slots(
2317 var->type,
2318 ctx->stage == MESA_SHADER_VERTEX);
2319 count -= chan / 4;
2320 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2321 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2322 stride, false, true);
2323
2324 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2325 tmp_vec,
2326 indir_index, "");
2327 } else
2328 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2329 }
2330 break;
2331 case nir_var_function_temp:
2332 for (unsigned chan = 0; chan < ve; chan++) {
2333 if (indir_index) {
2334 unsigned count = glsl_count_attribute_slots(
2335 var->type, false);
2336 count -= chan / 4;
2337 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2338 &ctx->ac, ctx->locals + idx + chan, count,
2339 stride, true, true);
2340
2341 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2342 tmp_vec,
2343 indir_index, "");
2344 } else {
2345 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2346 }
2347 }
2348 break;
2349 case nir_var_shader_out:
2350 /* TODO: remove this after RADV switches to lowered IO */
2351 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2352 return load_tess_varyings(ctx, instr, false);
2353 }
2354
2355 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2356 var->data.fb_fetch_output &&
2357 ctx->abi->emit_fbfetch)
2358 return ctx->abi->emit_fbfetch(ctx->abi);
2359
2360 for (unsigned chan = comp; chan < ve + comp; chan++) {
2361 if (indir_index) {
2362 unsigned count = glsl_count_attribute_slots(
2363 var->type, false);
2364 count -= chan / 4;
2365 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2366 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2367 stride, true, true);
2368
2369 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2370 tmp_vec,
2371 indir_index, "");
2372 } else {
2373 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2374 ctx->abi->outputs[idx + chan + const_index * stride],
2375 "");
2376 }
2377 }
2378 break;
2379 case nir_var_mem_global: {
2380 LLVMValueRef address = get_src(ctx, instr->src[0]);
2381 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2382 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2383 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2384 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2385 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2386 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2387
2388 if (stride != natural_stride || split_loads) {
2389 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2390 result_type = LLVMGetElementType(result_type);
2391
2392 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2393 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2394 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2395
2396 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2397 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2398 values[i] = LLVMBuildLoad(ctx->ac.builder,
2399 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2400
2401 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2402 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2403 }
2404 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2405 } else {
2406 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2407 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2408 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2409 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2410
2411 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2412 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2413 return val;
2414 }
2415 }
2416 default:
2417 unreachable("unhandle variable mode");
2418 }
2419 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2420 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2421 }
2422
2423 static void
2424 visit_store_var(struct ac_nir_context *ctx,
2425 nir_intrinsic_instr *instr)
2426 {
2427 if (ctx->ac.postponed_kill) {
2428 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2429 ctx->ac.postponed_kill, "");
2430 ac_build_ifcc(&ctx->ac, cond, 7002);
2431 }
2432
2433 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2434 nir_variable *var = nir_deref_instr_get_variable(deref);
2435
2436 LLVMValueRef temp_ptr, value;
2437 int idx = 0;
2438 unsigned comp = 0;
2439 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2440 int writemask = instr->const_index[0];
2441 LLVMValueRef indir_index;
2442 unsigned const_index;
2443
2444 if (var) {
2445 get_deref_offset(ctx, deref, false,
2446 NULL, NULL, &const_index, &indir_index);
2447 idx = var->data.driver_location;
2448 comp = var->data.location_frac;
2449
2450 if (var->data.compact) {
2451 const_index += comp;
2452 comp = 0;
2453 }
2454 }
2455
2456 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2457 (deref->mode == nir_var_shader_out ||
2458 deref->mode == nir_var_function_temp)) {
2459
2460 src = LLVMBuildBitCast(ctx->ac.builder, src,
2461 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2462 "");
2463
2464 writemask = widen_mask(writemask, 2);
2465 }
2466
2467 writemask = writemask << comp;
2468
2469 switch (deref->mode) {
2470 case nir_var_shader_out:
2471 /* TODO: remove this after RADV switches to lowered IO */
2472 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2473 LLVMValueRef vertex_index = NULL;
2474 LLVMValueRef indir_index = NULL;
2475 unsigned const_index = 0;
2476 const bool is_patch = var->data.patch ||
2477 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2478 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2479
2480 get_deref_offset(ctx, deref, false, NULL,
2481 is_patch ? NULL : &vertex_index,
2482 &const_index, &indir_index);
2483
2484 ctx->abi->store_tcs_outputs(ctx->abi, var,
2485 vertex_index, indir_index,
2486 const_index, src, writemask,
2487 var->data.location_frac,
2488 var->data.driver_location);
2489 break;
2490 }
2491
2492 for (unsigned chan = 0; chan < 8; chan++) {
2493 int stride = 4;
2494 if (!(writemask & (1 << chan)))
2495 continue;
2496
2497 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2498
2499 if (var->data.compact)
2500 stride = 1;
2501 if (indir_index) {
2502 unsigned count = glsl_count_attribute_slots(
2503 var->type, false);
2504 count -= chan / 4;
2505 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2506 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2507 stride, true, true);
2508
2509 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2510 value, indir_index, "");
2511 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2512 count, stride, tmp_vec);
2513
2514 } else {
2515 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2516
2517 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2518 }
2519 }
2520 break;
2521 case nir_var_function_temp:
2522 for (unsigned chan = 0; chan < 8; chan++) {
2523 if (!(writemask & (1 << chan)))
2524 continue;
2525
2526 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2527 if (indir_index) {
2528 unsigned count = glsl_count_attribute_slots(
2529 var->type, false);
2530 count -= chan / 4;
2531 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2532 &ctx->ac, ctx->locals + idx + chan, count,
2533 4, true, true);
2534
2535 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2536 value, indir_index, "");
2537 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2538 count, 4, tmp_vec);
2539 } else {
2540 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2541
2542 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2543 }
2544 }
2545 break;
2546
2547 case nir_var_mem_global: {
2548 int writemask = instr->const_index[0];
2549 LLVMValueRef address = get_src(ctx, instr->src[0]);
2550 LLVMValueRef val = get_src(ctx, instr->src[1]);
2551
2552 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2553 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2554 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2555 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2556 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2557
2558 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2559 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2560 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2561
2562 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2563 stride == natural_stride && !split_stores) {
2564 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2565 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2566 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2567
2568 val = LLVMBuildBitCast(ctx->ac.builder, val,
2569 LLVMGetElementType(LLVMTypeOf(address)), "");
2570 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2571
2572 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2573 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2574 } else {
2575 LLVMTypeRef val_type = LLVMTypeOf(val);
2576 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2577 val_type = LLVMGetElementType(val_type);
2578
2579 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2580 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2581 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2582 for (unsigned chan = 0; chan < 4; chan++) {
2583 if (!(writemask & (1 << chan)))
2584 continue;
2585
2586 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2587
2588 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2589 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2590 chan);
2591 src = LLVMBuildBitCast(ctx->ac.builder, src,
2592 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2593 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2594
2595 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2596 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2597 }
2598 }
2599 break;
2600 }
2601 default:
2602 abort();
2603 break;
2604 }
2605
2606 if (ctx->ac.postponed_kill)
2607 ac_build_endif(&ctx->ac, 7002);
2608 }
2609
2610 static void
2611 visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
2612 {
2613 if (ctx->ac.postponed_kill) {
2614 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2615 ctx->ac.postponed_kill, "");
2616 ac_build_ifcc(&ctx->ac, cond, 7002);
2617 }
2618
2619 unsigned base = nir_intrinsic_base(instr);
2620 unsigned writemask = nir_intrinsic_write_mask(instr);
2621 unsigned component = nir_intrinsic_component(instr);
2622 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
2623 nir_src offset = *nir_get_io_offset_src(instr);
2624 LLVMValueRef indir_index = NULL;
2625
2626 if (nir_src_is_const(offset))
2627 assert(nir_src_as_uint(offset) == 0);
2628 else
2629 indir_index = get_src(ctx, offset);
2630
2631 switch (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src))) {
2632 case 32:
2633 break;
2634 case 64:
2635 writemask = widen_mask(writemask, 2);
2636 src = LLVMBuildBitCast(ctx->ac.builder, src,
2637 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2638 "");
2639 break;
2640 default:
2641 unreachable("unhandled store_output bit size");
2642 return;
2643 }
2644
2645 writemask <<= component;
2646
2647 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2648 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
2649 LLVMValueRef vertex_index =
2650 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
2651
2652 ctx->abi->store_tcs_outputs(ctx->abi, NULL,
2653 vertex_index, indir_index,
2654 0, src, writemask,
2655 component, base * 4);
2656 return;
2657 }
2658
2659 /* No indirect indexing is allowed after this point. */
2660 assert(!indir_index);
2661
2662 for (unsigned chan = 0; chan < 8; chan++) {
2663 if (!(writemask & (1 << chan)))
2664 continue;
2665
2666 LLVMValueRef value = ac_llvm_extract_elem(&ctx->ac, src, chan - component);
2667 LLVMBuildStore(ctx->ac.builder, value,
2668 ctx->abi->outputs[base * 4 + chan]);
2669 }
2670
2671 if (ctx->ac.postponed_kill)
2672 ac_build_endif(&ctx->ac, 7002);
2673 }
2674
2675 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2676 {
2677 switch (dim) {
2678 case GLSL_SAMPLER_DIM_BUF:
2679 return 1;
2680 case GLSL_SAMPLER_DIM_1D:
2681 return array ? 2 : 1;
2682 case GLSL_SAMPLER_DIM_2D:
2683 return array ? 3 : 2;
2684 case GLSL_SAMPLER_DIM_MS:
2685 return array ? 4 : 3;
2686 case GLSL_SAMPLER_DIM_3D:
2687 case GLSL_SAMPLER_DIM_CUBE:
2688 return 3;
2689 case GLSL_SAMPLER_DIM_RECT:
2690 case GLSL_SAMPLER_DIM_SUBPASS:
2691 return 2;
2692 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2693 return 3;
2694 default:
2695 break;
2696 }
2697 return 0;
2698 }
2699
2700 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2701 LLVMValueRef coord_x, LLVMValueRef coord_y,
2702 LLVMValueRef coord_z,
2703 LLVMValueRef sample_index,
2704 LLVMValueRef fmask_desc_ptr)
2705 {
2706 unsigned sample_chan = coord_z ? 3 : 2;
2707 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2708 addr[sample_chan] = sample_index;
2709
2710 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2711 return addr[sample_chan];
2712 }
2713
2714 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2715 {
2716 assert(instr->src[0].is_ssa);
2717 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2718 }
2719
2720 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2721 const nir_intrinsic_instr *instr,
2722 LLVMValueRef dynamic_index,
2723 enum ac_descriptor_type desc_type,
2724 bool write)
2725 {
2726 nir_deref_instr *deref_instr =
2727 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2728 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2729
2730 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2731 }
2732
2733 static void get_image_coords(struct ac_nir_context *ctx,
2734 const nir_intrinsic_instr *instr,
2735 LLVMValueRef dynamic_desc_index,
2736 struct ac_image_args *args,
2737 enum glsl_sampler_dim dim,
2738 bool is_array)
2739 {
2740 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2741 LLVMValueRef masks[] = {
2742 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2743 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2744 };
2745 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2746
2747 int count;
2748 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2749 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2750 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2751 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2752 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2753 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2754 count = image_type_to_components_count(dim, is_array);
2755
2756 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2757 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2758 LLVMValueRef fmask_load_address[3];
2759
2760 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2761 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2762 if (is_array)
2763 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2764 else
2765 fmask_load_address[2] = NULL;
2766
2767 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2768 fmask_load_address[0],
2769 fmask_load_address[1],
2770 fmask_load_address[2],
2771 sample_index,
2772 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2773 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2774 }
2775 if (count == 1 && !gfx9_1d) {
2776 if (instr->src[1].ssa->num_components)
2777 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2778 else
2779 args->coords[0] = src0;
2780 } else {
2781 int chan;
2782 if (is_ms)
2783 count--;
2784 for (chan = 0; chan < count; ++chan) {
2785 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2786 }
2787
2788 if (gfx9_1d) {
2789 if (is_array) {
2790 args->coords[2] = args->coords[1];
2791 args->coords[1] = ctx->ac.i32_0;
2792 } else
2793 args->coords[1] = ctx->ac.i32_0;
2794 count++;
2795 }
2796 if (ctx->ac.chip_class == GFX9 &&
2797 dim == GLSL_SAMPLER_DIM_2D &&
2798 !is_array) {
2799 /* The hw can't bind a slice of a 3D image as a 2D
2800 * image, because it ignores BASE_ARRAY if the target
2801 * is 3D. The workaround is to read BASE_ARRAY and set
2802 * it as the 3rd address operand for all 2D images.
2803 */
2804 LLVMValueRef first_layer, const5, mask;
2805
2806 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2807 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2808 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2809 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2810
2811 args->coords[count] = first_layer;
2812 count++;
2813 }
2814
2815
2816 if (is_ms) {
2817 args->coords[count] = sample_index;
2818 count++;
2819 }
2820 }
2821 }
2822
2823 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2824 const nir_intrinsic_instr *instr,
2825 LLVMValueRef dynamic_index,
2826 bool write, bool atomic)
2827 {
2828 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2829 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2830 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2831 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2832 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2833
2834 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2835 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2836 elem_count, stride, "");
2837
2838 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2839 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2840 }
2841 return rsrc;
2842 }
2843
2844 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2845 struct waterfall_context *wctx,
2846 const nir_intrinsic_instr *instr)
2847 {
2848 nir_deref_instr *deref_instr = NULL;
2849
2850 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2851 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2852
2853 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2854 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2855 }
2856
2857 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2858 const nir_intrinsic_instr *instr,
2859 bool bindless)
2860 {
2861 LLVMValueRef res;
2862
2863 enum glsl_sampler_dim dim;
2864 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2865 bool is_array;
2866 if (bindless) {
2867 dim = nir_intrinsic_image_dim(instr);
2868 is_array = nir_intrinsic_image_array(instr);
2869 } else {
2870 const nir_deref_instr *image_deref = get_image_deref(instr);
2871 const struct glsl_type *type = image_deref->type;
2872 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2873 dim = glsl_get_sampler_dim(type);
2874 access |= var->data.access;
2875 is_array = glsl_sampler_type_is_array(type);
2876 }
2877
2878 struct waterfall_context wctx;
2879 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2880
2881 struct ac_image_args args = {};
2882
2883 args.cache_policy = get_cache_policy(ctx, access, false, false);
2884
2885 if (dim == GLSL_SAMPLER_DIM_BUF) {
2886 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2887 unsigned num_channels = util_last_bit(mask);
2888 LLVMValueRef rsrc, vindex;
2889
2890 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2891 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2892 ctx->ac.i32_0, "");
2893
2894 assert(instr->dest.is_ssa);
2895 bool can_speculate = access & ACCESS_CAN_REORDER;
2896 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2897 ctx->ac.i32_0, num_channels,
2898 args.cache_policy,
2899 can_speculate,
2900 instr->dest.ssa.bit_size == 16);
2901 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2902
2903 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2904 res = ac_to_integer(&ctx->ac, res);
2905 } else {
2906 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2907
2908 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2909 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2910 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2911 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2912 if (!level_zero)
2913 args.lod = get_src(ctx, instr->src[3]);
2914 args.dmask = 15;
2915 args.attributes = AC_FUNC_ATTR_READONLY;
2916
2917 assert(instr->dest.is_ssa);
2918 args.d16 = instr->dest.ssa.bit_size == 16;
2919
2920 res = ac_build_image_opcode(&ctx->ac, &args);
2921 }
2922 return exit_waterfall(ctx, &wctx, res);
2923 }
2924
2925 static void visit_image_store(struct ac_nir_context *ctx,
2926 const nir_intrinsic_instr *instr,
2927 bool bindless)
2928 {
2929 if (ctx->ac.postponed_kill) {
2930 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2931 ctx->ac.postponed_kill, "");
2932 ac_build_ifcc(&ctx->ac, cond, 7003);
2933 }
2934
2935 enum glsl_sampler_dim dim;
2936 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2937 bool is_array;
2938
2939 if (bindless) {
2940 dim = nir_intrinsic_image_dim(instr);
2941 is_array = nir_intrinsic_image_array(instr);
2942 } else {
2943 const nir_deref_instr *image_deref = get_image_deref(instr);
2944 const struct glsl_type *type = image_deref->type;
2945 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2946 dim = glsl_get_sampler_dim(type);
2947 access |= var->data.access;
2948 is_array = glsl_sampler_type_is_array(type);
2949 }
2950
2951 struct waterfall_context wctx;
2952 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2953
2954 bool writeonly_memory = access & ACCESS_NON_READABLE;
2955 struct ac_image_args args = {};
2956
2957 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2958
2959 if (dim == GLSL_SAMPLER_DIM_BUF) {
2960 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2961 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2962 unsigned src_channels = ac_get_llvm_num_components(src);
2963 LLVMValueRef vindex;
2964
2965 if (src_channels == 3)
2966 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2967
2968 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2969 get_src(ctx, instr->src[1]),
2970 ctx->ac.i32_0, "");
2971
2972 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2973 ctx->ac.i32_0, args.cache_policy);
2974 } else {
2975 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2976
2977 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2978 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2979 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2980 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2981 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2982 if (!level_zero)
2983 args.lod = get_src(ctx, instr->src[4]);
2984 args.dmask = 15;
2985 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2986
2987 ac_build_image_opcode(&ctx->ac, &args);
2988 }
2989
2990 exit_waterfall(ctx, &wctx, NULL);
2991 if (ctx->ac.postponed_kill)
2992 ac_build_endif(&ctx->ac, 7003);
2993 }
2994
2995 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2996 const nir_intrinsic_instr *instr,
2997 bool bindless)
2998 {
2999 if (ctx->ac.postponed_kill) {
3000 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3001 ctx->ac.postponed_kill, "");
3002 ac_build_ifcc(&ctx->ac, cond, 7004);
3003 }
3004
3005 LLVMValueRef params[7];
3006 int param_count = 0;
3007
3008 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
3009 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
3010 const char *atomic_name;
3011 char intrinsic_name[64];
3012 enum ac_atomic_op atomic_subop;
3013 ASSERTED int length;
3014
3015 enum glsl_sampler_dim dim;
3016 bool is_array;
3017 if (bindless) {
3018 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
3019 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
3020 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
3021 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
3022 ASSERTED const GLenum format = nir_intrinsic_format(instr);
3023 assert(format == GL_R32UI || format == GL_R32I);
3024 }
3025 dim = nir_intrinsic_image_dim(instr);
3026 is_array = nir_intrinsic_image_array(instr);
3027 } else {
3028 const struct glsl_type *type = get_image_deref(instr)->type;
3029 dim = glsl_get_sampler_dim(type);
3030 is_array = glsl_sampler_type_is_array(type);
3031 }
3032
3033 struct waterfall_context wctx;
3034 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3035
3036 switch (instr->intrinsic) {
3037 case nir_intrinsic_bindless_image_atomic_add:
3038 case nir_intrinsic_image_deref_atomic_add:
3039 atomic_name = "add";
3040 atomic_subop = ac_atomic_add;
3041 break;
3042 case nir_intrinsic_bindless_image_atomic_imin:
3043 case nir_intrinsic_image_deref_atomic_imin:
3044 atomic_name = "smin";
3045 atomic_subop = ac_atomic_smin;
3046 break;
3047 case nir_intrinsic_bindless_image_atomic_umin:
3048 case nir_intrinsic_image_deref_atomic_umin:
3049 atomic_name = "umin";
3050 atomic_subop = ac_atomic_umin;
3051 break;
3052 case nir_intrinsic_bindless_image_atomic_imax:
3053 case nir_intrinsic_image_deref_atomic_imax:
3054 atomic_name = "smax";
3055 atomic_subop = ac_atomic_smax;
3056 break;
3057 case nir_intrinsic_bindless_image_atomic_umax:
3058 case nir_intrinsic_image_deref_atomic_umax:
3059 atomic_name = "umax";
3060 atomic_subop = ac_atomic_umax;
3061 break;
3062 case nir_intrinsic_bindless_image_atomic_and:
3063 case nir_intrinsic_image_deref_atomic_and:
3064 atomic_name = "and";
3065 atomic_subop = ac_atomic_and;
3066 break;
3067 case nir_intrinsic_bindless_image_atomic_or:
3068 case nir_intrinsic_image_deref_atomic_or:
3069 atomic_name = "or";
3070 atomic_subop = ac_atomic_or;
3071 break;
3072 case nir_intrinsic_bindless_image_atomic_xor:
3073 case nir_intrinsic_image_deref_atomic_xor:
3074 atomic_name = "xor";
3075 atomic_subop = ac_atomic_xor;
3076 break;
3077 case nir_intrinsic_bindless_image_atomic_exchange:
3078 case nir_intrinsic_image_deref_atomic_exchange:
3079 atomic_name = "swap";
3080 atomic_subop = ac_atomic_swap;
3081 break;
3082 case nir_intrinsic_bindless_image_atomic_comp_swap:
3083 case nir_intrinsic_image_deref_atomic_comp_swap:
3084 atomic_name = "cmpswap";
3085 atomic_subop = 0; /* not used */
3086 break;
3087 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3088 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3089 atomic_name = "inc";
3090 atomic_subop = ac_atomic_inc_wrap;
3091 break;
3092 }
3093 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3094 case nir_intrinsic_image_deref_atomic_dec_wrap:
3095 atomic_name = "dec";
3096 atomic_subop = ac_atomic_dec_wrap;
3097 break;
3098 default:
3099 abort();
3100 }
3101
3102 if (cmpswap)
3103 params[param_count++] = get_src(ctx, instr->src[4]);
3104 params[param_count++] = get_src(ctx, instr->src[3]);
3105
3106 LLVMValueRef result;
3107 if (dim == GLSL_SAMPLER_DIM_BUF) {
3108 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3109 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3110 ctx->ac.i32_0, ""); /* vindex */
3111 params[param_count++] = ctx->ac.i32_0; /* voffset */
3112 if (LLVM_VERSION_MAJOR >= 9) {
3113 /* XXX: The new raw/struct atomic intrinsics are buggy
3114 * with LLVM 8, see r358579.
3115 */
3116 params[param_count++] = ctx->ac.i32_0; /* soffset */
3117 params[param_count++] = ctx->ac.i32_0; /* slc */
3118
3119 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3120 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3121 } else {
3122 params[param_count++] = ctx->ac.i1false; /* slc */
3123
3124 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3125 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3126 }
3127
3128 assert(length < sizeof(intrinsic_name));
3129 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3130 params, param_count, 0);
3131 } else {
3132 struct ac_image_args args = {};
3133 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3134 args.atomic = atomic_subop;
3135 args.data[0] = params[0];
3136 if (cmpswap)
3137 args.data[1] = params[1];
3138 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3139 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3140 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3141
3142 result = ac_build_image_opcode(&ctx->ac, &args);
3143 }
3144
3145 result = exit_waterfall(ctx, &wctx, result);
3146 if (ctx->ac.postponed_kill)
3147 ac_build_endif(&ctx->ac, 7004);
3148 return result;
3149 }
3150
3151 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3152 nir_intrinsic_instr *instr)
3153 {
3154 struct waterfall_context wctx;
3155 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3156 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3157
3158 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3159
3160 return exit_waterfall(ctx, &wctx, ret);
3161 }
3162
3163 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3164 const nir_intrinsic_instr *instr,
3165 bool bindless)
3166 {
3167 LLVMValueRef res;
3168
3169 enum glsl_sampler_dim dim;
3170 bool is_array;
3171 if (bindless) {
3172 dim = nir_intrinsic_image_dim(instr);
3173 is_array = nir_intrinsic_image_array(instr);
3174 } else {
3175 const struct glsl_type *type = get_image_deref(instr)->type;
3176 dim = glsl_get_sampler_dim(type);
3177 is_array = glsl_sampler_type_is_array(type);
3178 }
3179
3180 struct waterfall_context wctx;
3181 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3182
3183 if (dim == GLSL_SAMPLER_DIM_BUF) {
3184 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3185 } else {
3186
3187 struct ac_image_args args = { 0 };
3188
3189 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3190 args.dmask = 0xf;
3191 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3192 args.opcode = ac_image_get_resinfo;
3193 assert(nir_src_as_uint(instr->src[1]) == 0);
3194 args.lod = ctx->ac.i32_0;
3195 args.attributes = AC_FUNC_ATTR_READNONE;
3196
3197 res = ac_build_image_opcode(&ctx->ac, &args);
3198
3199 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3200
3201 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3202 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3203 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3204 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3205 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3206 }
3207
3208 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3209 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3210 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3211 ctx->ac.i32_1, "");
3212 }
3213 }
3214 return exit_waterfall(ctx, &wctx, res);
3215 }
3216
3217 static void emit_membar(struct ac_llvm_context *ac,
3218 const nir_intrinsic_instr *instr)
3219 {
3220 unsigned wait_flags = 0;
3221
3222 switch (instr->intrinsic) {
3223 case nir_intrinsic_memory_barrier:
3224 case nir_intrinsic_group_memory_barrier:
3225 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3226 break;
3227 case nir_intrinsic_memory_barrier_buffer:
3228 case nir_intrinsic_memory_barrier_image:
3229 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3230 break;
3231 case nir_intrinsic_memory_barrier_shared:
3232 wait_flags = AC_WAIT_LGKM;
3233 break;
3234 default:
3235 break;
3236 }
3237
3238 ac_build_waitcnt(ac, wait_flags);
3239 }
3240
3241 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3242 {
3243 /* GFX6 only (thanks to a hw bug workaround):
3244 * The real barrier instruction isn’t needed, because an entire patch
3245 * always fits into a single wave.
3246 */
3247 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3248 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3249 return;
3250 }
3251 ac_build_s_barrier(ac);
3252 }
3253
3254 static void emit_discard(struct ac_nir_context *ctx,
3255 const nir_intrinsic_instr *instr)
3256 {
3257 LLVMValueRef cond;
3258
3259 if (instr->intrinsic == nir_intrinsic_discard_if) {
3260 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3261 get_src(ctx, instr->src[0]),
3262 ctx->ac.i32_0, "");
3263 } else {
3264 assert(instr->intrinsic == nir_intrinsic_discard);
3265 cond = ctx->ac.i1false;
3266 }
3267
3268 ac_build_kill_if_false(&ctx->ac, cond);
3269 }
3270
3271 static void emit_demote(struct ac_nir_context *ctx,
3272 const nir_intrinsic_instr *instr)
3273 {
3274 LLVMValueRef cond;
3275
3276 if (instr->intrinsic == nir_intrinsic_demote_if) {
3277 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3278 get_src(ctx, instr->src[0]),
3279 ctx->ac.i32_0, "");
3280 } else {
3281 assert(instr->intrinsic == nir_intrinsic_demote);
3282 cond = ctx->ac.i1false;
3283 }
3284
3285 /* Kill immediately while maintaining WQM. */
3286 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3287
3288 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3289 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3290 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3291 return;
3292 }
3293
3294 static LLVMValueRef
3295 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3296 {
3297 LLVMValueRef result;
3298 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3299 result = LLVMBuildAnd(ctx->ac.builder,
3300 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3301 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3302
3303 if (ctx->ac.wave_size == 32)
3304 result = LLVMBuildLShr(ctx->ac.builder, result,
3305 LLVMConstInt(ctx->ac.i32, 1, false), "");
3306
3307 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3308 }
3309
3310 static LLVMValueRef
3311 visit_load_subgroup_id(struct ac_nir_context *ctx)
3312 {
3313 if (ctx->stage == MESA_SHADER_COMPUTE) {
3314 LLVMValueRef result;
3315 result = LLVMBuildAnd(ctx->ac.builder,
3316 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3317 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3318 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3319 } else {
3320 return LLVMConstInt(ctx->ac.i32, 0, false);
3321 }
3322 }
3323
3324 static LLVMValueRef
3325 visit_load_num_subgroups(struct ac_nir_context *ctx)
3326 {
3327 if (ctx->stage == MESA_SHADER_COMPUTE) {
3328 return LLVMBuildAnd(ctx->ac.builder,
3329 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3330 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3331 } else {
3332 return LLVMConstInt(ctx->ac.i32, 1, false);
3333 }
3334 }
3335
3336 static LLVMValueRef
3337 visit_first_invocation(struct ac_nir_context *ctx)
3338 {
3339 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3340 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3341
3342 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3343 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3344 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3345 ctx->ac.iN_wavemask, args, 2,
3346 AC_FUNC_ATTR_NOUNWIND |
3347 AC_FUNC_ATTR_READNONE);
3348
3349 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3350 }
3351
3352 static LLVMValueRef
3353 visit_load_shared(struct ac_nir_context *ctx,
3354 const nir_intrinsic_instr *instr)
3355 {
3356 LLVMValueRef values[4], derived_ptr, index, ret;
3357
3358 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3359 instr->dest.ssa.bit_size);
3360
3361 for (int chan = 0; chan < instr->num_components; chan++) {
3362 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3363 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3364 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3365 }
3366
3367 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3368 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3369 }
3370
3371 static void
3372 visit_store_shared(struct ac_nir_context *ctx,
3373 const nir_intrinsic_instr *instr)
3374 {
3375 LLVMValueRef derived_ptr, data,index;
3376 LLVMBuilderRef builder = ctx->ac.builder;
3377
3378 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3379 instr->src[0].ssa->bit_size);
3380 LLVMValueRef src = get_src(ctx, instr->src[0]);
3381
3382 int writemask = nir_intrinsic_write_mask(instr);
3383 for (int chan = 0; chan < 4; chan++) {
3384 if (!(writemask & (1 << chan))) {
3385 continue;
3386 }
3387 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3388 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3389 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3390 LLVMBuildStore(builder, data, derived_ptr);
3391 }
3392 }
3393
3394 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3395 const nir_intrinsic_instr *instr,
3396 LLVMValueRef ptr, int src_idx)
3397 {
3398 if (ctx->ac.postponed_kill) {
3399 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3400 ctx->ac.postponed_kill, "");
3401 ac_build_ifcc(&ctx->ac, cond, 7005);
3402 }
3403
3404 LLVMValueRef result;
3405 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3406
3407 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3408
3409 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3410 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3411 if (deref->mode == nir_var_mem_global) {
3412 /* use "singlethread" sync scope to implement relaxed ordering */
3413 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3414
3415 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3416 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3417 }
3418 }
3419
3420 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3421 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3422 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3423 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3424 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3425 } else {
3426 LLVMAtomicRMWBinOp op;
3427 switch (instr->intrinsic) {
3428 case nir_intrinsic_shared_atomic_add:
3429 case nir_intrinsic_deref_atomic_add:
3430 op = LLVMAtomicRMWBinOpAdd;
3431 break;
3432 case nir_intrinsic_shared_atomic_umin:
3433 case nir_intrinsic_deref_atomic_umin:
3434 op = LLVMAtomicRMWBinOpUMin;
3435 break;
3436 case nir_intrinsic_shared_atomic_umax:
3437 case nir_intrinsic_deref_atomic_umax:
3438 op = LLVMAtomicRMWBinOpUMax;
3439 break;
3440 case nir_intrinsic_shared_atomic_imin:
3441 case nir_intrinsic_deref_atomic_imin:
3442 op = LLVMAtomicRMWBinOpMin;
3443 break;
3444 case nir_intrinsic_shared_atomic_imax:
3445 case nir_intrinsic_deref_atomic_imax:
3446 op = LLVMAtomicRMWBinOpMax;
3447 break;
3448 case nir_intrinsic_shared_atomic_and:
3449 case nir_intrinsic_deref_atomic_and:
3450 op = LLVMAtomicRMWBinOpAnd;
3451 break;
3452 case nir_intrinsic_shared_atomic_or:
3453 case nir_intrinsic_deref_atomic_or:
3454 op = LLVMAtomicRMWBinOpOr;
3455 break;
3456 case nir_intrinsic_shared_atomic_xor:
3457 case nir_intrinsic_deref_atomic_xor:
3458 op = LLVMAtomicRMWBinOpXor;
3459 break;
3460 case nir_intrinsic_shared_atomic_exchange:
3461 case nir_intrinsic_deref_atomic_exchange:
3462 op = LLVMAtomicRMWBinOpXchg;
3463 break;
3464 #if LLVM_VERSION_MAJOR >= 10
3465 case nir_intrinsic_shared_atomic_fadd:
3466 case nir_intrinsic_deref_atomic_fadd:
3467 op = LLVMAtomicRMWBinOpFAdd;
3468 break;
3469 #endif
3470 default:
3471 return NULL;
3472 }
3473
3474 LLVMValueRef val;
3475
3476 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3477 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3478 val = ac_to_float(&ctx->ac, src);
3479 } else {
3480 val = ac_to_integer(&ctx->ac, src);
3481 }
3482
3483 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3484 }
3485
3486 if (ctx->ac.postponed_kill)
3487 ac_build_endif(&ctx->ac, 7005);
3488 return result;
3489 }
3490
3491 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3492 {
3493 LLVMValueRef values[2];
3494 LLVMValueRef pos[2];
3495
3496 pos[0] = ac_to_float(&ctx->ac,
3497 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3498 pos[1] = ac_to_float(&ctx->ac,
3499 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3500
3501 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3502 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3503 return ac_build_gather_values(&ctx->ac, values, 2);
3504 }
3505
3506 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3507 enum glsl_interp_mode interp, unsigned location)
3508 {
3509 switch (interp) {
3510 case INTERP_MODE_FLAT:
3511 default:
3512 return NULL;
3513 case INTERP_MODE_SMOOTH:
3514 case INTERP_MODE_NONE:
3515 if (location == INTERP_CENTER)
3516 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3517 else if (location == INTERP_CENTROID)
3518 return ctx->abi->persp_centroid;
3519 else if (location == INTERP_SAMPLE)
3520 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3521 break;
3522 case INTERP_MODE_NOPERSPECTIVE:
3523 if (location == INTERP_CENTER)
3524 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3525 else if (location == INTERP_CENTROID)
3526 return ctx->abi->linear_centroid;
3527 else if (location == INTERP_SAMPLE)
3528 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3529 break;
3530 }
3531 return NULL;
3532 }
3533
3534 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3535 unsigned mode)
3536 {
3537 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3538 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3539 }
3540
3541 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3542 unsigned mode,
3543 LLVMValueRef offset)
3544 {
3545 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3546 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3547 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3548
3549 LLVMValueRef ij_out[2];
3550 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3551
3552 /*
3553 * take the I then J parameters, and the DDX/Y for it, and
3554 * calculate the IJ inputs for the interpolator.
3555 * temp1 = ddx * offset/sample.x + I;
3556 * interp_param.I = ddy * offset/sample.y + temp1;
3557 * temp1 = ddx * offset/sample.x + J;
3558 * interp_param.J = ddy * offset/sample.y + temp1;
3559 */
3560 for (unsigned i = 0; i < 2; i++) {
3561 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3562 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3563 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3564 ddxy_out, ix_ll, "");
3565 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3566 ddxy_out, iy_ll, "");
3567 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3568 interp_param, ix_ll, "");
3569 LLVMValueRef temp1, temp2;
3570
3571 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3572 ctx->ac.f32, "");
3573
3574 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3575 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3576
3577 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3578 temp2, ctx->ac.i32, "");
3579 }
3580 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3581 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3582 }
3583
3584 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3585 unsigned mode)
3586 {
3587 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3588 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3589 }
3590
3591 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3592 unsigned mode,
3593 LLVMValueRef sample_id)
3594 {
3595 if (ctx->abi->interp_at_sample_force_center)
3596 return barycentric_center(ctx, mode);
3597
3598 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3599
3600 /* fetch sample ID */
3601 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3602
3603 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3604 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3605 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3606 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3607 LLVMValueRef coords[] = { src_c0, src_c1 };
3608 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3609
3610 return barycentric_offset(ctx, mode, offset);
3611 }
3612
3613
3614 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3615 unsigned mode)
3616 {
3617 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3618 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3619 }
3620
3621 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3622 {
3623 return LLVMBuildBitCast(ctx->ac.builder,
3624 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3625 ctx->ac.v3i32, "");
3626 }
3627
3628 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3629 LLVMValueRef interp_param,
3630 unsigned index, unsigned comp_start,
3631 unsigned num_components,
3632 unsigned bitsize)
3633 {
3634 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3635 LLVMValueRef interp_param_f;
3636
3637 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3638 interp_param, ctx->ac.v2f32, "");
3639 LLVMValueRef i = LLVMBuildExtractElement(
3640 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3641 LLVMValueRef j = LLVMBuildExtractElement(
3642 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3643
3644 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3645 if (ctx->verified_interp &&
3646 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3647 LLVMValueRef args[2];
3648 args[0] = i;
3649 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3650 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3651 args, 2, AC_FUNC_ATTR_READNONE);
3652 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3653 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3654 }
3655
3656 LLVMValueRef values[4];
3657 assert(bitsize == 16 || bitsize == 32);
3658 for (unsigned comp = 0; comp < num_components; comp++) {
3659 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3660 if (bitsize == 16) {
3661 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3662 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3663 } else {
3664 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3665 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3666 }
3667 }
3668
3669 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3670 }
3671
3672 static LLVMValueRef visit_load(struct ac_nir_context *ctx,
3673 nir_intrinsic_instr *instr, bool is_output)
3674 {
3675 LLVMValueRef values[8];
3676 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
3677 LLVMTypeRef component_type;
3678 unsigned base = nir_intrinsic_base(instr);
3679 unsigned component = nir_intrinsic_component(instr);
3680 unsigned count = instr->dest.ssa.num_components *
3681 (instr->dest.ssa.bit_size == 64 ? 2 : 1);
3682 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
3683 LLVMValueRef vertex_index =
3684 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
3685 nir_src offset = *nir_get_io_offset_src(instr);
3686 LLVMValueRef indir_index = NULL;
3687
3688 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
3689 component_type = LLVMGetElementType(dest_type);
3690 else
3691 component_type = dest_type;
3692
3693 if (nir_src_is_const(offset))
3694 assert(nir_src_as_uint(offset) == 0);
3695 else
3696 indir_index = get_src(ctx, offset);
3697
3698 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
3699 (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) {
3700 LLVMValueRef result =
3701 ctx->abi->load_tess_varyings(ctx->abi, component_type,
3702 vertex_index, indir_index,
3703 0, 0, base * 4,
3704 component,
3705 instr->num_components,
3706 false, false, !is_output);
3707 if (instr->dest.ssa.bit_size == 16) {
3708 result = ac_to_integer(&ctx->ac, result);
3709 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
3710 }
3711 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3712 }
3713
3714 /* No indirect indexing is allowed after this point. */
3715 assert(!indir_index);
3716
3717 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3718 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3719 assert(nir_src_is_const(*vertex_index_src));
3720
3721 return ctx->abi->load_inputs(ctx->abi, 0, base * 4, component,
3722 instr->num_components,
3723 nir_src_as_uint(*vertex_index_src),
3724 0, type);
3725 }
3726
3727 if (ctx->stage == MESA_SHADER_FRAGMENT && is_output &&
3728 nir_intrinsic_io_semantics(instr).fb_fetch_output)
3729 return ctx->abi->emit_fbfetch(ctx->abi);
3730
3731 /* Other non-fragment cases have inputs and outputs in temporaries. */
3732 if (ctx->stage != MESA_SHADER_FRAGMENT) {
3733 for (unsigned chan = component; chan < count + component; chan++) {
3734 if (is_output) {
3735 values[chan] = LLVMBuildLoad(ctx->ac.builder,
3736 ctx->abi->outputs[base * 4 + chan], "");
3737 } else {
3738 values[chan] = ctx->abi->inputs[base * 4 + chan];
3739 if (!values[chan])
3740 values[chan] = LLVMGetUndef(ctx->ac.i32);
3741 }
3742 }
3743 LLVMValueRef result = ac_build_varying_gather_values(&ctx->ac, values, count, component);
3744 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3745 }
3746
3747 /* Fragment shader inputs. */
3748 unsigned vertex_id = 2; /* P0 */
3749
3750 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3751 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3752
3753 switch (src0[0].i32) {
3754 case 0:
3755 vertex_id = 2;
3756 break;
3757 case 1:
3758 vertex_id = 0;
3759 break;
3760 case 2:
3761 vertex_id = 1;
3762 break;
3763 default:
3764 unreachable("Invalid vertex index");
3765 }
3766 }
3767
3768 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, base, false);
3769
3770 for (unsigned chan = 0; chan < count; chan++) {
3771 if (component + chan > 4)
3772 attr_number = LLVMConstInt(ctx->ac.i32, base + 1, false);
3773 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3774 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3775 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3776 llvm_chan,
3777 attr_number,
3778 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3779 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3780 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3781 instr->dest.ssa.bit_size == 16 ? ctx->ac.i16
3782 : ctx->ac.i32, "");
3783 }
3784
3785 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, count);
3786 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3787 }
3788
3789 static void visit_intrinsic(struct ac_nir_context *ctx,
3790 nir_intrinsic_instr *instr)
3791 {
3792 LLVMValueRef result = NULL;
3793
3794 switch (instr->intrinsic) {
3795 case nir_intrinsic_ballot:
3796 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3797 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3798 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3799 break;
3800 case nir_intrinsic_read_invocation:
3801 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3802 get_src(ctx, instr->src[1]));
3803 break;
3804 case nir_intrinsic_read_first_invocation:
3805 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3806 break;
3807 case nir_intrinsic_load_subgroup_invocation:
3808 result = ac_get_thread_id(&ctx->ac);
3809 break;
3810 case nir_intrinsic_load_work_group_id: {
3811 LLVMValueRef values[3];
3812
3813 for (int i = 0; i < 3; i++) {
3814 values[i] = ctx->args->workgroup_ids[i].used ?
3815 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3816 }
3817
3818 result = ac_build_gather_values(&ctx->ac, values, 3);
3819 break;
3820 }
3821 case nir_intrinsic_load_base_vertex:
3822 case nir_intrinsic_load_first_vertex:
3823 result = ctx->abi->load_base_vertex(ctx->abi);
3824 break;
3825 case nir_intrinsic_load_local_group_size:
3826 result = ctx->abi->load_local_group_size(ctx->abi);
3827 break;
3828 case nir_intrinsic_load_vertex_id:
3829 result = LLVMBuildAdd(ctx->ac.builder,
3830 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3831 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3832 break;
3833 case nir_intrinsic_load_vertex_id_zero_base: {
3834 result = ctx->abi->vertex_id;
3835 break;
3836 }
3837 case nir_intrinsic_load_local_invocation_id: {
3838 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3839 break;
3840 }
3841 case nir_intrinsic_load_base_instance:
3842 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3843 break;
3844 case nir_intrinsic_load_draw_id:
3845 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3846 break;
3847 case nir_intrinsic_load_view_index:
3848 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3849 break;
3850 case nir_intrinsic_load_invocation_id:
3851 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3852 result = ac_unpack_param(&ctx->ac,
3853 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3854 8, 5);
3855 } else {
3856 if (ctx->ac.chip_class >= GFX10) {
3857 result = LLVMBuildAnd(ctx->ac.builder,
3858 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3859 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3860 } else {
3861 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3862 }
3863 }
3864 break;
3865 case nir_intrinsic_load_primitive_id:
3866 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3867 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3868 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3869 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3870 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3871 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3872 } else
3873 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3874 break;
3875 case nir_intrinsic_load_sample_id:
3876 result = ac_unpack_param(&ctx->ac,
3877 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3878 8, 4);
3879 break;
3880 case nir_intrinsic_load_sample_pos:
3881 result = load_sample_pos(ctx);
3882 break;
3883 case nir_intrinsic_load_sample_mask_in:
3884 result = ctx->abi->load_sample_mask_in(ctx->abi);
3885 break;
3886 case nir_intrinsic_load_frag_coord: {
3887 LLVMValueRef values[4] = {
3888 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3889 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3890 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3891 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3892 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3893 };
3894 result = ac_to_integer(&ctx->ac,
3895 ac_build_gather_values(&ctx->ac, values, 4));
3896 break;
3897 }
3898 case nir_intrinsic_load_layer_id:
3899 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3900 break;
3901 case nir_intrinsic_load_front_face:
3902 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3903 break;
3904 case nir_intrinsic_load_helper_invocation:
3905 result = ac_build_load_helper_invocation(&ctx->ac);
3906 break;
3907 case nir_intrinsic_is_helper_invocation:
3908 result = ac_build_is_helper_invocation(&ctx->ac);
3909 break;
3910 case nir_intrinsic_load_color0:
3911 result = ctx->abi->color0;
3912 break;
3913 case nir_intrinsic_load_color1:
3914 result = ctx->abi->color1;
3915 break;
3916 case nir_intrinsic_load_user_data_amd:
3917 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3918 result = ctx->abi->user_data;
3919 break;
3920 case nir_intrinsic_load_instance_id:
3921 result = ctx->abi->instance_id;
3922 break;
3923 case nir_intrinsic_load_num_work_groups:
3924 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3925 break;
3926 case nir_intrinsic_load_local_invocation_index:
3927 result = visit_load_local_invocation_index(ctx);
3928 break;
3929 case nir_intrinsic_load_subgroup_id:
3930 result = visit_load_subgroup_id(ctx);
3931 break;
3932 case nir_intrinsic_load_num_subgroups:
3933 result = visit_load_num_subgroups(ctx);
3934 break;
3935 case nir_intrinsic_first_invocation:
3936 result = visit_first_invocation(ctx);
3937 break;
3938 case nir_intrinsic_load_push_constant:
3939 result = visit_load_push_constant(ctx, instr);
3940 break;
3941 case nir_intrinsic_vulkan_resource_index: {
3942 LLVMValueRef index = get_src(ctx, instr->src[0]);
3943 unsigned desc_set = nir_intrinsic_desc_set(instr);
3944 unsigned binding = nir_intrinsic_binding(instr);
3945
3946 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3947 binding);
3948 break;
3949 }
3950 case nir_intrinsic_vulkan_resource_reindex:
3951 result = visit_vulkan_resource_reindex(ctx, instr);
3952 break;
3953 case nir_intrinsic_store_ssbo:
3954 visit_store_ssbo(ctx, instr);
3955 break;
3956 case nir_intrinsic_load_ssbo:
3957 result = visit_load_buffer(ctx, instr);
3958 break;
3959 case nir_intrinsic_ssbo_atomic_add:
3960 case nir_intrinsic_ssbo_atomic_imin:
3961 case nir_intrinsic_ssbo_atomic_umin:
3962 case nir_intrinsic_ssbo_atomic_imax:
3963 case nir_intrinsic_ssbo_atomic_umax:
3964 case nir_intrinsic_ssbo_atomic_and:
3965 case nir_intrinsic_ssbo_atomic_or:
3966 case nir_intrinsic_ssbo_atomic_xor:
3967 case nir_intrinsic_ssbo_atomic_exchange:
3968 case nir_intrinsic_ssbo_atomic_comp_swap:
3969 result = visit_atomic_ssbo(ctx, instr);
3970 break;
3971 case nir_intrinsic_load_ubo:
3972 result = visit_load_ubo_buffer(ctx, instr);
3973 break;
3974 case nir_intrinsic_get_buffer_size:
3975 result = visit_get_buffer_size(ctx, instr);
3976 break;
3977 case nir_intrinsic_load_deref:
3978 result = visit_load_var(ctx, instr);
3979 break;
3980 case nir_intrinsic_store_deref:
3981 visit_store_var(ctx, instr);
3982 break;
3983 case nir_intrinsic_load_input:
3984 case nir_intrinsic_load_input_vertex:
3985 case nir_intrinsic_load_per_vertex_input:
3986 result = visit_load(ctx, instr, false);
3987 break;
3988 case nir_intrinsic_load_output:
3989 case nir_intrinsic_load_per_vertex_output:
3990 result = visit_load(ctx, instr, true);
3991 break;
3992 case nir_intrinsic_store_output:
3993 case nir_intrinsic_store_per_vertex_output:
3994 visit_store_output(ctx, instr);
3995 break;
3996 case nir_intrinsic_load_shared:
3997 result = visit_load_shared(ctx, instr);
3998 break;
3999 case nir_intrinsic_store_shared:
4000 visit_store_shared(ctx, instr);
4001 break;
4002 case nir_intrinsic_bindless_image_samples:
4003 case nir_intrinsic_image_deref_samples:
4004 result = visit_image_samples(ctx, instr);
4005 break;
4006 case nir_intrinsic_bindless_image_load:
4007 result = visit_image_load(ctx, instr, true);
4008 break;
4009 case nir_intrinsic_image_deref_load:
4010 result = visit_image_load(ctx, instr, false);
4011 break;
4012 case nir_intrinsic_bindless_image_store:
4013 visit_image_store(ctx, instr, true);
4014 break;
4015 case nir_intrinsic_image_deref_store:
4016 visit_image_store(ctx, instr, false);
4017 break;
4018 case nir_intrinsic_bindless_image_atomic_add:
4019 case nir_intrinsic_bindless_image_atomic_imin:
4020 case nir_intrinsic_bindless_image_atomic_umin:
4021 case nir_intrinsic_bindless_image_atomic_imax:
4022 case nir_intrinsic_bindless_image_atomic_umax:
4023 case nir_intrinsic_bindless_image_atomic_and:
4024 case nir_intrinsic_bindless_image_atomic_or:
4025 case nir_intrinsic_bindless_image_atomic_xor:
4026 case nir_intrinsic_bindless_image_atomic_exchange:
4027 case nir_intrinsic_bindless_image_atomic_comp_swap:
4028 case nir_intrinsic_bindless_image_atomic_inc_wrap:
4029 case nir_intrinsic_bindless_image_atomic_dec_wrap:
4030 result = visit_image_atomic(ctx, instr, true);
4031 break;
4032 case nir_intrinsic_image_deref_atomic_add:
4033 case nir_intrinsic_image_deref_atomic_imin:
4034 case nir_intrinsic_image_deref_atomic_umin:
4035 case nir_intrinsic_image_deref_atomic_imax:
4036 case nir_intrinsic_image_deref_atomic_umax:
4037 case nir_intrinsic_image_deref_atomic_and:
4038 case nir_intrinsic_image_deref_atomic_or:
4039 case nir_intrinsic_image_deref_atomic_xor:
4040 case nir_intrinsic_image_deref_atomic_exchange:
4041 case nir_intrinsic_image_deref_atomic_comp_swap:
4042 case nir_intrinsic_image_deref_atomic_inc_wrap:
4043 case nir_intrinsic_image_deref_atomic_dec_wrap:
4044 result = visit_image_atomic(ctx, instr, false);
4045 break;
4046 case nir_intrinsic_bindless_image_size:
4047 result = visit_image_size(ctx, instr, true);
4048 break;
4049 case nir_intrinsic_image_deref_size:
4050 result = visit_image_size(ctx, instr, false);
4051 break;
4052 case nir_intrinsic_shader_clock:
4053 result = ac_build_shader_clock(&ctx->ac,
4054 nir_intrinsic_memory_scope(instr));
4055 break;
4056 case nir_intrinsic_discard:
4057 case nir_intrinsic_discard_if:
4058 emit_discard(ctx, instr);
4059 break;
4060 case nir_intrinsic_demote:
4061 case nir_intrinsic_demote_if:
4062 emit_demote(ctx, instr);
4063 break;
4064 case nir_intrinsic_memory_barrier:
4065 case nir_intrinsic_group_memory_barrier:
4066 case nir_intrinsic_memory_barrier_buffer:
4067 case nir_intrinsic_memory_barrier_image:
4068 case nir_intrinsic_memory_barrier_shared:
4069 emit_membar(&ctx->ac, instr);
4070 break;
4071 case nir_intrinsic_scoped_barrier: {
4072 assert(!(nir_intrinsic_memory_semantics(instr) &
4073 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
4074
4075 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
4076
4077 unsigned wait_flags = 0;
4078 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
4079 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
4080 if (modes & nir_var_mem_shared)
4081 wait_flags |= AC_WAIT_LGKM;
4082
4083 if (wait_flags)
4084 ac_build_waitcnt(&ctx->ac, wait_flags);
4085
4086 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
4087 ac_emit_barrier(&ctx->ac, ctx->stage);
4088 break;
4089 }
4090 case nir_intrinsic_memory_barrier_tcs_patch:
4091 break;
4092 case nir_intrinsic_control_barrier:
4093 ac_emit_barrier(&ctx->ac, ctx->stage);
4094 break;
4095 case nir_intrinsic_shared_atomic_add:
4096 case nir_intrinsic_shared_atomic_imin:
4097 case nir_intrinsic_shared_atomic_umin:
4098 case nir_intrinsic_shared_atomic_imax:
4099 case nir_intrinsic_shared_atomic_umax:
4100 case nir_intrinsic_shared_atomic_and:
4101 case nir_intrinsic_shared_atomic_or:
4102 case nir_intrinsic_shared_atomic_xor:
4103 case nir_intrinsic_shared_atomic_exchange:
4104 case nir_intrinsic_shared_atomic_comp_swap:
4105 case nir_intrinsic_shared_atomic_fadd: {
4106 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
4107 instr->src[1].ssa->bit_size);
4108 result = visit_var_atomic(ctx, instr, ptr, 1);
4109 break;
4110 }
4111 case nir_intrinsic_deref_atomic_add:
4112 case nir_intrinsic_deref_atomic_imin:
4113 case nir_intrinsic_deref_atomic_umin:
4114 case nir_intrinsic_deref_atomic_imax:
4115 case nir_intrinsic_deref_atomic_umax:
4116 case nir_intrinsic_deref_atomic_and:
4117 case nir_intrinsic_deref_atomic_or:
4118 case nir_intrinsic_deref_atomic_xor:
4119 case nir_intrinsic_deref_atomic_exchange:
4120 case nir_intrinsic_deref_atomic_comp_swap:
4121 case nir_intrinsic_deref_atomic_fadd: {
4122 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4123 result = visit_var_atomic(ctx, instr, ptr, 1);
4124 break;
4125 }
4126 case nir_intrinsic_load_barycentric_pixel:
4127 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4128 break;
4129 case nir_intrinsic_load_barycentric_centroid:
4130 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4131 break;
4132 case nir_intrinsic_load_barycentric_sample:
4133 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4134 break;
4135 case nir_intrinsic_load_barycentric_model:
4136 result = barycentric_model(ctx);
4137 break;
4138 case nir_intrinsic_load_barycentric_at_offset: {
4139 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4140 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4141 break;
4142 }
4143 case nir_intrinsic_load_barycentric_at_sample: {
4144 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4145 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4146 break;
4147 }
4148 case nir_intrinsic_load_interpolated_input: {
4149 /* We assume any indirect loads have been lowered away */
4150 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4151 assert(offset);
4152 assert(offset[0].i32 == 0);
4153
4154 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4155 unsigned index = nir_intrinsic_base(instr);
4156 unsigned component = nir_intrinsic_component(instr);
4157 result = load_interpolated_input(ctx, interp_param, index,
4158 component,
4159 instr->dest.ssa.num_components,
4160 instr->dest.ssa.bit_size);
4161 break;
4162 }
4163 case nir_intrinsic_emit_vertex:
4164 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4165 break;
4166 case nir_intrinsic_emit_vertex_with_counter: {
4167 unsigned stream = nir_intrinsic_stream_id(instr);
4168 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4169 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4170 next_vertex,
4171 ctx->abi->outputs);
4172 break;
4173 }
4174 case nir_intrinsic_end_primitive:
4175 case nir_intrinsic_end_primitive_with_counter:
4176 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4177 break;
4178 case nir_intrinsic_load_tess_coord:
4179 result = ctx->abi->load_tess_coord(ctx->abi);
4180 break;
4181 case nir_intrinsic_load_tess_level_outer:
4182 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4183 break;
4184 case nir_intrinsic_load_tess_level_inner:
4185 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4186 break;
4187 case nir_intrinsic_load_tess_level_outer_default:
4188 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4189 break;
4190 case nir_intrinsic_load_tess_level_inner_default:
4191 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4192 break;
4193 case nir_intrinsic_load_patch_vertices_in:
4194 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4195 break;
4196 case nir_intrinsic_vote_all: {
4197 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4198 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4199 break;
4200 }
4201 case nir_intrinsic_vote_any: {
4202 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4203 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4204 break;
4205 }
4206 case nir_intrinsic_shuffle:
4207 if (ctx->ac.chip_class == GFX8 ||
4208 ctx->ac.chip_class == GFX9 ||
4209 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4210 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4211 get_src(ctx, instr->src[1]));
4212 } else {
4213 LLVMValueRef src = get_src(ctx, instr->src[0]);
4214 LLVMValueRef index = get_src(ctx, instr->src[1]);
4215 LLVMTypeRef type = LLVMTypeOf(src);
4216 struct waterfall_context wctx;
4217 LLVMValueRef index_val;
4218
4219 index_val = enter_waterfall(ctx, &wctx, index, true);
4220
4221 src = LLVMBuildZExt(ctx->ac.builder, src,
4222 ctx->ac.i32, "");
4223
4224 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4225 ctx->ac.i32,
4226 (LLVMValueRef []) { src, index_val }, 2,
4227 AC_FUNC_ATTR_READNONE |
4228 AC_FUNC_ATTR_CONVERGENT);
4229
4230 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4231
4232 result = exit_waterfall(ctx, &wctx, result);
4233 }
4234 break;
4235 case nir_intrinsic_reduce:
4236 result = ac_build_reduce(&ctx->ac,
4237 get_src(ctx, instr->src[0]),
4238 instr->const_index[0],
4239 instr->const_index[1]);
4240 break;
4241 case nir_intrinsic_inclusive_scan:
4242 result = ac_build_inclusive_scan(&ctx->ac,
4243 get_src(ctx, instr->src[0]),
4244 instr->const_index[0]);
4245 break;
4246 case nir_intrinsic_exclusive_scan:
4247 result = ac_build_exclusive_scan(&ctx->ac,
4248 get_src(ctx, instr->src[0]),
4249 instr->const_index[0]);
4250 break;
4251 case nir_intrinsic_quad_broadcast: {
4252 unsigned lane = nir_src_as_uint(instr->src[1]);
4253 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4254 lane, lane, lane, lane);
4255 break;
4256 }
4257 case nir_intrinsic_quad_swap_horizontal:
4258 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4259 break;
4260 case nir_intrinsic_quad_swap_vertical:
4261 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4262 break;
4263 case nir_intrinsic_quad_swap_diagonal:
4264 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4265 break;
4266 case nir_intrinsic_quad_swizzle_amd: {
4267 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4268 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4269 mask & 0x3, (mask >> 2) & 0x3,
4270 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4271 break;
4272 }
4273 case nir_intrinsic_masked_swizzle_amd: {
4274 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4275 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4276 break;
4277 }
4278 case nir_intrinsic_write_invocation_amd:
4279 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4280 get_src(ctx, instr->src[1]),
4281 get_src(ctx, instr->src[2]));
4282 break;
4283 case nir_intrinsic_mbcnt_amd:
4284 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4285 break;
4286 case nir_intrinsic_load_scratch: {
4287 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4288 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4289 offset);
4290 LLVMTypeRef comp_type =
4291 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4292 LLVMTypeRef vec_type =
4293 instr->dest.ssa.num_components == 1 ? comp_type :
4294 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4295 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4296 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4297 LLVMPointerType(vec_type, addr_space), "");
4298 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4299 break;
4300 }
4301 case nir_intrinsic_store_scratch: {
4302 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4303 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4304 offset);
4305 LLVMTypeRef comp_type =
4306 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4307 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4308 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4309 LLVMPointerType(comp_type, addr_space), "");
4310 LLVMValueRef src = get_src(ctx, instr->src[0]);
4311 unsigned wrmask = nir_intrinsic_write_mask(instr);
4312 while (wrmask) {
4313 int start, count;
4314 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4315
4316 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4317 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4318 LLVMTypeRef vec_type =
4319 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4320 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4321 offset_ptr,
4322 LLVMPointerType(vec_type, addr_space),
4323 "");
4324 LLVMValueRef offset_src =
4325 ac_extract_components(&ctx->ac, src, start, count);
4326 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4327 }
4328 break;
4329 }
4330 case nir_intrinsic_load_constant: {
4331 unsigned base = nir_intrinsic_base(instr);
4332 unsigned range = nir_intrinsic_range(instr);
4333
4334 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4335 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4336 LLVMConstInt(ctx->ac.i32, base, false), "");
4337
4338 /* Clamp the offset to avoid out-of-bound access because global
4339 * instructions can't handle them.
4340 */
4341 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4342 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4343 offset, size, "");
4344 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4345
4346 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4347 offset);
4348 LLVMTypeRef comp_type =
4349 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4350 LLVMTypeRef vec_type =
4351 instr->dest.ssa.num_components == 1 ? comp_type :
4352 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4353 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4354 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4355 LLVMPointerType(vec_type, addr_space), "");
4356 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4357 break;
4358 }
4359 default:
4360 fprintf(stderr, "Unknown intrinsic: ");
4361 nir_print_instr(&instr->instr, stderr);
4362 fprintf(stderr, "\n");
4363 break;
4364 }
4365 if (result) {
4366 ctx->ssa_defs[instr->dest.ssa.index] = result;
4367 }
4368 }
4369
4370 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4371 unsigned base_index,
4372 unsigned constant_index,
4373 LLVMValueRef dynamic_index)
4374 {
4375 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4376 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4377 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4378
4379 /* Bindless uniforms are 64bit so multiple index by 8 */
4380 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4381 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4382
4383 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4384
4385 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4386 NULL, 0, 0, true, true);
4387
4388 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4389 }
4390
4391 struct sampler_desc_address {
4392 unsigned descriptor_set;
4393 unsigned base_index; /* binding in vulkan */
4394 unsigned constant_index;
4395 LLVMValueRef dynamic_index;
4396 bool image;
4397 bool bindless;
4398 };
4399
4400 static struct sampler_desc_address
4401 get_sampler_desc_internal(struct ac_nir_context *ctx,
4402 nir_deref_instr *deref_instr,
4403 const nir_instr *instr,
4404 bool image)
4405 {
4406 LLVMValueRef index = NULL;
4407 unsigned constant_index = 0;
4408 unsigned descriptor_set;
4409 unsigned base_index;
4410 bool bindless = false;
4411
4412 if (!deref_instr) {
4413 descriptor_set = 0;
4414 if (image) {
4415 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4416 base_index = 0;
4417 bindless = true;
4418 index = get_src(ctx, img_instr->src[0]);
4419 } else {
4420 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4421 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4422 nir_tex_src_sampler_handle);
4423 if (sampSrcIdx != -1) {
4424 base_index = 0;
4425 bindless = true;
4426 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4427 } else {
4428 assert(tex_instr && !image);
4429 base_index = tex_instr->sampler_index;
4430 }
4431 }
4432 } else {
4433 while(deref_instr->deref_type != nir_deref_type_var) {
4434 if (deref_instr->deref_type == nir_deref_type_array) {
4435 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4436 if (!array_size)
4437 array_size = 1;
4438
4439 if (nir_src_is_const(deref_instr->arr.index)) {
4440 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4441 } else {
4442 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4443
4444 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4445 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4446
4447 if (!index)
4448 index = indirect;
4449 else
4450 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4451 }
4452
4453 deref_instr = nir_src_as_deref(deref_instr->parent);
4454 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4455 unsigned sidx = deref_instr->strct.index;
4456 deref_instr = nir_src_as_deref(deref_instr->parent);
4457 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4458 } else {
4459 unreachable("Unsupported deref type");
4460 }
4461 }
4462 descriptor_set = deref_instr->var->data.descriptor_set;
4463
4464 if (deref_instr->var->data.bindless) {
4465 /* For now just assert on unhandled variable types */
4466 assert(deref_instr->var->data.mode == nir_var_uniform);
4467
4468 base_index = deref_instr->var->data.driver_location;
4469 bindless = true;
4470
4471 index = index ? index : ctx->ac.i32_0;
4472 index = get_bindless_index_from_uniform(ctx, base_index,
4473 constant_index, index);
4474 } else
4475 base_index = deref_instr->var->data.binding;
4476 }
4477 return (struct sampler_desc_address) {
4478 .descriptor_set = descriptor_set,
4479 .base_index = base_index,
4480 .constant_index = constant_index,
4481 .dynamic_index = index,
4482 .image = image,
4483 .bindless = bindless,
4484 };
4485 }
4486
4487 /* Extract any possibly divergent index into a separate value that can be fed
4488 * into get_sampler_desc with the same arguments. */
4489 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4490 nir_deref_instr *deref_instr,
4491 const nir_instr *instr,
4492 bool image)
4493 {
4494 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4495 return addr.dynamic_index;
4496 }
4497
4498 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4499 nir_deref_instr *deref_instr,
4500 enum ac_descriptor_type desc_type,
4501 const nir_instr *instr,
4502 LLVMValueRef index,
4503 bool image, bool write)
4504 {
4505 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4506 return ctx->abi->load_sampler_desc(ctx->abi,
4507 addr.descriptor_set,
4508 addr.base_index,
4509 addr.constant_index, index,
4510 desc_type, addr.image, write, addr.bindless);
4511 }
4512
4513 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4514 *
4515 * GFX6-GFX7:
4516 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4517 * filtering manually. The driver sets img7 to a mask clearing
4518 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4519 * s_and_b32 samp0, samp0, img7
4520 *
4521 * GFX8:
4522 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4523 */
4524 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4525 LLVMValueRef res, LLVMValueRef samp)
4526 {
4527 LLVMBuilderRef builder = ctx->ac.builder;
4528 LLVMValueRef img7, samp0;
4529
4530 if (ctx->ac.chip_class >= GFX8)
4531 return samp;
4532
4533 img7 = LLVMBuildExtractElement(builder, res,
4534 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4535 samp0 = LLVMBuildExtractElement(builder, samp,
4536 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4537 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4538 return LLVMBuildInsertElement(builder, samp, samp0,
4539 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4540 }
4541
4542 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4543 nir_tex_instr *instr,
4544 struct waterfall_context *wctx,
4545 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4546 LLVMValueRef *fmask_ptr)
4547 {
4548 nir_deref_instr *texture_deref_instr = NULL;
4549 nir_deref_instr *sampler_deref_instr = NULL;
4550 int plane = -1;
4551
4552 for (unsigned i = 0; i < instr->num_srcs; i++) {
4553 switch (instr->src[i].src_type) {
4554 case nir_tex_src_texture_deref:
4555 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4556 break;
4557 case nir_tex_src_sampler_deref:
4558 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4559 break;
4560 case nir_tex_src_plane:
4561 plane = nir_src_as_int(instr->src[i].src);
4562 break;
4563 default:
4564 break;
4565 }
4566 }
4567
4568 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4569 &instr->instr, false);
4570 if (!sampler_deref_instr)
4571 sampler_deref_instr = texture_deref_instr;
4572
4573 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4574 &instr->instr, false);
4575 if (instr->texture_non_uniform)
4576 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4577
4578 if (instr->sampler_non_uniform)
4579 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4580
4581 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4582
4583 if (plane >= 0) {
4584 assert(instr->op != nir_texop_txf_ms &&
4585 instr->op != nir_texop_samples_identical);
4586 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4587
4588 main_descriptor = AC_DESC_PLANE_0 + plane;
4589 }
4590
4591 if (instr->op == nir_texop_fragment_mask_fetch) {
4592 /* The fragment mask is fetched from the compressed
4593 * multisampled surface.
4594 */
4595 main_descriptor = AC_DESC_FMASK;
4596 }
4597
4598 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4599 texture_dynamic_index, false, false);
4600
4601 if (samp_ptr) {
4602 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4603 sampler_dynamic_index, false, false);
4604 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4605 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4606 }
4607 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4608 instr->op == nir_texop_samples_identical))
4609 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4610 &instr->instr, texture_dynamic_index, false, false);
4611 }
4612
4613 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4614 LLVMValueRef coord)
4615 {
4616 coord = ac_to_float(ctx, coord);
4617 coord = ac_build_round(ctx, coord);
4618 coord = ac_to_integer(ctx, coord);
4619 return coord;
4620 }
4621
4622 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4623 {
4624 LLVMValueRef result = NULL;
4625 struct ac_image_args args = { 0 };
4626 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4627 LLVMValueRef ddx = NULL, ddy = NULL;
4628 unsigned offset_src = 0;
4629 struct waterfall_context wctx[2] = {{{0}}};
4630
4631 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4632
4633 for (unsigned i = 0; i < instr->num_srcs; i++) {
4634 switch (instr->src[i].src_type) {
4635 case nir_tex_src_coord: {
4636 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4637 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4638 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4639 break;
4640 }
4641 case nir_tex_src_projector:
4642 break;
4643 case nir_tex_src_comparator:
4644 if (instr->is_shadow) {
4645 args.compare = get_src(ctx, instr->src[i].src);
4646 args.compare = ac_to_float(&ctx->ac, args.compare);
4647 }
4648 break;
4649 case nir_tex_src_offset:
4650 args.offset = get_src(ctx, instr->src[i].src);
4651 offset_src = i;
4652 break;
4653 case nir_tex_src_bias:
4654 args.bias = get_src(ctx, instr->src[i].src);
4655 break;
4656 case nir_tex_src_lod: {
4657 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4658 args.level_zero = true;
4659 else
4660 args.lod = get_src(ctx, instr->src[i].src);
4661 break;
4662 }
4663 case nir_tex_src_ms_index:
4664 sample_index = get_src(ctx, instr->src[i].src);
4665 break;
4666 case nir_tex_src_ms_mcs:
4667 break;
4668 case nir_tex_src_ddx:
4669 ddx = get_src(ctx, instr->src[i].src);
4670 break;
4671 case nir_tex_src_ddy:
4672 ddy = get_src(ctx, instr->src[i].src);
4673 break;
4674 case nir_tex_src_min_lod:
4675 args.min_lod = get_src(ctx, instr->src[i].src);
4676 break;
4677 case nir_tex_src_texture_offset:
4678 case nir_tex_src_sampler_offset:
4679 case nir_tex_src_plane:
4680 default:
4681 break;
4682 }
4683 }
4684
4685 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4686 result = get_buffer_size(ctx, args.resource, true);
4687 goto write_result;
4688 }
4689
4690 if (instr->op == nir_texop_texture_samples) {
4691 LLVMValueRef res, samples, is_msaa;
4692 LLVMValueRef default_sample;
4693
4694 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4695 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4696 LLVMConstInt(ctx->ac.i32, 3, false), "");
4697 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4698 LLVMConstInt(ctx->ac.i32, 28, false), "");
4699 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4700 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4701 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4702 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4703
4704 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4705 LLVMConstInt(ctx->ac.i32, 16, false), "");
4706 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4707 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4708 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4709 samples, "");
4710
4711 if (ctx->abi->robust_buffer_access) {
4712 LLVMValueRef dword1, is_null_descriptor;
4713
4714 /* Extract the second dword of the descriptor, if it's
4715 * all zero, then it's a null descriptor.
4716 */
4717 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4718 LLVMConstInt(ctx->ac.i32, 1, false), "");
4719 is_null_descriptor =
4720 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4721 LLVMConstInt(ctx->ac.i32, 0, false), "");
4722 default_sample =
4723 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4724 ctx->ac.i32_0, ctx->ac.i32_1, "");
4725 } else {
4726 default_sample = ctx->ac.i32_1;
4727 }
4728
4729 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4730 default_sample, "");
4731 result = samples;
4732 goto write_result;
4733 }
4734
4735 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4736 LLVMValueRef offset[3], pack;
4737 for (unsigned chan = 0; chan < 3; ++chan)
4738 offset[chan] = ctx->ac.i32_0;
4739
4740 unsigned num_components = ac_get_llvm_num_components(args.offset);
4741 for (unsigned chan = 0; chan < num_components; chan++) {
4742 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4743 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4744 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4745 if (chan)
4746 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4747 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4748 }
4749 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4750 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4751 args.offset = pack;
4752 }
4753
4754 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4755 * OpenGL 4.5 spec says:
4756 *
4757 * "If the texture’s internal format indicates a fixed-point
4758 * depth texture, then D_t and D_ref are clamped to the
4759 * range [0, 1]; otherwise no clamping is performed."
4760 *
4761 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4762 * so the depth comparison value isn't clamped for Z16 and
4763 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4764 * an explicitly clamped 32-bit float format.
4765 */
4766 if (args.compare &&
4767 ctx->ac.chip_class >= GFX8 &&
4768 ctx->ac.chip_class <= GFX9 &&
4769 ctx->abi->clamp_shadow_reference) {
4770 LLVMValueRef upgraded, clamped;
4771
4772 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4773 LLVMConstInt(ctx->ac.i32, 3, false), "");
4774 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4775 LLVMConstInt(ctx->ac.i32, 29, false), "");
4776 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4777 clamped = ac_build_clamp(&ctx->ac, args.compare);
4778 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4779 args.compare, "");
4780 }
4781
4782 /* pack derivatives */
4783 if (ddx || ddy) {
4784 int num_src_deriv_channels, num_dest_deriv_channels;
4785 switch (instr->sampler_dim) {
4786 case GLSL_SAMPLER_DIM_3D:
4787 case GLSL_SAMPLER_DIM_CUBE:
4788 num_src_deriv_channels = 3;
4789 num_dest_deriv_channels = 3;
4790 break;
4791 case GLSL_SAMPLER_DIM_2D:
4792 default:
4793 num_src_deriv_channels = 2;
4794 num_dest_deriv_channels = 2;
4795 break;
4796 case GLSL_SAMPLER_DIM_1D:
4797 num_src_deriv_channels = 1;
4798 if (ctx->ac.chip_class == GFX9) {
4799 num_dest_deriv_channels = 2;
4800 } else {
4801 num_dest_deriv_channels = 1;
4802 }
4803 break;
4804 }
4805
4806 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4807 args.derivs[i] = ac_to_float(&ctx->ac,
4808 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4809 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4810 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4811 }
4812 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4813 args.derivs[i] = ctx->ac.f32_0;
4814 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4815 }
4816 }
4817
4818 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4819 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4820 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4821 if (instr->coord_components == 3)
4822 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4823 ac_prepare_cube_coords(&ctx->ac,
4824 instr->op == nir_texop_txd, instr->is_array,
4825 instr->op == nir_texop_lod, args.coords, args.derivs);
4826 }
4827
4828 /* Texture coordinates fixups */
4829 if (instr->coord_components > 1 &&
4830 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4831 instr->is_array &&
4832 instr->op != nir_texop_txf) {
4833 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4834 }
4835
4836 if (instr->coord_components > 2 &&
4837 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4838 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4839 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4840 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4841 instr->is_array &&
4842 instr->op != nir_texop_txf &&
4843 instr->op != nir_texop_txf_ms &&
4844 instr->op != nir_texop_fragment_fetch &&
4845 instr->op != nir_texop_fragment_mask_fetch) {
4846 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4847 }
4848
4849 if (ctx->ac.chip_class == GFX9 &&
4850 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4851 instr->op != nir_texop_lod) {
4852 LLVMValueRef filler;
4853 if (instr->op == nir_texop_txf)
4854 filler = ctx->ac.i32_0;
4855 else
4856 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4857
4858 if (instr->is_array)
4859 args.coords[2] = args.coords[1];
4860 args.coords[1] = filler;
4861 }
4862
4863 /* Pack sample index */
4864 if (sample_index && (instr->op == nir_texop_txf_ms ||
4865 instr->op == nir_texop_fragment_fetch))
4866 args.coords[instr->coord_components] = sample_index;
4867
4868 if (instr->op == nir_texop_samples_identical) {
4869 struct ac_image_args txf_args = { 0 };
4870 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4871
4872 txf_args.dmask = 0xf;
4873 txf_args.resource = fmask_ptr;
4874 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4875 result = build_tex_intrinsic(ctx, instr, &txf_args);
4876
4877 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4878 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4879 goto write_result;
4880 }
4881
4882 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4883 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4884 instr->op != nir_texop_txs &&
4885 instr->op != nir_texop_fragment_fetch &&
4886 instr->op != nir_texop_fragment_mask_fetch) {
4887 unsigned sample_chan = instr->is_array ? 3 : 2;
4888 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4889 &ctx->ac, args.coords[0], args.coords[1],
4890 instr->is_array ? args.coords[2] : NULL,
4891 args.coords[sample_chan], fmask_ptr);
4892 }
4893
4894 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4895 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4896 num_offsets = MIN2(num_offsets, instr->coord_components);
4897 for (unsigned i = 0; i < num_offsets; ++i) {
4898 args.coords[i] = LLVMBuildAdd(
4899 ctx->ac.builder, args.coords[i],
4900 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4901 }
4902 args.offset = NULL;
4903 }
4904
4905 /* DMASK was repurposed for GATHER4. 4 components are always
4906 * returned and DMASK works like a swizzle - it selects
4907 * the component to fetch. The only valid DMASK values are
4908 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4909 * (red,red,red,red) etc.) The ISA document doesn't mention
4910 * this.
4911 */
4912 args.dmask = 0xf;
4913 if (instr->op == nir_texop_tg4) {
4914 if (instr->is_shadow)
4915 args.dmask = 1;
4916 else
4917 args.dmask = 1 << instr->component;
4918 }
4919
4920 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4921 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4922 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4923 }
4924
4925 /* Adjust the number of coordinates because we only need (x,y) for 2D
4926 * multisampled images and (x,y,layer) for 2D multisampled layered
4927 * images or for multisampled input attachments.
4928 */
4929 if (instr->op == nir_texop_fragment_mask_fetch) {
4930 if (args.dim == ac_image_2dmsaa) {
4931 args.dim = ac_image_2d;
4932 } else {
4933 assert(args.dim == ac_image_2darraymsaa);
4934 args.dim = ac_image_2darray;
4935 }
4936 }
4937
4938 assert(instr->dest.is_ssa);
4939 args.d16 = instr->dest.ssa.bit_size == 16;
4940
4941 result = build_tex_intrinsic(ctx, instr, &args);
4942
4943 if (instr->op == nir_texop_query_levels)
4944 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4945 else if (instr->is_shadow && instr->is_new_style_shadow &&
4946 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4947 instr->op != nir_texop_tg4)
4948 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4949 else if (instr->op == nir_texop_txs &&
4950 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4951 instr->is_array) {
4952 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4953 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4954 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4955 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4956 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4957 } else if (ctx->ac.chip_class == GFX9 &&
4958 instr->op == nir_texop_txs &&
4959 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4960 instr->is_array) {
4961 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4962 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4963 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4964 ctx->ac.i32_1, "");
4965 } else if (instr->dest.ssa.num_components != 4)
4966 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4967
4968 write_result:
4969 if (result) {
4970 assert(instr->dest.is_ssa);
4971 result = ac_to_integer(&ctx->ac, result);
4972
4973 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4974 result = exit_waterfall(ctx, wctx + i, result);
4975 }
4976
4977 ctx->ssa_defs[instr->dest.ssa.index] = result;
4978 }
4979 }
4980
4981 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4982 {
4983 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4984 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4985
4986 ctx->ssa_defs[instr->dest.ssa.index] = result;
4987 _mesa_hash_table_insert(ctx->phis, instr, result);
4988 }
4989
4990 static void visit_post_phi(struct ac_nir_context *ctx,
4991 nir_phi_instr *instr,
4992 LLVMValueRef llvm_phi)
4993 {
4994 nir_foreach_phi_src(src, instr) {
4995 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4996 LLVMValueRef llvm_src = get_src(ctx, src->src);
4997
4998 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4999 }
5000 }
5001
5002 static void phi_post_pass(struct ac_nir_context *ctx)
5003 {
5004 hash_table_foreach(ctx->phis, entry) {
5005 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
5006 (LLVMValueRef)entry->data);
5007 }
5008 }
5009
5010
5011 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
5012 nir_foreach_use(use_src, def) {
5013 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
5014 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
5015 if (instr->intrinsic == nir_intrinsic_store_deref)
5016 return true;
5017 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
5018 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
5019 if (instr->op == nir_op_vec4 &&
5020 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
5021 return true;
5022 }
5023 }
5024 }
5025 return false;
5026 }
5027
5028 static void visit_ssa_undef(struct ac_nir_context *ctx,
5029 const nir_ssa_undef_instr *instr)
5030 {
5031 unsigned num_components = instr->def.num_components;
5032 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
5033
5034 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
5035 LLVMValueRef undef;
5036
5037 if (num_components == 1)
5038 undef = LLVMGetUndef(type);
5039 else {
5040 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
5041 }
5042 ctx->ssa_defs[instr->def.index] = undef;
5043 } else {
5044 LLVMValueRef zero = LLVMConstInt(type, 0, false);
5045 if (num_components > 1) {
5046 zero = ac_build_gather_values_extended(
5047 &ctx->ac, &zero, 4, 0, false, false);
5048 }
5049 ctx->ssa_defs[instr->def.index] = zero;
5050 }
5051 }
5052
5053 static void visit_jump(struct ac_llvm_context *ctx,
5054 const nir_jump_instr *instr)
5055 {
5056 switch (instr->type) {
5057 case nir_jump_break:
5058 ac_build_break(ctx);
5059 break;
5060 case nir_jump_continue:
5061 ac_build_continue(ctx);
5062 break;
5063 default:
5064 fprintf(stderr, "Unknown NIR jump instr: ");
5065 nir_print_instr(&instr->instr, stderr);
5066 fprintf(stderr, "\n");
5067 abort();
5068 }
5069 }
5070
5071 static LLVMTypeRef
5072 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
5073 enum glsl_base_type type)
5074 {
5075 switch (type) {
5076 case GLSL_TYPE_INT:
5077 case GLSL_TYPE_UINT:
5078 case GLSL_TYPE_BOOL:
5079 case GLSL_TYPE_SUBROUTINE:
5080 return ac->i32;
5081 case GLSL_TYPE_INT8:
5082 case GLSL_TYPE_UINT8:
5083 return ac->i8;
5084 case GLSL_TYPE_INT16:
5085 case GLSL_TYPE_UINT16:
5086 return ac->i16;
5087 case GLSL_TYPE_FLOAT:
5088 return ac->f32;
5089 case GLSL_TYPE_FLOAT16:
5090 return ac->f16;
5091 case GLSL_TYPE_INT64:
5092 case GLSL_TYPE_UINT64:
5093 return ac->i64;
5094 case GLSL_TYPE_DOUBLE:
5095 return ac->f64;
5096 default:
5097 unreachable("unknown GLSL type");
5098 }
5099 }
5100
5101 static LLVMTypeRef
5102 glsl_to_llvm_type(struct ac_llvm_context *ac,
5103 const struct glsl_type *type)
5104 {
5105 if (glsl_type_is_scalar(type)) {
5106 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
5107 }
5108
5109 if (glsl_type_is_vector(type)) {
5110 return LLVMVectorType(
5111 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5112 glsl_get_vector_elements(type));
5113 }
5114
5115 if (glsl_type_is_matrix(type)) {
5116 return LLVMArrayType(
5117 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5118 glsl_get_matrix_columns(type));
5119 }
5120
5121 if (glsl_type_is_array(type)) {
5122 return LLVMArrayType(
5123 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5124 glsl_get_length(type));
5125 }
5126
5127 assert(glsl_type_is_struct_or_ifc(type));
5128
5129 LLVMTypeRef member_types[glsl_get_length(type)];
5130
5131 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5132 member_types[i] =
5133 glsl_to_llvm_type(ac,
5134 glsl_get_struct_field(type, i));
5135 }
5136
5137 return LLVMStructTypeInContext(ac->context, member_types,
5138 glsl_get_length(type), false);
5139 }
5140
5141 static void visit_deref(struct ac_nir_context *ctx,
5142 nir_deref_instr *instr)
5143 {
5144 if (instr->mode != nir_var_mem_shared &&
5145 instr->mode != nir_var_mem_global)
5146 return;
5147
5148 LLVMValueRef result = NULL;
5149 switch(instr->deref_type) {
5150 case nir_deref_type_var: {
5151 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5152 result = entry->data;
5153 break;
5154 }
5155 case nir_deref_type_struct:
5156 if (instr->mode == nir_var_mem_global) {
5157 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5158 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5159 instr->strct.index);
5160 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5161 LLVMConstInt(ctx->ac.i32, offset, 0));
5162 } else {
5163 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5164 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5165 }
5166 break;
5167 case nir_deref_type_array:
5168 if (instr->mode == nir_var_mem_global) {
5169 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5170 unsigned stride = glsl_get_explicit_stride(parent->type);
5171
5172 if ((glsl_type_is_matrix(parent->type) &&
5173 glsl_matrix_type_is_row_major(parent->type)) ||
5174 (glsl_type_is_vector(parent->type) && stride == 0))
5175 stride = type_scalar_size_bytes(parent->type);
5176
5177 assert(stride > 0);
5178 LLVMValueRef index = get_src(ctx, instr->arr.index);
5179 if (LLVMTypeOf(index) != ctx->ac.i64)
5180 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5181
5182 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5183
5184 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5185 } else {
5186 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5187 get_src(ctx, instr->arr.index));
5188 }
5189 break;
5190 case nir_deref_type_ptr_as_array:
5191 if (instr->mode == nir_var_mem_global) {
5192 unsigned stride = nir_deref_instr_array_stride(instr);
5193
5194 LLVMValueRef index = get_src(ctx, instr->arr.index);
5195 if (LLVMTypeOf(index) != ctx->ac.i64)
5196 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5197
5198 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5199
5200 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5201 } else {
5202 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5203 get_src(ctx, instr->arr.index));
5204 }
5205 break;
5206 case nir_deref_type_cast: {
5207 result = get_src(ctx, instr->parent);
5208
5209 /* We can't use the structs from LLVM because the shader
5210 * specifies its own offsets. */
5211 LLVMTypeRef pointee_type = ctx->ac.i8;
5212 if (instr->mode == nir_var_mem_shared)
5213 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5214
5215 unsigned address_space;
5216
5217 switch(instr->mode) {
5218 case nir_var_mem_shared:
5219 address_space = AC_ADDR_SPACE_LDS;
5220 break;
5221 case nir_var_mem_global:
5222 address_space = AC_ADDR_SPACE_GLOBAL;
5223 break;
5224 default:
5225 unreachable("Unhandled address space");
5226 }
5227
5228 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5229
5230 if (LLVMTypeOf(result) != type) {
5231 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5232 result = LLVMBuildBitCast(ctx->ac.builder, result,
5233 type, "");
5234 } else {
5235 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5236 type, "");
5237 }
5238 }
5239 break;
5240 }
5241 default:
5242 unreachable("Unhandled deref_instr deref type");
5243 }
5244
5245 ctx->ssa_defs[instr->dest.ssa.index] = result;
5246 }
5247
5248 static void visit_cf_list(struct ac_nir_context *ctx,
5249 struct exec_list *list);
5250
5251 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5252 {
5253 nir_foreach_instr(instr, block)
5254 {
5255 switch (instr->type) {
5256 case nir_instr_type_alu:
5257 visit_alu(ctx, nir_instr_as_alu(instr));
5258 break;
5259 case nir_instr_type_load_const:
5260 visit_load_const(ctx, nir_instr_as_load_const(instr));
5261 break;
5262 case nir_instr_type_intrinsic:
5263 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5264 break;
5265 case nir_instr_type_tex:
5266 visit_tex(ctx, nir_instr_as_tex(instr));
5267 break;
5268 case nir_instr_type_phi:
5269 visit_phi(ctx, nir_instr_as_phi(instr));
5270 break;
5271 case nir_instr_type_ssa_undef:
5272 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5273 break;
5274 case nir_instr_type_jump:
5275 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5276 break;
5277 case nir_instr_type_deref:
5278 visit_deref(ctx, nir_instr_as_deref(instr));
5279 break;
5280 default:
5281 fprintf(stderr, "Unknown NIR instr type: ");
5282 nir_print_instr(instr, stderr);
5283 fprintf(stderr, "\n");
5284 abort();
5285 }
5286 }
5287
5288 _mesa_hash_table_insert(ctx->defs, block,
5289 LLVMGetInsertBlock(ctx->ac.builder));
5290 }
5291
5292 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5293 {
5294 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5295
5296 nir_block *then_block =
5297 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5298
5299 ac_build_uif(&ctx->ac, value, then_block->index);
5300
5301 visit_cf_list(ctx, &if_stmt->then_list);
5302
5303 if (!exec_list_is_empty(&if_stmt->else_list)) {
5304 nir_block *else_block =
5305 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5306
5307 ac_build_else(&ctx->ac, else_block->index);
5308 visit_cf_list(ctx, &if_stmt->else_list);
5309 }
5310
5311 ac_build_endif(&ctx->ac, then_block->index);
5312 }
5313
5314 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5315 {
5316 nir_block *first_loop_block =
5317 (nir_block *) exec_list_get_head(&loop->body);
5318
5319 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5320
5321 visit_cf_list(ctx, &loop->body);
5322
5323 ac_build_endloop(&ctx->ac, first_loop_block->index);
5324 }
5325
5326 static void visit_cf_list(struct ac_nir_context *ctx,
5327 struct exec_list *list)
5328 {
5329 foreach_list_typed(nir_cf_node, node, node, list)
5330 {
5331 switch (node->type) {
5332 case nir_cf_node_block:
5333 visit_block(ctx, nir_cf_node_as_block(node));
5334 break;
5335
5336 case nir_cf_node_if:
5337 visit_if(ctx, nir_cf_node_as_if(node));
5338 break;
5339
5340 case nir_cf_node_loop:
5341 visit_loop(ctx, nir_cf_node_as_loop(node));
5342 break;
5343
5344 default:
5345 assert(0);
5346 }
5347 }
5348 }
5349
5350 void
5351 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5352 struct ac_shader_abi *abi,
5353 struct nir_shader *nir,
5354 struct nir_variable *variable,
5355 gl_shader_stage stage)
5356 {
5357 unsigned output_loc = variable->data.driver_location / 4;
5358 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5359
5360 /* tess ctrl has it's own load/store paths for outputs */
5361 if (stage == MESA_SHADER_TESS_CTRL)
5362 return;
5363
5364 if (stage == MESA_SHADER_VERTEX ||
5365 stage == MESA_SHADER_TESS_EVAL ||
5366 stage == MESA_SHADER_GEOMETRY) {
5367 int idx = variable->data.location + variable->data.index;
5368 if (idx == VARYING_SLOT_CLIP_DIST0) {
5369 int length = nir->info.clip_distance_array_size +
5370 nir->info.cull_distance_array_size;
5371
5372 if (length > 4)
5373 attrib_count = 2;
5374 else
5375 attrib_count = 1;
5376 }
5377 }
5378
5379 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5380 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5381 for (unsigned i = 0; i < attrib_count; ++i) {
5382 for (unsigned chan = 0; chan < 4; chan++) {
5383 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5384 ac_build_alloca_undef(ctx, type, "");
5385 }
5386 }
5387 }
5388
5389 static void
5390 setup_locals(struct ac_nir_context *ctx,
5391 struct nir_function *func)
5392 {
5393 int i, j;
5394 ctx->num_locals = 0;
5395 nir_foreach_function_temp_variable(variable, func->impl) {
5396 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5397 variable->data.driver_location = ctx->num_locals * 4;
5398 variable->data.location_frac = 0;
5399 ctx->num_locals += attrib_count;
5400 }
5401 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5402 if (!ctx->locals)
5403 return;
5404
5405 for (i = 0; i < ctx->num_locals; i++) {
5406 for (j = 0; j < 4; j++) {
5407 ctx->locals[i * 4 + j] =
5408 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5409 }
5410 }
5411 }
5412
5413 static void
5414 setup_scratch(struct ac_nir_context *ctx,
5415 struct nir_shader *shader)
5416 {
5417 if (shader->scratch_size == 0)
5418 return;
5419
5420 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5421 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5422 "scratch");
5423 }
5424
5425 static void
5426 setup_constant_data(struct ac_nir_context *ctx,
5427 struct nir_shader *shader)
5428 {
5429 if (!shader->constant_data)
5430 return;
5431
5432 LLVMValueRef data =
5433 LLVMConstStringInContext(ctx->ac.context,
5434 shader->constant_data,
5435 shader->constant_data_size,
5436 true);
5437 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5438
5439 /* We want to put the constant data in the CONST address space so that
5440 * we can use scalar loads. However, LLVM versions before 10 put these
5441 * variables in the same section as the code, which is unacceptable
5442 * for RadeonSI as it needs to relocate all the data sections after
5443 * the code sections. See https://reviews.llvm.org/D65813.
5444 */
5445 unsigned address_space =
5446 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5447
5448 LLVMValueRef global =
5449 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5450 "const_data",
5451 address_space);
5452
5453 LLVMSetInitializer(global, data);
5454 LLVMSetGlobalConstant(global, true);
5455 LLVMSetVisibility(global, LLVMHiddenVisibility);
5456 ctx->constant_data = global;
5457 }
5458
5459 static void
5460 setup_shared(struct ac_nir_context *ctx,
5461 struct nir_shader *nir)
5462 {
5463 if (ctx->ac.lds)
5464 return;
5465
5466 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5467 nir->info.cs.shared_size);
5468
5469 LLVMValueRef lds =
5470 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5471 "compute_lds",
5472 AC_ADDR_SPACE_LDS);
5473 LLVMSetAlignment(lds, 64 * 1024);
5474
5475 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5476 LLVMPointerType(ctx->ac.i8,
5477 AC_ADDR_SPACE_LDS), "");
5478 }
5479
5480 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5481 const struct ac_shader_args *args, struct nir_shader *nir)
5482 {
5483 struct ac_nir_context ctx = {};
5484 struct nir_function *func;
5485
5486 ctx.ac = *ac;
5487 ctx.abi = abi;
5488 ctx.args = args;
5489
5490 ctx.stage = nir->info.stage;
5491 ctx.info = &nir->info;
5492
5493 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5494
5495 /* TODO: remove this after RADV switches to lowered IO */
5496 if (!nir->info.io_lowered) {
5497 nir_foreach_shader_out_variable(variable, nir) {
5498 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5499 ctx.stage);
5500 }
5501 }
5502
5503 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5504 _mesa_key_pointer_equal);
5505 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5506 _mesa_key_pointer_equal);
5507 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5508 _mesa_key_pointer_equal);
5509
5510 if (ctx.abi->kill_ps_if_inf_interp)
5511 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5512 _mesa_key_pointer_equal);
5513
5514 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5515
5516 nir_index_ssa_defs(func->impl);
5517 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5518
5519 setup_locals(&ctx, func);
5520 setup_scratch(&ctx, nir);
5521 setup_constant_data(&ctx, nir);
5522
5523 if (gl_shader_stage_is_compute(nir->info.stage))
5524 setup_shared(&ctx, nir);
5525
5526 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5527 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5528 /* true = don't kill. */
5529 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5530 }
5531
5532 visit_cf_list(&ctx, &func->impl->body);
5533 phi_post_pass(&ctx);
5534
5535 if (ctx.ac.postponed_kill)
5536 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5537 ctx.ac.postponed_kill, ""));
5538
5539 if (!gl_shader_stage_is_compute(nir->info.stage))
5540 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5541 ctx.abi->outputs);
5542
5543 free(ctx.locals);
5544 free(ctx.ssa_defs);
5545 ralloc_free(ctx.defs);
5546 ralloc_free(ctx.phis);
5547 ralloc_free(ctx.vars);
5548 if (ctx.abi->kill_ps_if_inf_interp)
5549 ralloc_free(ctx.verified_interp);
5550 }
5551
5552 bool
5553 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5554 {
5555 bool progress = false;
5556
5557 /* Lower large variables to scratch first so that we won't bloat the
5558 * shader by generating large if ladders for them. We later lower
5559 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5560 */
5561 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5562 nir_var_function_temp,
5563 256,
5564 glsl_get_natural_size_align_bytes);
5565
5566 /* While it would be nice not to have this flag, we are constrained
5567 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5568 */
5569 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5570
5571 /* TODO: Indirect indexing of GS inputs is unimplemented.
5572 *
5573 * TCS and TES load inputs directly from LDS or offchip memory, so
5574 * indirect indexing is trivial.
5575 */
5576 nir_variable_mode indirect_mask = 0;
5577 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5578 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5579 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5580 !llvm_has_working_vgpr_indexing)) {
5581 indirect_mask |= nir_var_shader_in;
5582 }
5583 if (!llvm_has_working_vgpr_indexing &&
5584 nir->info.stage != MESA_SHADER_TESS_CTRL)
5585 indirect_mask |= nir_var_shader_out;
5586
5587 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5588 * smart enough to handle indirects without causing excess spilling
5589 * causing the gpu to hang.
5590 *
5591 * See the following thread for more details of the problem:
5592 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5593 */
5594 indirect_mask |= nir_var_function_temp;
5595
5596 progress |= nir_lower_indirect_derefs(nir, indirect_mask, UINT32_MAX);
5597 return progress;
5598 }
5599
5600 static unsigned
5601 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5602 {
5603 if (intrin->intrinsic != nir_intrinsic_store_output)
5604 return 0;
5605
5606 unsigned writemask = nir_intrinsic_write_mask(intrin) <<
5607 nir_intrinsic_component(intrin);
5608 unsigned location = nir_intrinsic_io_semantics(intrin).location;
5609
5610 if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5611 return writemask << 4;
5612 else if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5613 return writemask;
5614
5615 return 0;
5616 }
5617
5618 static void
5619 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5620 unsigned *cond_block_tf_writemask,
5621 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5622 {
5623 switch (cf_node->type) {
5624 case nir_cf_node_block: {
5625 nir_block *block = nir_cf_node_as_block(cf_node);
5626 nir_foreach_instr(instr, block) {
5627 if (instr->type != nir_instr_type_intrinsic)
5628 continue;
5629
5630 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5631 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5632
5633 /* If we find a barrier in nested control flow put this in the
5634 * too hard basket. In GLSL this is not possible but it is in
5635 * SPIR-V.
5636 */
5637 if (is_nested_cf) {
5638 *tessfactors_are_def_in_all_invocs = false;
5639 return;
5640 }
5641
5642 /* The following case must be prevented:
5643 * gl_TessLevelInner = ...;
5644 * barrier();
5645 * if (gl_InvocationID == 1)
5646 * gl_TessLevelInner = ...;
5647 *
5648 * If you consider disjoint code segments separated by barriers, each
5649 * such segment that writes tess factor channels should write the same
5650 * channels in all codepaths within that segment.
5651 */
5652 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5653 /* Accumulate the result: */
5654 *tessfactors_are_def_in_all_invocs &=
5655 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5656
5657 /* Analyze the next code segment from scratch. */
5658 *upper_block_tf_writemask = 0;
5659 *cond_block_tf_writemask = 0;
5660 }
5661 } else
5662 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5663 }
5664
5665 break;
5666 }
5667 case nir_cf_node_if: {
5668 unsigned then_tessfactor_writemask = 0;
5669 unsigned else_tessfactor_writemask = 0;
5670
5671 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5672 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5673 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5674 cond_block_tf_writemask,
5675 tessfactors_are_def_in_all_invocs, true);
5676 }
5677
5678 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5679 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5680 cond_block_tf_writemask,
5681 tessfactors_are_def_in_all_invocs, true);
5682 }
5683
5684 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5685 /* If both statements write the same tess factor channels,
5686 * we can say that the upper block writes them too.
5687 */
5688 *upper_block_tf_writemask |= then_tessfactor_writemask &
5689 else_tessfactor_writemask;
5690 *cond_block_tf_writemask |= then_tessfactor_writemask |
5691 else_tessfactor_writemask;
5692 }
5693
5694 break;
5695 }
5696 case nir_cf_node_loop: {
5697 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5698 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5699 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5700 cond_block_tf_writemask,
5701 tessfactors_are_def_in_all_invocs, true);
5702 }
5703
5704 break;
5705 }
5706 default:
5707 unreachable("unknown cf node type");
5708 }
5709 }
5710
5711 bool
5712 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5713 {
5714 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5715
5716 /* The pass works as follows:
5717 * If all codepaths write tess factors, we can say that all
5718 * invocations define tess factors.
5719 *
5720 * Each tess factor channel is tracked separately.
5721 */
5722 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5723 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5724
5725 /* Initial value = true. Here the pass will accumulate results from
5726 * multiple segments surrounded by barriers. If tess factors aren't
5727 * written at all, it's a shader bug and we don't care if this will be
5728 * true.
5729 */
5730 bool tessfactors_are_def_in_all_invocs = true;
5731
5732 nir_foreach_function(function, nir) {
5733 if (function->impl) {
5734 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5735 scan_tess_ctrl(node, &main_block_tf_writemask,
5736 &cond_block_tf_writemask,
5737 &tessfactors_are_def_in_all_invocs,
5738 false);
5739 }
5740 }
5741 }
5742
5743 /* Accumulate the result for the last code segment separated by a
5744 * barrier.
5745 */
5746 if (main_block_tf_writemask || cond_block_tf_writemask) {
5747 tessfactors_are_def_in_all_invocs &=
5748 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5749 }
5750
5751 return tessfactors_are_def_in_all_invocs;
5752 }