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[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_1f_param_scalar(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0)
223 {
224 if (LLVMGetTypeKind(result_type) != LLVMVectorTypeKind)
225 return emit_intrin_1f_param(ctx, intrin, result_type, src0);
226
227 LLVMTypeRef elem_type = LLVMGetElementType(result_type);
228 LLVMValueRef ret = LLVMGetUndef(result_type);
229
230 /* Scalarize the intrinsic, because vectors are not supported. */
231 for (unsigned i = 0; i < LLVMGetVectorSize(result_type); i++) {
232 char name[64], type[64];
233 LLVMValueRef params[] = {
234 ac_to_float(ctx, ac_llvm_extract_elem(ctx, src0, i)),
235 };
236
237 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
238 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
239 assert(length < sizeof(name));
240 ret = LLVMBuildInsertElement(ctx->builder, ret,
241 ac_build_intrinsic(ctx, name, elem_type, params,
242 1, AC_FUNC_ATTR_READNONE),
243 LLVMConstInt(ctx->i32, i, 0), "");
244 }
245 return ret;
246 }
247
248 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
249 const char *intrin,
250 LLVMTypeRef result_type,
251 LLVMValueRef src0, LLVMValueRef src1)
252 {
253 char name[64], type[64];
254 LLVMValueRef params[] = {
255 ac_to_float(ctx, src0),
256 ac_to_float(ctx, src1),
257 };
258
259 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
260 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
261 assert(length < sizeof(name));
262 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
263 }
264
265 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMTypeRef result_type,
268 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
269 {
270 char name[64], type[64];
271 LLVMValueRef params[] = {
272 ac_to_float(ctx, src0),
273 ac_to_float(ctx, src1),
274 ac_to_float(ctx, src2),
275 };
276
277 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
278 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
279 assert(length < sizeof(name));
280 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
281 }
282
283 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
284 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
285 {
286 LLVMTypeRef src1_type = LLVMTypeOf(src1);
287 LLVMTypeRef src2_type = LLVMTypeOf(src2);
288
289 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
290 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
291 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
292 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
293 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
294 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
295 }
296
297 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
298 LLVMConstNull(LLVMTypeOf(src0)), "");
299 return LLVMBuildSelect(ctx->builder, v,
300 ac_to_integer_or_pointer(ctx, src1),
301 ac_to_integer_or_pointer(ctx, src2), "");
302 }
303
304 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
305 LLVMValueRef src0)
306 {
307 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
308 }
309
310 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
311 const char *intrin,
312 LLVMValueRef src0, LLVMValueRef src1)
313 {
314 LLVMTypeRef ret_type;
315 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
316 LLVMValueRef res;
317 LLVMValueRef params[] = { src0, src1 };
318 ret_type = LLVMStructTypeInContext(ctx->context, types,
319 2, true);
320
321 res = ac_build_intrinsic(ctx, intrin, ret_type,
322 params, 2, AC_FUNC_ATTR_READNONE);
323
324 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
325 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
326 return res;
327 }
328
329 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
330 LLVMValueRef src0,
331 unsigned bitsize)
332 {
333 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
334 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
335 "");
336 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
337
338 switch (bitsize) {
339 case 16:
340 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
341 case 32:
342 return result;
343 case 64:
344 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
345 default:
346 unreachable("Unsupported bit size.");
347 }
348 }
349
350 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
351 LLVMValueRef src0)
352 {
353 src0 = ac_to_float(ctx, src0);
354 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
355 return LLVMBuildSExt(ctx->builder,
356 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
357 ctx->i32, "");
358 }
359
360 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
361 LLVMValueRef src0,
362 unsigned bitsize)
363 {
364 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
365
366 switch (bitsize) {
367 case 8:
368 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
369 case 16:
370 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
371 case 32:
372 return result;
373 case 64:
374 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
375 default:
376 unreachable("Unsupported bit size.");
377 }
378 }
379
380 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
381 LLVMValueRef src0)
382 {
383 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
384 return LLVMBuildSExt(ctx->builder,
385 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
386 ctx->i32, "");
387 }
388
389 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
390 LLVMValueRef src0)
391 {
392 LLVMValueRef result;
393 LLVMValueRef cond = NULL;
394
395 src0 = ac_to_float(ctx, src0);
396 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
397
398 if (ctx->chip_class >= GFX8) {
399 LLVMValueRef args[2];
400 /* Check if the result is a denormal - and flush to 0 if so. */
401 args[0] = result;
402 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
403 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
404 }
405
406 /* need to convert back up to f32 */
407 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
408
409 if (ctx->chip_class >= GFX8)
410 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
411 else {
412 /* for GFX6-GFX7 */
413 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
414 * so compare the result and flush to 0 if it's smaller.
415 */
416 LLVMValueRef temp, cond2;
417 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
418 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
419 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
420 temp, "");
421 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
422 temp, ctx->f32_0, "");
423 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
424 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
425 }
426 return result;
427 }
428
429 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
430 LLVMValueRef src0, LLVMValueRef src1)
431 {
432 LLVMValueRef dst64, result;
433 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
434 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
435
436 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
437 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
438 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
439 return result;
440 }
441
442 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
443 LLVMValueRef src0, LLVMValueRef src1)
444 {
445 LLVMValueRef dst64, result;
446 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
447 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
448
449 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
450 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
451 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
452 return result;
453 }
454
455 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
456 LLVMValueRef bits, LLVMValueRef offset)
457 {
458 /* mask = ((1 << bits) - 1) << offset */
459 return LLVMBuildShl(ctx->builder,
460 LLVMBuildSub(ctx->builder,
461 LLVMBuildShl(ctx->builder,
462 ctx->i32_1,
463 bits, ""),
464 ctx->i32_1, ""),
465 offset, "");
466 }
467
468 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
469 LLVMValueRef mask, LLVMValueRef insert,
470 LLVMValueRef base)
471 {
472 /* Calculate:
473 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
474 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
475 */
476 return LLVMBuildXor(ctx->builder, base,
477 LLVMBuildAnd(ctx->builder, mask,
478 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
479 }
480
481 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
482 LLVMValueRef src0,
483 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
484 LLVMValueRef args[2]))
485 {
486 LLVMValueRef comp[2];
487
488 src0 = ac_to_float(ctx, src0);
489 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
490 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
491
492 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
493 }
494
495 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
496 LLVMValueRef src0)
497 {
498 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
499 LLVMValueRef temps[2], val;
500 int i;
501
502 for (i = 0; i < 2; i++) {
503 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
504 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
505 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
506 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
507 }
508 return ac_build_gather_values(ctx, temps, 2);
509 }
510
511 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
512 nir_op op,
513 LLVMValueRef src0)
514 {
515 unsigned mask;
516 int idx;
517 LLVMValueRef result;
518
519 if (op == nir_op_fddx_fine)
520 mask = AC_TID_MASK_LEFT;
521 else if (op == nir_op_fddy_fine)
522 mask = AC_TID_MASK_TOP;
523 else
524 mask = AC_TID_MASK_TOP_LEFT;
525
526 /* for DDX we want to next X pixel, DDY next Y pixel. */
527 if (op == nir_op_fddx_fine ||
528 op == nir_op_fddx_coarse ||
529 op == nir_op_fddx)
530 idx = 1;
531 else
532 idx = 2;
533
534 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
535 return result;
536 }
537
538 struct waterfall_context {
539 LLVMBasicBlockRef phi_bb[2];
540 bool use_waterfall;
541 };
542
543 /* To deal with divergent descriptors we can create a loop that handles all
544 * lanes with the same descriptor on a given iteration (henceforth a
545 * waterfall loop).
546 *
547 * These helper create the begin and end of the loop leaving the caller
548 * to implement the body.
549 *
550 * params:
551 * - ctx is the usal nir context
552 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
553 * - value is the possibly divergent value for which we built the loop
554 * - divergent is whether value is actually divergent. If false we just pass
555 * things through.
556 */
557 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
558 struct waterfall_context *wctx,
559 LLVMValueRef value, bool divergent)
560 {
561 /* If the app claims the value is divergent but it is constant we can
562 * end up with a dynamic index of NULL. */
563 if (!value)
564 divergent = false;
565
566 wctx->use_waterfall = divergent;
567 if (!divergent)
568 return value;
569
570 ac_build_bgnloop(&ctx->ac, 6000);
571
572 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
573
574 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
575 scalar_value, "uniform_active");
576
577 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
578 ac_build_ifcc(&ctx->ac, active, 6001);
579
580 return scalar_value;
581 }
582
583 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
584 struct waterfall_context *wctx,
585 LLVMValueRef value)
586 {
587 LLVMValueRef ret = NULL;
588 LLVMValueRef phi_src[2];
589 LLVMValueRef cc_phi_src[2] = {
590 LLVMConstInt(ctx->ac.i32, 0, false),
591 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
592 };
593
594 if (!wctx->use_waterfall)
595 return value;
596
597 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
598
599 ac_build_endif(&ctx->ac, 6001);
600
601 if (value) {
602 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
603 phi_src[1] = value;
604
605 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
606 }
607
608 /*
609 * By using the optimization barrier on the exit decision, we decouple
610 * the operations from the break, and hence avoid LLVM hoisting the
611 * opteration into the break block.
612 */
613 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
614 ac_build_optimization_barrier(&ctx->ac, &cc);
615
616 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
617 ac_build_ifcc(&ctx->ac, active, 6002);
618 ac_build_break(&ctx->ac);
619 ac_build_endif(&ctx->ac, 6002);
620
621 ac_build_endloop(&ctx->ac, 6000);
622 return ret;
623 }
624
625 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
626 {
627 LLVMValueRef src[4], result = NULL;
628 unsigned num_components = instr->dest.dest.ssa.num_components;
629 unsigned src_components;
630 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
631
632 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
633 switch (instr->op) {
634 case nir_op_vec2:
635 case nir_op_vec3:
636 case nir_op_vec4:
637 src_components = 1;
638 break;
639 case nir_op_pack_half_2x16:
640 case nir_op_pack_snorm_2x16:
641 case nir_op_pack_unorm_2x16:
642 src_components = 2;
643 break;
644 case nir_op_unpack_half_2x16:
645 src_components = 1;
646 break;
647 case nir_op_cube_face_coord:
648 case nir_op_cube_face_index:
649 src_components = 3;
650 break;
651 default:
652 src_components = num_components;
653 break;
654 }
655 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
656 src[i] = get_alu_src(ctx, instr->src[i], src_components);
657
658 switch (instr->op) {
659 case nir_op_mov:
660 result = src[0];
661 break;
662 case nir_op_fneg:
663 src[0] = ac_to_float(&ctx->ac, src[0]);
664 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
665 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
666 /* fneg will be optimized by backend compiler with sign
667 * bit removed via XOR. This is probably a LLVM bug.
668 */
669 result = ac_build_canonicalize(&ctx->ac, result,
670 instr->dest.dest.ssa.bit_size);
671 }
672 break;
673 case nir_op_ineg:
674 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
675 break;
676 case nir_op_inot:
677 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
678 break;
679 case nir_op_iadd:
680 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_fadd:
683 src[0] = ac_to_float(&ctx->ac, src[0]);
684 src[1] = ac_to_float(&ctx->ac, src[1]);
685 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
686 break;
687 case nir_op_fsub:
688 src[0] = ac_to_float(&ctx->ac, src[0]);
689 src[1] = ac_to_float(&ctx->ac, src[1]);
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
691 break;
692 case nir_op_isub:
693 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_imul:
696 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_imod:
699 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_umod:
702 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
703 break;
704 case nir_op_irem:
705 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
706 break;
707 case nir_op_idiv:
708 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
709 break;
710 case nir_op_udiv:
711 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
712 break;
713 case nir_op_fmul:
714 src[0] = ac_to_float(&ctx->ac, src[0]);
715 src[1] = ac_to_float(&ctx->ac, src[1]);
716 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
717 break;
718 case nir_op_frcp:
719 /* For doubles, we need precise division to pass GLCTS. */
720 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
721 ac_get_type_size(def_type) == 8) {
722 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
723 ac_to_float(&ctx->ac, src[0]), "");
724 } else {
725 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rcp",
726 ac_to_float_type(&ctx->ac, def_type), src[0]);
727 }
728 if (ctx->abi->clamp_div_by_zero)
729 result = ac_build_fmin(&ctx->ac, result,
730 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
731 break;
732 case nir_op_iand:
733 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
734 break;
735 case nir_op_ior:
736 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
737 break;
738 case nir_op_ixor:
739 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
740 break;
741 case nir_op_ishl:
742 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
743 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
744 LLVMTypeOf(src[0]), "");
745 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
746 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
747 LLVMTypeOf(src[0]), "");
748 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
749 break;
750 case nir_op_ishr:
751 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
752 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
753 LLVMTypeOf(src[0]), "");
754 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
755 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
756 LLVMTypeOf(src[0]), "");
757 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
758 break;
759 case nir_op_ushr:
760 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
761 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
762 LLVMTypeOf(src[0]), "");
763 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
764 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
765 LLVMTypeOf(src[0]), "");
766 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
767 break;
768 case nir_op_ilt32:
769 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
770 break;
771 case nir_op_ine32:
772 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
773 break;
774 case nir_op_ieq32:
775 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
776 break;
777 case nir_op_ige32:
778 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
779 break;
780 case nir_op_ult32:
781 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
782 break;
783 case nir_op_uge32:
784 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
785 break;
786 case nir_op_feq32:
787 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
788 break;
789 case nir_op_fneu32:
790 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
791 break;
792 case nir_op_flt32:
793 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
794 break;
795 case nir_op_fge32:
796 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
797 break;
798 case nir_op_fabs:
799 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
800 ac_to_float_type(&ctx->ac, def_type), src[0]);
801 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
802 /* fabs will be optimized by backend compiler with sign
803 * bit removed via AND.
804 */
805 result = ac_build_canonicalize(&ctx->ac, result,
806 instr->dest.dest.ssa.bit_size);
807 }
808 break;
809 case nir_op_iabs:
810 result = emit_iabs(&ctx->ac, src[0]);
811 break;
812 case nir_op_imax:
813 result = ac_build_imax(&ctx->ac, src[0], src[1]);
814 break;
815 case nir_op_imin:
816 result = ac_build_imin(&ctx->ac, src[0], src[1]);
817 break;
818 case nir_op_umax:
819 result = ac_build_umax(&ctx->ac, src[0], src[1]);
820 break;
821 case nir_op_umin:
822 result = ac_build_umin(&ctx->ac, src[0], src[1]);
823 break;
824 case nir_op_isign:
825 result = ac_build_isign(&ctx->ac, src[0],
826 instr->dest.dest.ssa.bit_size);
827 break;
828 case nir_op_fsign:
829 src[0] = ac_to_float(&ctx->ac, src[0]);
830 result = ac_build_fsign(&ctx->ac, src[0],
831 instr->dest.dest.ssa.bit_size);
832 break;
833 case nir_op_ffloor:
834 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
835 ac_to_float_type(&ctx->ac, def_type), src[0]);
836 break;
837 case nir_op_ftrunc:
838 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
839 ac_to_float_type(&ctx->ac, def_type), src[0]);
840 break;
841 case nir_op_fceil:
842 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
843 ac_to_float_type(&ctx->ac, def_type), src[0]);
844 break;
845 case nir_op_fround_even:
846 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
847 ac_to_float_type(&ctx->ac, def_type),src[0]);
848 break;
849 case nir_op_ffract:
850 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.fract",
851 ac_to_float_type(&ctx->ac, def_type), src[0]);
852 break;
853 case nir_op_fsin:
854 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
855 ac_to_float_type(&ctx->ac, def_type), src[0]);
856 break;
857 case nir_op_fcos:
858 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
859 ac_to_float_type(&ctx->ac, def_type), src[0]);
860 break;
861 case nir_op_fsqrt:
862 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
863 ac_to_float_type(&ctx->ac, def_type), src[0]);
864 break;
865 case nir_op_fexp2:
866 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
867 ac_to_float_type(&ctx->ac, def_type), src[0]);
868 break;
869 case nir_op_flog2:
870 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
871 ac_to_float_type(&ctx->ac, def_type), src[0]);
872 break;
873 case nir_op_frsq:
874 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rsq",
875 ac_to_float_type(&ctx->ac, def_type), src[0]);
876 if (ctx->abi->clamp_div_by_zero)
877 result = ac_build_fmin(&ctx->ac, result,
878 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
879 break;
880 case nir_op_frexp_exp:
881 src[0] = ac_to_float(&ctx->ac, src[0]);
882 result = ac_build_frexp_exp(&ctx->ac, src[0],
883 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
884 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
885 result = LLVMBuildSExt(ctx->ac.builder, result,
886 ctx->ac.i32, "");
887 break;
888 case nir_op_frexp_sig:
889 src[0] = ac_to_float(&ctx->ac, src[0]);
890 result = ac_build_frexp_mant(&ctx->ac, src[0],
891 instr->dest.dest.ssa.bit_size);
892 break;
893 case nir_op_fpow:
894 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
895 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
896 break;
897 case nir_op_fmax:
898 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
899 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
900 if (ctx->ac.chip_class < GFX9 &&
901 instr->dest.dest.ssa.bit_size == 32) {
902 /* Only pre-GFX9 chips do not flush denorms. */
903 result = ac_build_canonicalize(&ctx->ac, result,
904 instr->dest.dest.ssa.bit_size);
905 }
906 break;
907 case nir_op_fmin:
908 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
909 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
910 if (ctx->ac.chip_class < GFX9 &&
911 instr->dest.dest.ssa.bit_size == 32) {
912 /* Only pre-GFX9 chips do not flush denorms. */
913 result = ac_build_canonicalize(&ctx->ac, result,
914 instr->dest.dest.ssa.bit_size);
915 }
916 break;
917 case nir_op_ffma:
918 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
919 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
920 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
921 break;
922 case nir_op_ldexp:
923 src[0] = ac_to_float(&ctx->ac, src[0]);
924 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
925 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
926 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
927 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
928 else
929 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
930 break;
931 case nir_op_bfm:
932 result = emit_bfm(&ctx->ac, src[0], src[1]);
933 break;
934 case nir_op_bitfield_select:
935 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
936 break;
937 case nir_op_ubfe:
938 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
939 break;
940 case nir_op_ibfe:
941 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
942 break;
943 case nir_op_bitfield_reverse:
944 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
945 break;
946 case nir_op_bit_count:
947 result = ac_build_bit_count(&ctx->ac, src[0]);
948 break;
949 case nir_op_vec2:
950 case nir_op_vec3:
951 case nir_op_vec4:
952 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
953 src[i] = ac_to_integer(&ctx->ac, src[i]);
954 result = ac_build_gather_values(&ctx->ac, src, num_components);
955 break;
956 case nir_op_f2i8:
957 case nir_op_f2i16:
958 case nir_op_f2i32:
959 case nir_op_f2i64:
960 src[0] = ac_to_float(&ctx->ac, src[0]);
961 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
962 break;
963 case nir_op_f2u8:
964 case nir_op_f2u16:
965 case nir_op_f2u32:
966 case nir_op_f2u64:
967 src[0] = ac_to_float(&ctx->ac, src[0]);
968 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
969 break;
970 case nir_op_i2f16:
971 case nir_op_i2f32:
972 case nir_op_i2f64:
973 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
974 break;
975 case nir_op_u2f16:
976 case nir_op_u2f32:
977 case nir_op_u2f64:
978 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
979 break;
980 case nir_op_f2f16_rtz:
981 case nir_op_f2f16:
982 case nir_op_f2fmp:
983 src[0] = ac_to_float(&ctx->ac, src[0]);
984
985 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
986 * all f32->f16 conversions have to round towards zero, because both scalar
987 * and vec2 down-conversions have to round equally.
988 */
989 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
990 instr->op == nir_op_f2f16_rtz) {
991 src[0] = ac_to_float(&ctx->ac, src[0]);
992
993 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
994 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
995
996 /* Fast path conversion. This only works if NIR is vectorized
997 * to vec2 16.
998 */
999 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
1000 LLVMValueRef args[] = {
1001 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
1002 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
1003 };
1004 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
1005 break;
1006 }
1007
1008 assert(ac_get_llvm_num_components(src[0]) == 1);
1009 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
1010 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
1011 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
1012 } else {
1013 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1014 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1015 else
1016 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1017 }
1018 break;
1019 case nir_op_f2f16_rtne:
1020 case nir_op_f2f32:
1021 case nir_op_f2f64:
1022 src[0] = ac_to_float(&ctx->ac, src[0]);
1023 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1024 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1025 else
1026 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1027 break;
1028 case nir_op_u2u8:
1029 case nir_op_u2u16:
1030 case nir_op_u2ump:
1031 case nir_op_u2u32:
1032 case nir_op_u2u64:
1033 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1034 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1035 else
1036 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1037 break;
1038 case nir_op_i2i8:
1039 case nir_op_i2i16:
1040 case nir_op_i2imp:
1041 case nir_op_i2i32:
1042 case nir_op_i2i64:
1043 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1044 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1045 else
1046 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1047 break;
1048 case nir_op_b32csel:
1049 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1050 break;
1051 case nir_op_find_lsb:
1052 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1053 break;
1054 case nir_op_ufind_msb:
1055 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1056 break;
1057 case nir_op_ifind_msb:
1058 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1059 break;
1060 case nir_op_uadd_carry:
1061 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1062 break;
1063 case nir_op_usub_borrow:
1064 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1065 break;
1066 case nir_op_b2f16:
1067 case nir_op_b2f32:
1068 case nir_op_b2f64:
1069 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1070 break;
1071 case nir_op_f2b32:
1072 result = emit_f2b(&ctx->ac, src[0]);
1073 break;
1074 case nir_op_b2i8:
1075 case nir_op_b2i16:
1076 case nir_op_b2i32:
1077 case nir_op_b2i64:
1078 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1079 break;
1080 case nir_op_i2b32:
1081 result = emit_i2b(&ctx->ac, src[0]);
1082 break;
1083 case nir_op_fquantize2f16:
1084 result = emit_f2f16(&ctx->ac, src[0]);
1085 break;
1086 case nir_op_umul_high:
1087 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1088 break;
1089 case nir_op_imul_high:
1090 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1091 break;
1092 case nir_op_pack_half_2x16:
1093 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1094 break;
1095 case nir_op_pack_snorm_2x16:
1096 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1097 break;
1098 case nir_op_pack_unorm_2x16:
1099 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1100 break;
1101 case nir_op_unpack_half_2x16:
1102 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1103 break;
1104 case nir_op_fddx:
1105 case nir_op_fddy:
1106 case nir_op_fddx_fine:
1107 case nir_op_fddy_fine:
1108 case nir_op_fddx_coarse:
1109 case nir_op_fddy_coarse:
1110 result = emit_ddxy(ctx, instr->op, src[0]);
1111 break;
1112
1113 case nir_op_unpack_64_2x32_split_x: {
1114 assert(ac_get_llvm_num_components(src[0]) == 1);
1115 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1116 ctx->ac.v2i32,
1117 "");
1118 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1119 ctx->ac.i32_0, "");
1120 break;
1121 }
1122
1123 case nir_op_unpack_64_2x32_split_y: {
1124 assert(ac_get_llvm_num_components(src[0]) == 1);
1125 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1126 ctx->ac.v2i32,
1127 "");
1128 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1129 ctx->ac.i32_1, "");
1130 break;
1131 }
1132
1133 case nir_op_pack_64_2x32_split: {
1134 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1135 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1136 break;
1137 }
1138
1139 case nir_op_pack_32_2x16_split: {
1140 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1141 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1142 break;
1143 }
1144
1145 case nir_op_unpack_32_2x16_split_x: {
1146 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1147 ctx->ac.v2i16,
1148 "");
1149 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1150 ctx->ac.i32_0, "");
1151 break;
1152 }
1153
1154 case nir_op_unpack_32_2x16_split_y: {
1155 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1156 ctx->ac.v2i16,
1157 "");
1158 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1159 ctx->ac.i32_1, "");
1160 break;
1161 }
1162
1163 case nir_op_cube_face_coord: {
1164 src[0] = ac_to_float(&ctx->ac, src[0]);
1165 LLVMValueRef results[2];
1166 LLVMValueRef in[3];
1167 for (unsigned chan = 0; chan < 3; chan++)
1168 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1169 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1170 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1171 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1172 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1173 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1174 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1175 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1176 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1177 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1178 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1179 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1180 result = ac_build_gather_values(&ctx->ac, results, 2);
1181 break;
1182 }
1183
1184 case nir_op_cube_face_index: {
1185 src[0] = ac_to_float(&ctx->ac, src[0]);
1186 LLVMValueRef in[3];
1187 for (unsigned chan = 0; chan < 3; chan++)
1188 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1189 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1190 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1191 break;
1192 }
1193
1194 default:
1195 fprintf(stderr, "Unknown NIR alu instr: ");
1196 nir_print_instr(&instr->instr, stderr);
1197 fprintf(stderr, "\n");
1198 abort();
1199 }
1200
1201 if (result) {
1202 assert(instr->dest.dest.is_ssa);
1203 result = ac_to_integer_or_pointer(&ctx->ac, result);
1204 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1205 }
1206 }
1207
1208 static void visit_load_const(struct ac_nir_context *ctx,
1209 const nir_load_const_instr *instr)
1210 {
1211 LLVMValueRef values[4], value = NULL;
1212 LLVMTypeRef element_type =
1213 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1214
1215 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1216 switch (instr->def.bit_size) {
1217 case 8:
1218 values[i] = LLVMConstInt(element_type,
1219 instr->value[i].u8, false);
1220 break;
1221 case 16:
1222 values[i] = LLVMConstInt(element_type,
1223 instr->value[i].u16, false);
1224 break;
1225 case 32:
1226 values[i] = LLVMConstInt(element_type,
1227 instr->value[i].u32, false);
1228 break;
1229 case 64:
1230 values[i] = LLVMConstInt(element_type,
1231 instr->value[i].u64, false);
1232 break;
1233 default:
1234 fprintf(stderr,
1235 "unsupported nir load_const bit_size: %d\n",
1236 instr->def.bit_size);
1237 abort();
1238 }
1239 }
1240 if (instr->def.num_components > 1) {
1241 value = LLVMConstVector(values, instr->def.num_components);
1242 } else
1243 value = values[0];
1244
1245 ctx->ssa_defs[instr->def.index] = value;
1246 }
1247
1248 static LLVMValueRef
1249 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1250 {
1251 LLVMValueRef size =
1252 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1253 LLVMConstInt(ctx->ac.i32, 2, false), "");
1254
1255 /* GFX8 only */
1256 if (ctx->ac.chip_class == GFX8 && in_elements) {
1257 /* On GFX8, the descriptor contains the size in bytes,
1258 * but TXQ must return the size in elements.
1259 * The stride is always non-zero for resources using TXQ.
1260 */
1261 LLVMValueRef stride =
1262 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1263 ctx->ac.i32_1, "");
1264 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1265 LLVMConstInt(ctx->ac.i32, 16, false), "");
1266 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1267 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1268
1269 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1270 }
1271 return size;
1272 }
1273
1274 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1275 * incorrectly forces nearest filtering if the texture format is integer.
1276 * The only effect it has on Gather4, which always returns 4 texels for
1277 * bilinear filtering, is that the final coordinates are off by 0.5 of
1278 * the texel size.
1279 *
1280 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1281 * or (0.5 / size) from the normalized coordinates.
1282 *
1283 * However, cube textures with 8_8_8_8 data formats require a different
1284 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1285 * precision in 32-bit data formats, so it needs to be applied dynamically at
1286 * runtime. In this case, return an i1 value that indicates whether the
1287 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1288 */
1289 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1290 nir_variable *var,
1291 struct ac_image_args *args,
1292 const nir_tex_instr *instr)
1293 {
1294 const struct glsl_type *type = glsl_without_array(var->type);
1295 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1296 LLVMValueRef wa_8888 = NULL;
1297 LLVMValueRef half_texel[2];
1298 LLVMValueRef result;
1299
1300 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1301
1302 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1303 LLVMValueRef formats;
1304 LLVMValueRef data_format;
1305 LLVMValueRef wa_formats;
1306
1307 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1308
1309 data_format = LLVMBuildLShr(ctx->builder, formats,
1310 LLVMConstInt(ctx->i32, 20, false), "");
1311 data_format = LLVMBuildAnd(ctx->builder, data_format,
1312 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1313 wa_8888 = LLVMBuildICmp(
1314 ctx->builder, LLVMIntEQ, data_format,
1315 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1316 "");
1317
1318 uint32_t wa_num_format =
1319 stype == GLSL_TYPE_UINT ?
1320 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1321 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1322 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1323 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1324 "");
1325 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1326 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1327
1328 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1329 args->resource = LLVMBuildInsertElement(
1330 ctx->builder, args->resource, formats, ctx->i32_1, "");
1331 }
1332
1333 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1334 assert(!wa_8888);
1335 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1336 } else {
1337 struct ac_image_args resinfo = {};
1338 LLVMBasicBlockRef bbs[2];
1339
1340 LLVMValueRef unnorm = NULL;
1341 LLVMValueRef default_offset = ctx->f32_0;
1342 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1343 !instr->is_array) {
1344 /* In vulkan, whether the sampler uses unnormalized
1345 * coordinates or not is a dynamic property of the
1346 * sampler. Hence, to figure out whether or not we
1347 * need to divide by the texture size, we need to test
1348 * the sampler at runtime. This tests the bit set by
1349 * radv_init_sampler().
1350 */
1351 LLVMValueRef sampler0 =
1352 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1353 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1354 LLVMConstInt(ctx->i32, 15, false), "");
1355 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1356 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1357 default_offset = LLVMConstReal(ctx->f32, -0.5);
1358 }
1359
1360 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1361 if (wa_8888 || unnorm) {
1362 assert(!(wa_8888 && unnorm));
1363 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1364 /* Skip the texture size query entirely if we don't need it. */
1365 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1366 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1367 }
1368
1369 /* Query the texture size. */
1370 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1371 resinfo.opcode = ac_image_get_resinfo;
1372 resinfo.dmask = 0xf;
1373 resinfo.lod = ctx->i32_0;
1374 resinfo.resource = args->resource;
1375 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1376 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1377
1378 /* Compute -0.5 / size. */
1379 for (unsigned c = 0; c < 2; c++) {
1380 half_texel[c] =
1381 LLVMBuildExtractElement(ctx->builder, size,
1382 LLVMConstInt(ctx->i32, c, 0), "");
1383 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1384 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1385 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1386 LLVMConstReal(ctx->f32, -0.5), "");
1387 }
1388
1389 if (wa_8888 || unnorm) {
1390 ac_build_endif(ctx, 2000);
1391
1392 for (unsigned c = 0; c < 2; c++) {
1393 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1394 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1395 values, bbs);
1396 }
1397 }
1398 }
1399
1400 for (unsigned c = 0; c < 2; c++) {
1401 LLVMValueRef tmp;
1402 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1403 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1404 }
1405
1406 args->attributes = AC_FUNC_ATTR_READNONE;
1407 result = ac_build_image_opcode(ctx, args);
1408
1409 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1410 LLVMValueRef tmp, tmp2;
1411
1412 /* if the cube workaround is in place, f2i the result. */
1413 for (unsigned c = 0; c < 4; c++) {
1414 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1415 if (stype == GLSL_TYPE_UINT)
1416 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1417 else
1418 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1419 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1420 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1421 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1422 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1423 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1424 }
1425 }
1426 return result;
1427 }
1428
1429 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1430 {
1431 nir_deref_instr *texture_deref_instr = NULL;
1432
1433 for (unsigned i = 0; i < instr->num_srcs; i++) {
1434 switch (instr->src[i].src_type) {
1435 case nir_tex_src_texture_deref:
1436 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1437 break;
1438 default:
1439 break;
1440 }
1441 }
1442 return texture_deref_instr;
1443 }
1444
1445 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1446 const nir_tex_instr *instr,
1447 struct ac_image_args *args)
1448 {
1449 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1450 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1451
1452 assert(instr->dest.is_ssa);
1453 return ac_build_buffer_load_format(&ctx->ac,
1454 args->resource,
1455 args->coords[0],
1456 ctx->ac.i32_0,
1457 util_last_bit(mask),
1458 0, true,
1459 instr->dest.ssa.bit_size == 16);
1460 }
1461
1462 args->opcode = ac_image_sample;
1463
1464 switch (instr->op) {
1465 case nir_texop_txf:
1466 case nir_texop_txf_ms:
1467 case nir_texop_samples_identical:
1468 args->opcode = args->level_zero ||
1469 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1470 ac_image_load : ac_image_load_mip;
1471 args->level_zero = false;
1472 break;
1473 case nir_texop_txs:
1474 case nir_texop_query_levels:
1475 args->opcode = ac_image_get_resinfo;
1476 if (!args->lod)
1477 args->lod = ctx->ac.i32_0;
1478 args->level_zero = false;
1479 break;
1480 case nir_texop_tex:
1481 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1482 assert(!args->lod);
1483 args->level_zero = true;
1484 }
1485 break;
1486 case nir_texop_tg4:
1487 args->opcode = ac_image_gather4;
1488 if (!args->lod && !args->bias)
1489 args->level_zero = true;
1490 break;
1491 case nir_texop_lod:
1492 args->opcode = ac_image_get_lod;
1493 break;
1494 case nir_texop_fragment_fetch:
1495 case nir_texop_fragment_mask_fetch:
1496 args->opcode = ac_image_load;
1497 args->level_zero = false;
1498 break;
1499 default:
1500 break;
1501 }
1502
1503 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1504 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1505 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1506 const struct glsl_type *type = glsl_without_array(var->type);
1507 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1508 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1509 return lower_gather4_integer(&ctx->ac, var, args, instr);
1510 }
1511 }
1512
1513 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1514 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1515 if ((args->dim == ac_image_2darray ||
1516 args->dim == ac_image_2d) && !args->coords[1]) {
1517 args->coords[1] = ctx->ac.i32_0;
1518 }
1519 }
1520
1521 args->attributes = AC_FUNC_ATTR_READNONE;
1522 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1523 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1524 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1525 /* Prevent texture instructions with implicit derivatives from being
1526 * sinked into branches. */
1527 switch (instr->op) {
1528 case nir_texop_tex:
1529 case nir_texop_txb:
1530 case nir_texop_lod:
1531 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1532 break;
1533 default:
1534 break;
1535 }
1536 }
1537
1538 return ac_build_image_opcode(&ctx->ac, args);
1539 }
1540
1541 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1542 nir_intrinsic_instr *instr)
1543 {
1544 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1545 LLVMValueRef index = get_src(ctx, instr->src[1]);
1546
1547 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1548 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1549 return result;
1550 }
1551
1552 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1553 nir_intrinsic_instr *instr)
1554 {
1555 LLVMValueRef ptr, addr;
1556 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1557 unsigned index = nir_intrinsic_base(instr);
1558
1559 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1560 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1561
1562 /* Load constant values from user SGPRS when possible, otherwise
1563 * fallback to the default path that loads directly from memory.
1564 */
1565 if (LLVMIsConstant(src0) &&
1566 instr->dest.ssa.bit_size == 32) {
1567 unsigned count = instr->dest.ssa.num_components;
1568 unsigned offset = index;
1569
1570 offset += LLVMConstIntGetZExtValue(src0);
1571 offset /= 4;
1572
1573 offset -= ctx->args->base_inline_push_consts;
1574
1575 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1576 if (offset + count <= num_inline_push_consts) {
1577 LLVMValueRef push_constants[num_inline_push_consts];
1578 for (unsigned i = 0; i < num_inline_push_consts; i++)
1579 push_constants[i] = ac_get_arg(&ctx->ac,
1580 ctx->args->inline_push_consts[i]);
1581 return ac_build_gather_values(&ctx->ac,
1582 push_constants + offset,
1583 count);
1584 }
1585 }
1586
1587 ptr = LLVMBuildGEP(ctx->ac.builder,
1588 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1589
1590 if (instr->dest.ssa.bit_size == 8) {
1591 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1592 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1593 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1594 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1595
1596 LLVMValueRef params[3];
1597 if (load_dwords > 1) {
1598 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1599 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1600 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1601 } else {
1602 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1603 params[0] = ctx->ac.i32_0;
1604 params[1] = res;
1605 }
1606 params[2] = addr;
1607 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1608
1609 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1610 if (instr->dest.ssa.num_components > 1)
1611 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1612 return res;
1613 } else if (instr->dest.ssa.bit_size == 16) {
1614 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1615 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1616 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1617 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1618 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1619 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1620 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1621 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1622 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1623 LLVMConstInt(ctx->ac.i32, 4, false)};
1624 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1625 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1626 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1627 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1628 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1629 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1630 }
1631
1632 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1633
1634 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1635 }
1636
1637 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1638 const nir_intrinsic_instr *instr)
1639 {
1640 LLVMValueRef index = get_src(ctx, instr->src[0]);
1641
1642 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1643 }
1644
1645 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1646 {
1647 uint32_t new_mask = 0;
1648 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1649 if (mask & (1u << i))
1650 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1651 return new_mask;
1652 }
1653
1654 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1655 unsigned start, unsigned count)
1656 {
1657 LLVMValueRef mask[] = {
1658 ctx->i32_0, ctx->i32_1,
1659 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1660
1661 unsigned src_elements = ac_get_llvm_num_components(src);
1662
1663 if (count == src_elements) {
1664 assert(start == 0);
1665 return src;
1666 } else if (count == 1) {
1667 assert(start < src_elements);
1668 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1669 } else {
1670 assert(start + count <= src_elements);
1671 assert(count <= 4);
1672 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1673 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1674 }
1675 }
1676
1677 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1678 enum gl_access_qualifier access,
1679 bool may_store_unaligned,
1680 bool writeonly_memory)
1681 {
1682 unsigned cache_policy = 0;
1683
1684 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1685 * store opcodes not aligned to a dword are affected. The only way to
1686 * get unaligned stores is through shader images.
1687 */
1688 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1689 /* If this is write-only, don't keep data in L1 to prevent
1690 * evicting L1 cache lines that may be needed by other
1691 * instructions.
1692 */
1693 writeonly_memory ||
1694 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1695 cache_policy |= ac_glc;
1696 }
1697
1698 if (access & ACCESS_STREAM_CACHE_POLICY)
1699 cache_policy |= ac_slc | ac_glc;
1700
1701 return cache_policy;
1702 }
1703
1704 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1705 struct waterfall_context *wctx,
1706 const nir_intrinsic_instr *instr,
1707 nir_src src)
1708 {
1709 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1710 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1711 }
1712
1713 static void visit_store_ssbo(struct ac_nir_context *ctx,
1714 nir_intrinsic_instr *instr)
1715 {
1716 if (ctx->ac.postponed_kill) {
1717 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1718 ctx->ac.postponed_kill, "");
1719 ac_build_ifcc(&ctx->ac, cond, 7000);
1720 }
1721
1722 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1723 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1724 unsigned writemask = nir_intrinsic_write_mask(instr);
1725 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1726 bool writeonly_memory = access & ACCESS_NON_READABLE;
1727 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1728
1729 struct waterfall_context wctx;
1730 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1731
1732 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1733 LLVMValueRef base_data = src_data;
1734 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1735 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1736
1737 while (writemask) {
1738 int start, count;
1739 LLVMValueRef data, offset;
1740 LLVMTypeRef data_type;
1741
1742 u_bit_scan_consecutive_range(&writemask, &start, &count);
1743
1744 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1745 * writes into a 2-element and a 1-element write. */
1746 if (count == 3 &&
1747 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1748 writemask |= 1 << (start + 2);
1749 count = 2;
1750 }
1751 int num_bytes = count * elem_size_bytes; /* count in bytes */
1752
1753 /* we can only store 4 DWords at the same time.
1754 * can only happen for 64 Bit vectors. */
1755 if (num_bytes > 16) {
1756 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1757 count = 2;
1758 num_bytes = 16;
1759 }
1760
1761 /* check alignment of 16 Bit stores */
1762 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1763 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1764 count = 1;
1765 num_bytes = 2;
1766 }
1767
1768 /* Due to alignment issues, split stores of 8-bit/16-bit
1769 * vectors.
1770 */
1771 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1772 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1773 count = 1;
1774 num_bytes = elem_size_bytes;
1775 }
1776
1777 data = extract_vector_range(&ctx->ac, base_data, start, count);
1778
1779 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1780 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1781
1782 if (num_bytes == 1) {
1783 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1784 offset, ctx->ac.i32_0,
1785 cache_policy);
1786 } else if (num_bytes == 2) {
1787 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1788 offset, ctx->ac.i32_0,
1789 cache_policy);
1790 } else {
1791 int num_channels = num_bytes / 4;
1792
1793 switch (num_bytes) {
1794 case 16: /* v4f32 */
1795 data_type = ctx->ac.v4f32;
1796 break;
1797 case 12: /* v3f32 */
1798 data_type = ctx->ac.v3f32;
1799 break;
1800 case 8: /* v2f32 */
1801 data_type = ctx->ac.v2f32;
1802 break;
1803 case 4: /* f32 */
1804 data_type = ctx->ac.f32;
1805 break;
1806 default:
1807 unreachable("Malformed vector store.");
1808 }
1809 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1810
1811 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1812 num_channels, offset,
1813 ctx->ac.i32_0, 0,
1814 cache_policy);
1815 }
1816 }
1817
1818 exit_waterfall(ctx, &wctx, NULL);
1819
1820 if (ctx->ac.postponed_kill)
1821 ac_build_endif(&ctx->ac, 7000);
1822 }
1823
1824 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1825 LLVMValueRef descriptor,
1826 LLVMValueRef offset,
1827 LLVMValueRef compare,
1828 LLVMValueRef exchange)
1829 {
1830 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1831 if (ctx->abi->robust_buffer_access) {
1832 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1833
1834 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1835 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1836
1837 ac_build_ifcc(&ctx->ac, cond, -1);
1838
1839 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1840 }
1841
1842 LLVMValueRef ptr_parts[2] = {
1843 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1844 LLVMBuildAnd(ctx->ac.builder,
1845 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1846 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1847 };
1848
1849 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1850 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1851
1852 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1853
1854 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1855 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1856 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1857 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1858
1859 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1860 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1861
1862 if (ctx->abi->robust_buffer_access) {
1863 ac_build_endif(&ctx->ac, -1);
1864
1865 LLVMBasicBlockRef incoming_blocks[2] = {
1866 start_block,
1867 then_block,
1868 };
1869
1870 LLVMValueRef incoming_values[2] = {
1871 LLVMConstInt(ctx->ac.i64, 0, 0),
1872 result,
1873 };
1874 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1875 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1876 return ret;
1877 } else {
1878 return result;
1879 }
1880 }
1881
1882 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1883 nir_intrinsic_instr *instr)
1884 {
1885 if (ctx->ac.postponed_kill) {
1886 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1887 ctx->ac.postponed_kill, "");
1888 ac_build_ifcc(&ctx->ac, cond, 7001);
1889 }
1890
1891 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1892 const char *op;
1893 char name[64], type[8];
1894 LLVMValueRef params[6], descriptor;
1895 LLVMValueRef result;
1896 int arg_count = 0;
1897
1898 struct waterfall_context wctx;
1899 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1900
1901 switch (instr->intrinsic) {
1902 case nir_intrinsic_ssbo_atomic_add:
1903 op = "add";
1904 break;
1905 case nir_intrinsic_ssbo_atomic_imin:
1906 op = "smin";
1907 break;
1908 case nir_intrinsic_ssbo_atomic_umin:
1909 op = "umin";
1910 break;
1911 case nir_intrinsic_ssbo_atomic_imax:
1912 op = "smax";
1913 break;
1914 case nir_intrinsic_ssbo_atomic_umax:
1915 op = "umax";
1916 break;
1917 case nir_intrinsic_ssbo_atomic_and:
1918 op = "and";
1919 break;
1920 case nir_intrinsic_ssbo_atomic_or:
1921 op = "or";
1922 break;
1923 case nir_intrinsic_ssbo_atomic_xor:
1924 op = "xor";
1925 break;
1926 case nir_intrinsic_ssbo_atomic_exchange:
1927 op = "swap";
1928 break;
1929 case nir_intrinsic_ssbo_atomic_comp_swap:
1930 op = "cmpswap";
1931 break;
1932 default:
1933 abort();
1934 }
1935
1936 descriptor = ctx->abi->load_ssbo(ctx->abi,
1937 rsrc_base,
1938 true);
1939
1940 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1941 return_type == ctx->ac.i64) {
1942 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1943 get_src(ctx, instr->src[1]),
1944 get_src(ctx, instr->src[2]),
1945 get_src(ctx, instr->src[3]));
1946 } else {
1947 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1948 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1949 }
1950 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1951 params[arg_count++] = descriptor;
1952
1953 if (LLVM_VERSION_MAJOR >= 9) {
1954 /* XXX: The new raw/struct atomic intrinsics are buggy with
1955 * LLVM 8, see r358579.
1956 */
1957 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1958 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1959 params[arg_count++] = ctx->ac.i32_0; /* slc */
1960
1961 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1962 snprintf(name, sizeof(name),
1963 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1964 } else {
1965 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1966 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1967 params[arg_count++] = ctx->ac.i1false; /* slc */
1968
1969 assert(return_type == ctx->ac.i32);
1970 snprintf(name, sizeof(name),
1971 "llvm.amdgcn.buffer.atomic.%s", op);
1972 }
1973
1974 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1975 arg_count, 0);
1976 }
1977
1978 result = exit_waterfall(ctx, &wctx, result);
1979 if (ctx->ac.postponed_kill)
1980 ac_build_endif(&ctx->ac, 7001);
1981 return result;
1982 }
1983
1984 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1985 nir_intrinsic_instr *instr)
1986 {
1987 struct waterfall_context wctx;
1988 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1989
1990 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1991 int num_components = instr->num_components;
1992 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1993 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1994
1995 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1996 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1997 LLVMValueRef vindex = ctx->ac.i32_0;
1998
1999 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
2000 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2001
2002 LLVMValueRef results[4];
2003 for (int i = 0; i < num_components;) {
2004 int num_elems = num_components - i;
2005 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2006 num_elems = 1;
2007 if (num_elems * elem_size_bytes > 16)
2008 num_elems = 16 / elem_size_bytes;
2009 int load_bytes = num_elems * elem_size_bytes;
2010
2011 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2012
2013 LLVMValueRef ret;
2014
2015 if (load_bytes == 1) {
2016 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2017 rsrc,
2018 offset,
2019 ctx->ac.i32_0,
2020 immoffset,
2021 cache_policy);
2022 } else if (load_bytes == 2) {
2023 ret = ac_build_tbuffer_load_short(&ctx->ac,
2024 rsrc,
2025 offset,
2026 ctx->ac.i32_0,
2027 immoffset,
2028 cache_policy);
2029 } else {
2030 int num_channels = util_next_power_of_two(load_bytes) / 4;
2031 bool can_speculate = access & ACCESS_CAN_REORDER;
2032
2033 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2034 vindex, offset, immoffset, 0,
2035 cache_policy, can_speculate, false);
2036 }
2037
2038 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2039 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2040 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2041
2042 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2043 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2044
2045 for (unsigned j = 0; j < num_elems; j++) {
2046 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2047 }
2048 i += num_elems;
2049 }
2050
2051 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2052 return exit_waterfall(ctx, &wctx, ret);
2053 }
2054
2055 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2056 struct waterfall_context *wctx,
2057 const nir_intrinsic_instr *instr)
2058 {
2059 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2060 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2061 }
2062
2063 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2064 nir_intrinsic_instr *instr)
2065 {
2066 struct waterfall_context wctx;
2067 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2068
2069 LLVMValueRef ret;
2070 LLVMValueRef rsrc = rsrc_base;
2071 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2072 int num_components = instr->num_components;
2073
2074 if (ctx->abi->load_ubo)
2075 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2076
2077 if (instr->dest.ssa.bit_size == 64)
2078 num_components *= 2;
2079
2080 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2081 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2082 LLVMValueRef results[num_components];
2083 for (unsigned i = 0; i < num_components; ++i) {
2084 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2085 load_bytes * i, 0);
2086
2087 if (load_bytes == 1) {
2088 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2089 rsrc,
2090 offset,
2091 ctx->ac.i32_0,
2092 immoffset,
2093 0);
2094 } else {
2095 assert(load_bytes == 2);
2096 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2097 rsrc,
2098 offset,
2099 ctx->ac.i32_0,
2100 immoffset,
2101 0);
2102 }
2103 }
2104 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2105 } else {
2106 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2107 NULL, 0, 0, true, true);
2108
2109 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2110 }
2111
2112 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2113 get_def_type(ctx, &instr->dest.ssa), "");
2114
2115 return exit_waterfall(ctx, &wctx, ret);
2116 }
2117
2118 static void
2119 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2120 bool vs_in, unsigned *vertex_index_out,
2121 LLVMValueRef *vertex_index_ref,
2122 unsigned *const_out, LLVMValueRef *indir_out)
2123 {
2124 nir_variable *var = nir_deref_instr_get_variable(instr);
2125 nir_deref_path path;
2126 unsigned idx_lvl = 1;
2127
2128 nir_deref_path_init(&path, instr, NULL);
2129
2130 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2131 if (vertex_index_ref) {
2132 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2133 if (vertex_index_out)
2134 *vertex_index_out = 0;
2135 } else {
2136 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2137 }
2138 ++idx_lvl;
2139 }
2140
2141 uint32_t const_offset = 0;
2142 LLVMValueRef offset = NULL;
2143
2144 if (var->data.compact) {
2145 assert(instr->deref_type == nir_deref_type_array);
2146 const_offset = nir_src_as_uint(instr->arr.index);
2147 goto out;
2148 }
2149
2150 for (; path.path[idx_lvl]; ++idx_lvl) {
2151 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2152 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2153 unsigned index = path.path[idx_lvl]->strct.index;
2154
2155 for (unsigned i = 0; i < index; i++) {
2156 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2157 const_offset += glsl_count_attribute_slots(ft, vs_in);
2158 }
2159 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2160 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2161 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2162 const_offset += size *
2163 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2164 } else {
2165 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2166 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2167 if (offset)
2168 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2169 else
2170 offset = array_off;
2171 }
2172 } else
2173 unreachable("Uhandled deref type in get_deref_instr_offset");
2174 }
2175
2176 out:
2177 nir_deref_path_finish(&path);
2178
2179 if (const_offset && offset)
2180 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2181 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2182 "");
2183
2184 *const_out = const_offset;
2185 *indir_out = offset;
2186 }
2187
2188 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2189 nir_intrinsic_instr *instr,
2190 bool load_inputs)
2191 {
2192 LLVMValueRef result;
2193 LLVMValueRef vertex_index = NULL;
2194 LLVMValueRef indir_index = NULL;
2195 unsigned const_index = 0;
2196
2197 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2198
2199 unsigned location = var->data.location;
2200 unsigned driver_location = var->data.driver_location;
2201 const bool is_patch = var->data.patch ||
2202 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2203 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2204 const bool is_compact = var->data.compact;
2205
2206 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2207 false, NULL, is_patch ? NULL : &vertex_index,
2208 &const_index, &indir_index);
2209
2210 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2211
2212 LLVMTypeRef src_component_type;
2213 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2214 src_component_type = LLVMGetElementType(dest_type);
2215 else
2216 src_component_type = dest_type;
2217
2218 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2219 vertex_index, indir_index,
2220 const_index, location, driver_location,
2221 var->data.location_frac,
2222 instr->num_components,
2223 is_patch, is_compact, load_inputs);
2224 if (instr->dest.ssa.bit_size == 16) {
2225 result = ac_to_integer(&ctx->ac, result);
2226 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2227 }
2228 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2229 }
2230
2231 static unsigned
2232 type_scalar_size_bytes(const struct glsl_type *type)
2233 {
2234 assert(glsl_type_is_vector_or_scalar(type) ||
2235 glsl_type_is_matrix(type));
2236 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2237 }
2238
2239 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2240 nir_intrinsic_instr *instr)
2241 {
2242 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2243 nir_variable *var = nir_deref_instr_get_variable(deref);
2244
2245 LLVMValueRef values[8];
2246 int idx = 0;
2247 int ve = instr->dest.ssa.num_components;
2248 unsigned comp = 0;
2249 LLVMValueRef indir_index;
2250 LLVMValueRef ret;
2251 unsigned const_index;
2252 unsigned stride = 4;
2253 int mode = deref->mode;
2254
2255 if (var) {
2256 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2257 var->data.mode == nir_var_shader_in;
2258 idx = var->data.driver_location;
2259 comp = var->data.location_frac;
2260 mode = var->data.mode;
2261
2262 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2263 &const_index, &indir_index);
2264
2265 if (var->data.compact) {
2266 stride = 1;
2267 const_index += comp;
2268 comp = 0;
2269 }
2270 }
2271
2272 if (instr->dest.ssa.bit_size == 64 &&
2273 (deref->mode == nir_var_shader_in ||
2274 deref->mode == nir_var_shader_out ||
2275 deref->mode == nir_var_function_temp))
2276 ve *= 2;
2277
2278 switch (mode) {
2279 case nir_var_shader_in:
2280 /* TODO: remove this after RADV switches to lowered IO */
2281 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2282 ctx->stage == MESA_SHADER_TESS_EVAL) {
2283 return load_tess_varyings(ctx, instr, true);
2284 }
2285
2286 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2287 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2288 LLVMValueRef indir_index;
2289 unsigned const_index, vertex_index;
2290 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2291 &const_index, &indir_index);
2292 assert(indir_index == NULL);
2293
2294 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2295 var->data.driver_location,
2296 var->data.location_frac,
2297 instr->num_components, vertex_index, const_index, type);
2298 }
2299
2300 for (unsigned chan = comp; chan < ve + comp; chan++) {
2301 if (indir_index) {
2302 unsigned count = glsl_count_attribute_slots(
2303 var->type,
2304 ctx->stage == MESA_SHADER_VERTEX);
2305 count -= chan / 4;
2306 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2307 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2308 stride, false, true);
2309
2310 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2311 tmp_vec,
2312 indir_index, "");
2313 } else
2314 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2315 }
2316 break;
2317 case nir_var_function_temp:
2318 for (unsigned chan = 0; chan < ve; chan++) {
2319 if (indir_index) {
2320 unsigned count = glsl_count_attribute_slots(
2321 var->type, false);
2322 count -= chan / 4;
2323 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2324 &ctx->ac, ctx->locals + idx + chan, count,
2325 stride, true, true);
2326
2327 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2328 tmp_vec,
2329 indir_index, "");
2330 } else {
2331 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2332 }
2333 }
2334 break;
2335 case nir_var_shader_out:
2336 /* TODO: remove this after RADV switches to lowered IO */
2337 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2338 return load_tess_varyings(ctx, instr, false);
2339 }
2340
2341 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2342 var->data.fb_fetch_output &&
2343 ctx->abi->emit_fbfetch)
2344 return ctx->abi->emit_fbfetch(ctx->abi);
2345
2346 for (unsigned chan = comp; chan < ve + comp; chan++) {
2347 if (indir_index) {
2348 unsigned count = glsl_count_attribute_slots(
2349 var->type, false);
2350 count -= chan / 4;
2351 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2352 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2353 stride, true, true);
2354
2355 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2356 tmp_vec,
2357 indir_index, "");
2358 } else {
2359 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2360 ctx->abi->outputs[idx + chan + const_index * stride],
2361 "");
2362 }
2363 }
2364 break;
2365 case nir_var_mem_global: {
2366 LLVMValueRef address = get_src(ctx, instr->src[0]);
2367 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2368 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2369 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2370 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2371 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2372 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2373
2374 if (stride != natural_stride || split_loads) {
2375 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2376 result_type = LLVMGetElementType(result_type);
2377
2378 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2379 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2380 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2381
2382 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2383 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2384 values[i] = LLVMBuildLoad(ctx->ac.builder,
2385 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2386
2387 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2388 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2389 }
2390 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2391 } else {
2392 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2393 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2394 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2395 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2396
2397 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2398 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2399 return val;
2400 }
2401 }
2402 default:
2403 unreachable("unhandle variable mode");
2404 }
2405 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2406 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2407 }
2408
2409 static void
2410 visit_store_var(struct ac_nir_context *ctx,
2411 nir_intrinsic_instr *instr)
2412 {
2413 if (ctx->ac.postponed_kill) {
2414 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2415 ctx->ac.postponed_kill, "");
2416 ac_build_ifcc(&ctx->ac, cond, 7002);
2417 }
2418
2419 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2420 nir_variable *var = nir_deref_instr_get_variable(deref);
2421
2422 LLVMValueRef temp_ptr, value;
2423 int idx = 0;
2424 unsigned comp = 0;
2425 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2426 int writemask = instr->const_index[0];
2427 LLVMValueRef indir_index;
2428 unsigned const_index;
2429
2430 if (var) {
2431 get_deref_offset(ctx, deref, false,
2432 NULL, NULL, &const_index, &indir_index);
2433 idx = var->data.driver_location;
2434 comp = var->data.location_frac;
2435
2436 if (var->data.compact) {
2437 const_index += comp;
2438 comp = 0;
2439 }
2440 }
2441
2442 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2443 (deref->mode == nir_var_shader_out ||
2444 deref->mode == nir_var_function_temp)) {
2445
2446 src = LLVMBuildBitCast(ctx->ac.builder, src,
2447 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2448 "");
2449
2450 writemask = widen_mask(writemask, 2);
2451 }
2452
2453 writemask = writemask << comp;
2454
2455 switch (deref->mode) {
2456 case nir_var_shader_out:
2457 /* TODO: remove this after RADV switches to lowered IO */
2458 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2459 LLVMValueRef vertex_index = NULL;
2460 LLVMValueRef indir_index = NULL;
2461 unsigned const_index = 0;
2462 const bool is_patch = var->data.patch ||
2463 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2464 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2465
2466 get_deref_offset(ctx, deref, false, NULL,
2467 is_patch ? NULL : &vertex_index,
2468 &const_index, &indir_index);
2469
2470 ctx->abi->store_tcs_outputs(ctx->abi, var,
2471 vertex_index, indir_index,
2472 const_index, src, writemask,
2473 var->data.location_frac,
2474 var->data.driver_location);
2475 break;
2476 }
2477
2478 for (unsigned chan = 0; chan < 8; chan++) {
2479 int stride = 4;
2480 if (!(writemask & (1 << chan)))
2481 continue;
2482
2483 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2484
2485 if (var->data.compact)
2486 stride = 1;
2487 if (indir_index) {
2488 unsigned count = glsl_count_attribute_slots(
2489 var->type, false);
2490 count -= chan / 4;
2491 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2492 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2493 stride, true, true);
2494
2495 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2496 value, indir_index, "");
2497 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2498 count, stride, tmp_vec);
2499
2500 } else {
2501 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2502
2503 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2504 }
2505 }
2506 break;
2507 case nir_var_function_temp:
2508 for (unsigned chan = 0; chan < 8; chan++) {
2509 if (!(writemask & (1 << chan)))
2510 continue;
2511
2512 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2513 if (indir_index) {
2514 unsigned count = glsl_count_attribute_slots(
2515 var->type, false);
2516 count -= chan / 4;
2517 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2518 &ctx->ac, ctx->locals + idx + chan, count,
2519 4, true, true);
2520
2521 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2522 value, indir_index, "");
2523 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2524 count, 4, tmp_vec);
2525 } else {
2526 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2527
2528 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2529 }
2530 }
2531 break;
2532
2533 case nir_var_mem_global: {
2534 int writemask = instr->const_index[0];
2535 LLVMValueRef address = get_src(ctx, instr->src[0]);
2536 LLVMValueRef val = get_src(ctx, instr->src[1]);
2537
2538 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2539 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2540 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2541 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2542 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2543
2544 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2545 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2546 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2547
2548 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2549 stride == natural_stride && !split_stores) {
2550 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2551 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2552 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2553
2554 val = LLVMBuildBitCast(ctx->ac.builder, val,
2555 LLVMGetElementType(LLVMTypeOf(address)), "");
2556 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2557
2558 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2559 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2560 } else {
2561 LLVMTypeRef val_type = LLVMTypeOf(val);
2562 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2563 val_type = LLVMGetElementType(val_type);
2564
2565 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2566 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2567 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2568 for (unsigned chan = 0; chan < 4; chan++) {
2569 if (!(writemask & (1 << chan)))
2570 continue;
2571
2572 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2573
2574 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2575 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2576 chan);
2577 src = LLVMBuildBitCast(ctx->ac.builder, src,
2578 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2579 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2580
2581 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2582 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2583 }
2584 }
2585 break;
2586 }
2587 default:
2588 abort();
2589 break;
2590 }
2591
2592 if (ctx->ac.postponed_kill)
2593 ac_build_endif(&ctx->ac, 7002);
2594 }
2595
2596 static void
2597 visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
2598 {
2599 if (ctx->ac.postponed_kill) {
2600 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2601 ctx->ac.postponed_kill, "");
2602 ac_build_ifcc(&ctx->ac, cond, 7002);
2603 }
2604
2605 unsigned base = nir_intrinsic_base(instr);
2606 unsigned writemask = nir_intrinsic_write_mask(instr);
2607 unsigned component = nir_intrinsic_component(instr);
2608 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
2609 nir_src offset = *nir_get_io_offset_src(instr);
2610 LLVMValueRef indir_index = NULL;
2611
2612 if (nir_src_is_const(offset))
2613 assert(nir_src_as_uint(offset) == 0);
2614 else
2615 indir_index = get_src(ctx, offset);
2616
2617 switch (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src))) {
2618 case 32:
2619 break;
2620 case 64:
2621 writemask = widen_mask(writemask, 2);
2622 src = LLVMBuildBitCast(ctx->ac.builder, src,
2623 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2624 "");
2625 break;
2626 default:
2627 unreachable("unhandled store_output bit size");
2628 return;
2629 }
2630
2631 writemask <<= component;
2632
2633 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2634 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
2635 LLVMValueRef vertex_index =
2636 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
2637
2638 ctx->abi->store_tcs_outputs(ctx->abi, NULL,
2639 vertex_index, indir_index,
2640 0, src, writemask,
2641 component, base * 4);
2642 return;
2643 }
2644
2645 /* No indirect indexing is allowed after this point. */
2646 assert(!indir_index);
2647
2648 for (unsigned chan = 0; chan < 8; chan++) {
2649 if (!(writemask & (1 << chan)))
2650 continue;
2651
2652 LLVMValueRef value = ac_llvm_extract_elem(&ctx->ac, src, chan - component);
2653 LLVMBuildStore(ctx->ac.builder, value,
2654 ctx->abi->outputs[base * 4 + chan]);
2655 }
2656
2657 if (ctx->ac.postponed_kill)
2658 ac_build_endif(&ctx->ac, 7002);
2659 }
2660
2661 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2662 {
2663 switch (dim) {
2664 case GLSL_SAMPLER_DIM_BUF:
2665 return 1;
2666 case GLSL_SAMPLER_DIM_1D:
2667 return array ? 2 : 1;
2668 case GLSL_SAMPLER_DIM_2D:
2669 return array ? 3 : 2;
2670 case GLSL_SAMPLER_DIM_MS:
2671 return array ? 4 : 3;
2672 case GLSL_SAMPLER_DIM_3D:
2673 case GLSL_SAMPLER_DIM_CUBE:
2674 return 3;
2675 case GLSL_SAMPLER_DIM_RECT:
2676 case GLSL_SAMPLER_DIM_SUBPASS:
2677 return 2;
2678 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2679 return 3;
2680 default:
2681 break;
2682 }
2683 return 0;
2684 }
2685
2686 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2687 LLVMValueRef coord_x, LLVMValueRef coord_y,
2688 LLVMValueRef coord_z,
2689 LLVMValueRef sample_index,
2690 LLVMValueRef fmask_desc_ptr)
2691 {
2692 unsigned sample_chan = coord_z ? 3 : 2;
2693 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2694 addr[sample_chan] = sample_index;
2695
2696 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2697 return addr[sample_chan];
2698 }
2699
2700 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2701 {
2702 assert(instr->src[0].is_ssa);
2703 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2704 }
2705
2706 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2707 const nir_intrinsic_instr *instr,
2708 LLVMValueRef dynamic_index,
2709 enum ac_descriptor_type desc_type,
2710 bool write)
2711 {
2712 nir_deref_instr *deref_instr =
2713 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2714 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2715
2716 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2717 }
2718
2719 static void get_image_coords(struct ac_nir_context *ctx,
2720 const nir_intrinsic_instr *instr,
2721 LLVMValueRef dynamic_desc_index,
2722 struct ac_image_args *args,
2723 enum glsl_sampler_dim dim,
2724 bool is_array)
2725 {
2726 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2727 LLVMValueRef masks[] = {
2728 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2729 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2730 };
2731 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2732
2733 int count;
2734 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2735 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2736 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2737 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2738 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2739 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2740 count = image_type_to_components_count(dim, is_array);
2741
2742 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2743 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2744 LLVMValueRef fmask_load_address[3];
2745
2746 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2747 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2748 if (is_array)
2749 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2750 else
2751 fmask_load_address[2] = NULL;
2752
2753 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2754 fmask_load_address[0],
2755 fmask_load_address[1],
2756 fmask_load_address[2],
2757 sample_index,
2758 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2759 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2760 }
2761 if (count == 1 && !gfx9_1d) {
2762 if (instr->src[1].ssa->num_components)
2763 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2764 else
2765 args->coords[0] = src0;
2766 } else {
2767 int chan;
2768 if (is_ms)
2769 count--;
2770 for (chan = 0; chan < count; ++chan) {
2771 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2772 }
2773
2774 if (gfx9_1d) {
2775 if (is_array) {
2776 args->coords[2] = args->coords[1];
2777 args->coords[1] = ctx->ac.i32_0;
2778 } else
2779 args->coords[1] = ctx->ac.i32_0;
2780 count++;
2781 }
2782 if (ctx->ac.chip_class == GFX9 &&
2783 dim == GLSL_SAMPLER_DIM_2D &&
2784 !is_array) {
2785 /* The hw can't bind a slice of a 3D image as a 2D
2786 * image, because it ignores BASE_ARRAY if the target
2787 * is 3D. The workaround is to read BASE_ARRAY and set
2788 * it as the 3rd address operand for all 2D images.
2789 */
2790 LLVMValueRef first_layer, const5, mask;
2791
2792 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2793 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2794 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2795 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2796
2797 args->coords[count] = first_layer;
2798 count++;
2799 }
2800
2801
2802 if (is_ms) {
2803 args->coords[count] = sample_index;
2804 count++;
2805 }
2806 }
2807 }
2808
2809 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2810 const nir_intrinsic_instr *instr,
2811 LLVMValueRef dynamic_index,
2812 bool write, bool atomic)
2813 {
2814 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2815 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2816 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2817 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2818 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2819
2820 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2821 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2822 elem_count, stride, "");
2823
2824 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2825 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2826 }
2827 return rsrc;
2828 }
2829
2830 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2831 struct waterfall_context *wctx,
2832 const nir_intrinsic_instr *instr)
2833 {
2834 nir_deref_instr *deref_instr = NULL;
2835
2836 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2837 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2838
2839 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2840 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2841 }
2842
2843 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2844 const nir_intrinsic_instr *instr,
2845 bool bindless)
2846 {
2847 LLVMValueRef res;
2848
2849 enum glsl_sampler_dim dim;
2850 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2851 bool is_array;
2852 if (bindless) {
2853 dim = nir_intrinsic_image_dim(instr);
2854 is_array = nir_intrinsic_image_array(instr);
2855 } else {
2856 const nir_deref_instr *image_deref = get_image_deref(instr);
2857 const struct glsl_type *type = image_deref->type;
2858 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2859 dim = glsl_get_sampler_dim(type);
2860 access |= var->data.access;
2861 is_array = glsl_sampler_type_is_array(type);
2862 }
2863
2864 struct waterfall_context wctx;
2865 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2866
2867 struct ac_image_args args = {};
2868
2869 args.cache_policy = get_cache_policy(ctx, access, false, false);
2870
2871 if (dim == GLSL_SAMPLER_DIM_BUF) {
2872 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2873 unsigned num_channels = util_last_bit(mask);
2874 LLVMValueRef rsrc, vindex;
2875
2876 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2877 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2878 ctx->ac.i32_0, "");
2879
2880 assert(instr->dest.is_ssa);
2881 bool can_speculate = access & ACCESS_CAN_REORDER;
2882 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2883 ctx->ac.i32_0, num_channels,
2884 args.cache_policy,
2885 can_speculate,
2886 instr->dest.ssa.bit_size == 16);
2887 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2888
2889 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2890 res = ac_to_integer(&ctx->ac, res);
2891 } else {
2892 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2893
2894 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2895 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2896 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2897 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2898 if (!level_zero)
2899 args.lod = get_src(ctx, instr->src[3]);
2900 args.dmask = 15;
2901 args.attributes = AC_FUNC_ATTR_READONLY;
2902
2903 assert(instr->dest.is_ssa);
2904 args.d16 = instr->dest.ssa.bit_size == 16;
2905
2906 res = ac_build_image_opcode(&ctx->ac, &args);
2907 }
2908 return exit_waterfall(ctx, &wctx, res);
2909 }
2910
2911 static void visit_image_store(struct ac_nir_context *ctx,
2912 const nir_intrinsic_instr *instr,
2913 bool bindless)
2914 {
2915 if (ctx->ac.postponed_kill) {
2916 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2917 ctx->ac.postponed_kill, "");
2918 ac_build_ifcc(&ctx->ac, cond, 7003);
2919 }
2920
2921 enum glsl_sampler_dim dim;
2922 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2923 bool is_array;
2924
2925 if (bindless) {
2926 dim = nir_intrinsic_image_dim(instr);
2927 is_array = nir_intrinsic_image_array(instr);
2928 } else {
2929 const nir_deref_instr *image_deref = get_image_deref(instr);
2930 const struct glsl_type *type = image_deref->type;
2931 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2932 dim = glsl_get_sampler_dim(type);
2933 access |= var->data.access;
2934 is_array = glsl_sampler_type_is_array(type);
2935 }
2936
2937 struct waterfall_context wctx;
2938 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2939
2940 bool writeonly_memory = access & ACCESS_NON_READABLE;
2941 struct ac_image_args args = {};
2942
2943 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2944
2945 if (dim == GLSL_SAMPLER_DIM_BUF) {
2946 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2947 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2948 unsigned src_channels = ac_get_llvm_num_components(src);
2949 LLVMValueRef vindex;
2950
2951 if (src_channels == 3)
2952 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2953
2954 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2955 get_src(ctx, instr->src[1]),
2956 ctx->ac.i32_0, "");
2957
2958 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2959 ctx->ac.i32_0, args.cache_policy);
2960 } else {
2961 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2962
2963 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2964 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2965 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2966 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2967 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2968 if (!level_zero)
2969 args.lod = get_src(ctx, instr->src[4]);
2970 args.dmask = 15;
2971 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2972
2973 ac_build_image_opcode(&ctx->ac, &args);
2974 }
2975
2976 exit_waterfall(ctx, &wctx, NULL);
2977 if (ctx->ac.postponed_kill)
2978 ac_build_endif(&ctx->ac, 7003);
2979 }
2980
2981 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2982 const nir_intrinsic_instr *instr,
2983 bool bindless)
2984 {
2985 if (ctx->ac.postponed_kill) {
2986 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2987 ctx->ac.postponed_kill, "");
2988 ac_build_ifcc(&ctx->ac, cond, 7004);
2989 }
2990
2991 LLVMValueRef params[7];
2992 int param_count = 0;
2993
2994 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2995 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2996 const char *atomic_name;
2997 char intrinsic_name[64];
2998 enum ac_atomic_op atomic_subop;
2999 ASSERTED int length;
3000
3001 enum glsl_sampler_dim dim;
3002 bool is_array;
3003 if (bindless) {
3004 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
3005 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
3006 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
3007 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
3008 ASSERTED const GLenum format = nir_intrinsic_format(instr);
3009 assert(format == GL_R32UI || format == GL_R32I);
3010 }
3011 dim = nir_intrinsic_image_dim(instr);
3012 is_array = nir_intrinsic_image_array(instr);
3013 } else {
3014 const struct glsl_type *type = get_image_deref(instr)->type;
3015 dim = glsl_get_sampler_dim(type);
3016 is_array = glsl_sampler_type_is_array(type);
3017 }
3018
3019 struct waterfall_context wctx;
3020 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3021
3022 switch (instr->intrinsic) {
3023 case nir_intrinsic_bindless_image_atomic_add:
3024 case nir_intrinsic_image_deref_atomic_add:
3025 atomic_name = "add";
3026 atomic_subop = ac_atomic_add;
3027 break;
3028 case nir_intrinsic_bindless_image_atomic_imin:
3029 case nir_intrinsic_image_deref_atomic_imin:
3030 atomic_name = "smin";
3031 atomic_subop = ac_atomic_smin;
3032 break;
3033 case nir_intrinsic_bindless_image_atomic_umin:
3034 case nir_intrinsic_image_deref_atomic_umin:
3035 atomic_name = "umin";
3036 atomic_subop = ac_atomic_umin;
3037 break;
3038 case nir_intrinsic_bindless_image_atomic_imax:
3039 case nir_intrinsic_image_deref_atomic_imax:
3040 atomic_name = "smax";
3041 atomic_subop = ac_atomic_smax;
3042 break;
3043 case nir_intrinsic_bindless_image_atomic_umax:
3044 case nir_intrinsic_image_deref_atomic_umax:
3045 atomic_name = "umax";
3046 atomic_subop = ac_atomic_umax;
3047 break;
3048 case nir_intrinsic_bindless_image_atomic_and:
3049 case nir_intrinsic_image_deref_atomic_and:
3050 atomic_name = "and";
3051 atomic_subop = ac_atomic_and;
3052 break;
3053 case nir_intrinsic_bindless_image_atomic_or:
3054 case nir_intrinsic_image_deref_atomic_or:
3055 atomic_name = "or";
3056 atomic_subop = ac_atomic_or;
3057 break;
3058 case nir_intrinsic_bindless_image_atomic_xor:
3059 case nir_intrinsic_image_deref_atomic_xor:
3060 atomic_name = "xor";
3061 atomic_subop = ac_atomic_xor;
3062 break;
3063 case nir_intrinsic_bindless_image_atomic_exchange:
3064 case nir_intrinsic_image_deref_atomic_exchange:
3065 atomic_name = "swap";
3066 atomic_subop = ac_atomic_swap;
3067 break;
3068 case nir_intrinsic_bindless_image_atomic_comp_swap:
3069 case nir_intrinsic_image_deref_atomic_comp_swap:
3070 atomic_name = "cmpswap";
3071 atomic_subop = 0; /* not used */
3072 break;
3073 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3074 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3075 atomic_name = "inc";
3076 atomic_subop = ac_atomic_inc_wrap;
3077 break;
3078 }
3079 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3080 case nir_intrinsic_image_deref_atomic_dec_wrap:
3081 atomic_name = "dec";
3082 atomic_subop = ac_atomic_dec_wrap;
3083 break;
3084 default:
3085 abort();
3086 }
3087
3088 if (cmpswap)
3089 params[param_count++] = get_src(ctx, instr->src[4]);
3090 params[param_count++] = get_src(ctx, instr->src[3]);
3091
3092 LLVMValueRef result;
3093 if (dim == GLSL_SAMPLER_DIM_BUF) {
3094 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3095 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3096 ctx->ac.i32_0, ""); /* vindex */
3097 params[param_count++] = ctx->ac.i32_0; /* voffset */
3098 if (LLVM_VERSION_MAJOR >= 9) {
3099 /* XXX: The new raw/struct atomic intrinsics are buggy
3100 * with LLVM 8, see r358579.
3101 */
3102 params[param_count++] = ctx->ac.i32_0; /* soffset */
3103 params[param_count++] = ctx->ac.i32_0; /* slc */
3104
3105 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3106 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3107 } else {
3108 params[param_count++] = ctx->ac.i1false; /* slc */
3109
3110 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3111 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3112 }
3113
3114 assert(length < sizeof(intrinsic_name));
3115 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3116 params, param_count, 0);
3117 } else {
3118 struct ac_image_args args = {};
3119 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3120 args.atomic = atomic_subop;
3121 args.data[0] = params[0];
3122 if (cmpswap)
3123 args.data[1] = params[1];
3124 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3125 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3126 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3127
3128 result = ac_build_image_opcode(&ctx->ac, &args);
3129 }
3130
3131 result = exit_waterfall(ctx, &wctx, result);
3132 if (ctx->ac.postponed_kill)
3133 ac_build_endif(&ctx->ac, 7004);
3134 return result;
3135 }
3136
3137 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3138 nir_intrinsic_instr *instr)
3139 {
3140 struct waterfall_context wctx;
3141 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3142 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3143
3144 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3145
3146 return exit_waterfall(ctx, &wctx, ret);
3147 }
3148
3149 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3150 const nir_intrinsic_instr *instr,
3151 bool bindless)
3152 {
3153 LLVMValueRef res;
3154
3155 enum glsl_sampler_dim dim;
3156 bool is_array;
3157 if (bindless) {
3158 dim = nir_intrinsic_image_dim(instr);
3159 is_array = nir_intrinsic_image_array(instr);
3160 } else {
3161 const struct glsl_type *type = get_image_deref(instr)->type;
3162 dim = glsl_get_sampler_dim(type);
3163 is_array = glsl_sampler_type_is_array(type);
3164 }
3165
3166 struct waterfall_context wctx;
3167 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3168
3169 if (dim == GLSL_SAMPLER_DIM_BUF) {
3170 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3171 } else {
3172
3173 struct ac_image_args args = { 0 };
3174
3175 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3176 args.dmask = 0xf;
3177 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3178 args.opcode = ac_image_get_resinfo;
3179 assert(nir_src_as_uint(instr->src[1]) == 0);
3180 args.lod = ctx->ac.i32_0;
3181 args.attributes = AC_FUNC_ATTR_READNONE;
3182
3183 res = ac_build_image_opcode(&ctx->ac, &args);
3184
3185 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3186
3187 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3188 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3189 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3190 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3191 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3192 }
3193
3194 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3195 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3196 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3197 ctx->ac.i32_1, "");
3198 }
3199 }
3200 return exit_waterfall(ctx, &wctx, res);
3201 }
3202
3203 static void emit_membar(struct ac_llvm_context *ac,
3204 const nir_intrinsic_instr *instr)
3205 {
3206 unsigned wait_flags = 0;
3207
3208 switch (instr->intrinsic) {
3209 case nir_intrinsic_memory_barrier:
3210 case nir_intrinsic_group_memory_barrier:
3211 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3212 break;
3213 case nir_intrinsic_memory_barrier_buffer:
3214 case nir_intrinsic_memory_barrier_image:
3215 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3216 break;
3217 case nir_intrinsic_memory_barrier_shared:
3218 wait_flags = AC_WAIT_LGKM;
3219 break;
3220 default:
3221 break;
3222 }
3223
3224 ac_build_waitcnt(ac, wait_flags);
3225 }
3226
3227 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3228 {
3229 /* GFX6 only (thanks to a hw bug workaround):
3230 * The real barrier instruction isn’t needed, because an entire patch
3231 * always fits into a single wave.
3232 */
3233 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3234 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3235 return;
3236 }
3237 ac_build_s_barrier(ac);
3238 }
3239
3240 static void emit_discard(struct ac_nir_context *ctx,
3241 const nir_intrinsic_instr *instr)
3242 {
3243 LLVMValueRef cond;
3244
3245 if (instr->intrinsic == nir_intrinsic_discard_if) {
3246 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3247 get_src(ctx, instr->src[0]),
3248 ctx->ac.i32_0, "");
3249 } else {
3250 assert(instr->intrinsic == nir_intrinsic_discard);
3251 cond = ctx->ac.i1false;
3252 }
3253
3254 ac_build_kill_if_false(&ctx->ac, cond);
3255 }
3256
3257 static void emit_demote(struct ac_nir_context *ctx,
3258 const nir_intrinsic_instr *instr)
3259 {
3260 LLVMValueRef cond;
3261
3262 if (instr->intrinsic == nir_intrinsic_demote_if) {
3263 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3264 get_src(ctx, instr->src[0]),
3265 ctx->ac.i32_0, "");
3266 } else {
3267 assert(instr->intrinsic == nir_intrinsic_demote);
3268 cond = ctx->ac.i1false;
3269 }
3270
3271 /* Kill immediately while maintaining WQM. */
3272 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3273
3274 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3275 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3276 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3277 return;
3278 }
3279
3280 static LLVMValueRef
3281 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3282 {
3283 LLVMValueRef result;
3284 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3285 result = LLVMBuildAnd(ctx->ac.builder,
3286 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3287 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3288
3289 if (ctx->ac.wave_size == 32)
3290 result = LLVMBuildLShr(ctx->ac.builder, result,
3291 LLVMConstInt(ctx->ac.i32, 1, false), "");
3292
3293 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3294 }
3295
3296 static LLVMValueRef
3297 visit_load_subgroup_id(struct ac_nir_context *ctx)
3298 {
3299 if (ctx->stage == MESA_SHADER_COMPUTE) {
3300 LLVMValueRef result;
3301 result = LLVMBuildAnd(ctx->ac.builder,
3302 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3303 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3304 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3305 } else {
3306 return LLVMConstInt(ctx->ac.i32, 0, false);
3307 }
3308 }
3309
3310 static LLVMValueRef
3311 visit_load_num_subgroups(struct ac_nir_context *ctx)
3312 {
3313 if (ctx->stage == MESA_SHADER_COMPUTE) {
3314 return LLVMBuildAnd(ctx->ac.builder,
3315 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3316 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3317 } else {
3318 return LLVMConstInt(ctx->ac.i32, 1, false);
3319 }
3320 }
3321
3322 static LLVMValueRef
3323 visit_first_invocation(struct ac_nir_context *ctx)
3324 {
3325 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3326 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3327
3328 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3329 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3330 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3331 ctx->ac.iN_wavemask, args, 2,
3332 AC_FUNC_ATTR_NOUNWIND |
3333 AC_FUNC_ATTR_READNONE);
3334
3335 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3336 }
3337
3338 static LLVMValueRef
3339 visit_load_shared(struct ac_nir_context *ctx,
3340 const nir_intrinsic_instr *instr)
3341 {
3342 LLVMValueRef values[4], derived_ptr, index, ret;
3343
3344 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3345 instr->dest.ssa.bit_size);
3346
3347 for (int chan = 0; chan < instr->num_components; chan++) {
3348 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3349 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3350 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3351 }
3352
3353 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3354 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3355 }
3356
3357 static void
3358 visit_store_shared(struct ac_nir_context *ctx,
3359 const nir_intrinsic_instr *instr)
3360 {
3361 LLVMValueRef derived_ptr, data,index;
3362 LLVMBuilderRef builder = ctx->ac.builder;
3363
3364 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3365 instr->src[0].ssa->bit_size);
3366 LLVMValueRef src = get_src(ctx, instr->src[0]);
3367
3368 int writemask = nir_intrinsic_write_mask(instr);
3369 for (int chan = 0; chan < 4; chan++) {
3370 if (!(writemask & (1 << chan))) {
3371 continue;
3372 }
3373 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3374 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3375 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3376 LLVMBuildStore(builder, data, derived_ptr);
3377 }
3378 }
3379
3380 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3381 const nir_intrinsic_instr *instr,
3382 LLVMValueRef ptr, int src_idx)
3383 {
3384 if (ctx->ac.postponed_kill) {
3385 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3386 ctx->ac.postponed_kill, "");
3387 ac_build_ifcc(&ctx->ac, cond, 7005);
3388 }
3389
3390 LLVMValueRef result;
3391 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3392
3393 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3394
3395 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3396 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3397 if (deref->mode == nir_var_mem_global) {
3398 /* use "singlethread" sync scope to implement relaxed ordering */
3399 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3400
3401 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3402 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3403 }
3404 }
3405
3406 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3407 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3408 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3409 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3410 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3411 } else {
3412 LLVMAtomicRMWBinOp op;
3413 switch (instr->intrinsic) {
3414 case nir_intrinsic_shared_atomic_add:
3415 case nir_intrinsic_deref_atomic_add:
3416 op = LLVMAtomicRMWBinOpAdd;
3417 break;
3418 case nir_intrinsic_shared_atomic_umin:
3419 case nir_intrinsic_deref_atomic_umin:
3420 op = LLVMAtomicRMWBinOpUMin;
3421 break;
3422 case nir_intrinsic_shared_atomic_umax:
3423 case nir_intrinsic_deref_atomic_umax:
3424 op = LLVMAtomicRMWBinOpUMax;
3425 break;
3426 case nir_intrinsic_shared_atomic_imin:
3427 case nir_intrinsic_deref_atomic_imin:
3428 op = LLVMAtomicRMWBinOpMin;
3429 break;
3430 case nir_intrinsic_shared_atomic_imax:
3431 case nir_intrinsic_deref_atomic_imax:
3432 op = LLVMAtomicRMWBinOpMax;
3433 break;
3434 case nir_intrinsic_shared_atomic_and:
3435 case nir_intrinsic_deref_atomic_and:
3436 op = LLVMAtomicRMWBinOpAnd;
3437 break;
3438 case nir_intrinsic_shared_atomic_or:
3439 case nir_intrinsic_deref_atomic_or:
3440 op = LLVMAtomicRMWBinOpOr;
3441 break;
3442 case nir_intrinsic_shared_atomic_xor:
3443 case nir_intrinsic_deref_atomic_xor:
3444 op = LLVMAtomicRMWBinOpXor;
3445 break;
3446 case nir_intrinsic_shared_atomic_exchange:
3447 case nir_intrinsic_deref_atomic_exchange:
3448 op = LLVMAtomicRMWBinOpXchg;
3449 break;
3450 #if LLVM_VERSION_MAJOR >= 10
3451 case nir_intrinsic_shared_atomic_fadd:
3452 case nir_intrinsic_deref_atomic_fadd:
3453 op = LLVMAtomicRMWBinOpFAdd;
3454 break;
3455 #endif
3456 default:
3457 return NULL;
3458 }
3459
3460 LLVMValueRef val;
3461
3462 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3463 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3464 val = ac_to_float(&ctx->ac, src);
3465 } else {
3466 val = ac_to_integer(&ctx->ac, src);
3467 }
3468
3469 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3470 }
3471
3472 if (ctx->ac.postponed_kill)
3473 ac_build_endif(&ctx->ac, 7005);
3474 return result;
3475 }
3476
3477 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3478 {
3479 LLVMValueRef values[2];
3480 LLVMValueRef pos[2];
3481
3482 pos[0] = ac_to_float(&ctx->ac,
3483 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3484 pos[1] = ac_to_float(&ctx->ac,
3485 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3486
3487 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3488 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3489 return ac_build_gather_values(&ctx->ac, values, 2);
3490 }
3491
3492 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3493 enum glsl_interp_mode interp, unsigned location)
3494 {
3495 switch (interp) {
3496 case INTERP_MODE_FLAT:
3497 default:
3498 return NULL;
3499 case INTERP_MODE_SMOOTH:
3500 case INTERP_MODE_NONE:
3501 if (location == INTERP_CENTER)
3502 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3503 else if (location == INTERP_CENTROID)
3504 return ctx->abi->persp_centroid;
3505 else if (location == INTERP_SAMPLE)
3506 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3507 break;
3508 case INTERP_MODE_NOPERSPECTIVE:
3509 if (location == INTERP_CENTER)
3510 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3511 else if (location == INTERP_CENTROID)
3512 return ctx->abi->linear_centroid;
3513 else if (location == INTERP_SAMPLE)
3514 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3515 break;
3516 }
3517 return NULL;
3518 }
3519
3520 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3521 unsigned mode)
3522 {
3523 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3524 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3525 }
3526
3527 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3528 unsigned mode,
3529 LLVMValueRef offset)
3530 {
3531 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3532 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3533 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3534
3535 LLVMValueRef ij_out[2];
3536 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3537
3538 /*
3539 * take the I then J parameters, and the DDX/Y for it, and
3540 * calculate the IJ inputs for the interpolator.
3541 * temp1 = ddx * offset/sample.x + I;
3542 * interp_param.I = ddy * offset/sample.y + temp1;
3543 * temp1 = ddx * offset/sample.x + J;
3544 * interp_param.J = ddy * offset/sample.y + temp1;
3545 */
3546 for (unsigned i = 0; i < 2; i++) {
3547 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3548 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3549 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3550 ddxy_out, ix_ll, "");
3551 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3552 ddxy_out, iy_ll, "");
3553 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3554 interp_param, ix_ll, "");
3555 LLVMValueRef temp1, temp2;
3556
3557 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3558 ctx->ac.f32, "");
3559
3560 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3561 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3562
3563 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3564 temp2, ctx->ac.i32, "");
3565 }
3566 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3567 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3568 }
3569
3570 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3571 unsigned mode)
3572 {
3573 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3574 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3575 }
3576
3577 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3578 unsigned mode,
3579 LLVMValueRef sample_id)
3580 {
3581 if (ctx->abi->interp_at_sample_force_center)
3582 return barycentric_center(ctx, mode);
3583
3584 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3585
3586 /* fetch sample ID */
3587 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3588
3589 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3590 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3591 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3592 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3593 LLVMValueRef coords[] = { src_c0, src_c1 };
3594 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3595
3596 return barycentric_offset(ctx, mode, offset);
3597 }
3598
3599
3600 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3601 unsigned mode)
3602 {
3603 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3604 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3605 }
3606
3607 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3608 {
3609 return LLVMBuildBitCast(ctx->ac.builder,
3610 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3611 ctx->ac.v3i32, "");
3612 }
3613
3614 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3615 LLVMValueRef interp_param,
3616 unsigned index, unsigned comp_start,
3617 unsigned num_components,
3618 unsigned bitsize)
3619 {
3620 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3621 LLVMValueRef interp_param_f;
3622
3623 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3624 interp_param, ctx->ac.v2f32, "");
3625 LLVMValueRef i = LLVMBuildExtractElement(
3626 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3627 LLVMValueRef j = LLVMBuildExtractElement(
3628 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3629
3630 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3631 if (ctx->verified_interp &&
3632 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3633 LLVMValueRef args[2];
3634 args[0] = i;
3635 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3636 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3637 args, 2, AC_FUNC_ATTR_READNONE);
3638 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3639 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3640 }
3641
3642 LLVMValueRef values[4];
3643 assert(bitsize == 16 || bitsize == 32);
3644 for (unsigned comp = 0; comp < num_components; comp++) {
3645 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3646 if (bitsize == 16) {
3647 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3648 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3649 } else {
3650 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3651 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3652 }
3653 }
3654
3655 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3656 }
3657
3658 static LLVMValueRef visit_load(struct ac_nir_context *ctx,
3659 nir_intrinsic_instr *instr, bool is_output)
3660 {
3661 LLVMValueRef values[8];
3662 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
3663 LLVMTypeRef component_type;
3664 unsigned base = nir_intrinsic_base(instr);
3665 unsigned component = nir_intrinsic_component(instr);
3666 unsigned count = instr->dest.ssa.num_components *
3667 (instr->dest.ssa.bit_size == 64 ? 2 : 1);
3668 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
3669 LLVMValueRef vertex_index =
3670 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
3671 nir_src offset = *nir_get_io_offset_src(instr);
3672 LLVMValueRef indir_index = NULL;
3673
3674 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
3675 component_type = LLVMGetElementType(dest_type);
3676 else
3677 component_type = dest_type;
3678
3679 if (nir_src_is_const(offset))
3680 assert(nir_src_as_uint(offset) == 0);
3681 else
3682 indir_index = get_src(ctx, offset);
3683
3684 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
3685 (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) {
3686 LLVMValueRef result =
3687 ctx->abi->load_tess_varyings(ctx->abi, component_type,
3688 vertex_index, indir_index,
3689 0, 0, base * 4,
3690 component,
3691 instr->num_components,
3692 false, false, !is_output);
3693 if (instr->dest.ssa.bit_size == 16) {
3694 result = ac_to_integer(&ctx->ac, result);
3695 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
3696 }
3697 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3698 }
3699
3700 /* No indirect indexing is allowed after this point. */
3701 assert(!indir_index);
3702
3703 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3704 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3705 assert(nir_src_is_const(*vertex_index_src));
3706
3707 return ctx->abi->load_inputs(ctx->abi, 0, base * 4, component,
3708 instr->num_components,
3709 nir_src_as_uint(*vertex_index_src),
3710 0, type);
3711 }
3712
3713 if (ctx->stage == MESA_SHADER_FRAGMENT && is_output &&
3714 nir_intrinsic_io_semantics(instr).fb_fetch_output)
3715 return ctx->abi->emit_fbfetch(ctx->abi);
3716
3717 /* Other non-fragment cases have inputs and outputs in temporaries. */
3718 if (ctx->stage != MESA_SHADER_FRAGMENT) {
3719 for (unsigned chan = component; chan < count + component; chan++) {
3720 if (is_output) {
3721 values[chan] = LLVMBuildLoad(ctx->ac.builder,
3722 ctx->abi->outputs[base * 4 + chan], "");
3723 } else {
3724 values[chan] = ctx->abi->inputs[base * 4 + chan];
3725 if (!values[chan])
3726 values[chan] = LLVMGetUndef(ctx->ac.i32);
3727 }
3728 }
3729 LLVMValueRef result = ac_build_varying_gather_values(&ctx->ac, values, count, component);
3730 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3731 }
3732
3733 /* Fragment shader inputs. */
3734 unsigned vertex_id = 2; /* P0 */
3735
3736 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3737 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3738
3739 switch (src0[0].i32) {
3740 case 0:
3741 vertex_id = 2;
3742 break;
3743 case 1:
3744 vertex_id = 0;
3745 break;
3746 case 2:
3747 vertex_id = 1;
3748 break;
3749 default:
3750 unreachable("Invalid vertex index");
3751 }
3752 }
3753
3754 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, base, false);
3755
3756 for (unsigned chan = 0; chan < count; chan++) {
3757 if (component + chan > 4)
3758 attr_number = LLVMConstInt(ctx->ac.i32, base + 1, false);
3759 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3760 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3761 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3762 llvm_chan,
3763 attr_number,
3764 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3765 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3766 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3767 instr->dest.ssa.bit_size == 16 ? ctx->ac.i16
3768 : ctx->ac.i32, "");
3769 }
3770
3771 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, count);
3772 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3773 }
3774
3775 static void visit_intrinsic(struct ac_nir_context *ctx,
3776 nir_intrinsic_instr *instr)
3777 {
3778 LLVMValueRef result = NULL;
3779
3780 switch (instr->intrinsic) {
3781 case nir_intrinsic_ballot:
3782 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3783 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3784 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3785 break;
3786 case nir_intrinsic_read_invocation:
3787 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3788 get_src(ctx, instr->src[1]));
3789 break;
3790 case nir_intrinsic_read_first_invocation:
3791 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3792 break;
3793 case nir_intrinsic_load_subgroup_invocation:
3794 result = ac_get_thread_id(&ctx->ac);
3795 break;
3796 case nir_intrinsic_load_work_group_id: {
3797 LLVMValueRef values[3];
3798
3799 for (int i = 0; i < 3; i++) {
3800 values[i] = ctx->args->workgroup_ids[i].used ?
3801 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3802 }
3803
3804 result = ac_build_gather_values(&ctx->ac, values, 3);
3805 break;
3806 }
3807 case nir_intrinsic_load_base_vertex:
3808 case nir_intrinsic_load_first_vertex:
3809 result = ctx->abi->load_base_vertex(ctx->abi);
3810 break;
3811 case nir_intrinsic_load_local_group_size:
3812 result = ctx->abi->load_local_group_size(ctx->abi);
3813 break;
3814 case nir_intrinsic_load_vertex_id:
3815 result = LLVMBuildAdd(ctx->ac.builder,
3816 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3817 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3818 break;
3819 case nir_intrinsic_load_vertex_id_zero_base: {
3820 result = ctx->abi->vertex_id;
3821 break;
3822 }
3823 case nir_intrinsic_load_local_invocation_id: {
3824 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3825 break;
3826 }
3827 case nir_intrinsic_load_base_instance:
3828 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3829 break;
3830 case nir_intrinsic_load_draw_id:
3831 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3832 break;
3833 case nir_intrinsic_load_view_index:
3834 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3835 break;
3836 case nir_intrinsic_load_invocation_id:
3837 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3838 result = ac_unpack_param(&ctx->ac,
3839 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3840 8, 5);
3841 } else {
3842 if (ctx->ac.chip_class >= GFX10) {
3843 result = LLVMBuildAnd(ctx->ac.builder,
3844 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3845 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3846 } else {
3847 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3848 }
3849 }
3850 break;
3851 case nir_intrinsic_load_primitive_id:
3852 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3853 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3854 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3855 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3856 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3857 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3858 } else
3859 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3860 break;
3861 case nir_intrinsic_load_sample_id:
3862 result = ac_unpack_param(&ctx->ac,
3863 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3864 8, 4);
3865 break;
3866 case nir_intrinsic_load_sample_pos:
3867 result = load_sample_pos(ctx);
3868 break;
3869 case nir_intrinsic_load_sample_mask_in:
3870 result = ctx->abi->load_sample_mask_in(ctx->abi);
3871 break;
3872 case nir_intrinsic_load_frag_coord: {
3873 LLVMValueRef values[4] = {
3874 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3875 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3876 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3877 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3878 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3879 };
3880 result = ac_to_integer(&ctx->ac,
3881 ac_build_gather_values(&ctx->ac, values, 4));
3882 break;
3883 }
3884 case nir_intrinsic_load_layer_id:
3885 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3886 break;
3887 case nir_intrinsic_load_front_face:
3888 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3889 break;
3890 case nir_intrinsic_load_helper_invocation:
3891 result = ac_build_load_helper_invocation(&ctx->ac);
3892 break;
3893 case nir_intrinsic_is_helper_invocation:
3894 result = ac_build_is_helper_invocation(&ctx->ac);
3895 break;
3896 case nir_intrinsic_load_color0:
3897 result = ctx->abi->color0;
3898 break;
3899 case nir_intrinsic_load_color1:
3900 result = ctx->abi->color1;
3901 break;
3902 case nir_intrinsic_load_user_data_amd:
3903 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3904 result = ctx->abi->user_data;
3905 break;
3906 case nir_intrinsic_load_instance_id:
3907 result = ctx->abi->instance_id;
3908 break;
3909 case nir_intrinsic_load_num_work_groups:
3910 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3911 break;
3912 case nir_intrinsic_load_local_invocation_index:
3913 result = visit_load_local_invocation_index(ctx);
3914 break;
3915 case nir_intrinsic_load_subgroup_id:
3916 result = visit_load_subgroup_id(ctx);
3917 break;
3918 case nir_intrinsic_load_num_subgroups:
3919 result = visit_load_num_subgroups(ctx);
3920 break;
3921 case nir_intrinsic_first_invocation:
3922 result = visit_first_invocation(ctx);
3923 break;
3924 case nir_intrinsic_load_push_constant:
3925 result = visit_load_push_constant(ctx, instr);
3926 break;
3927 case nir_intrinsic_vulkan_resource_index: {
3928 LLVMValueRef index = get_src(ctx, instr->src[0]);
3929 unsigned desc_set = nir_intrinsic_desc_set(instr);
3930 unsigned binding = nir_intrinsic_binding(instr);
3931
3932 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3933 binding);
3934 break;
3935 }
3936 case nir_intrinsic_vulkan_resource_reindex:
3937 result = visit_vulkan_resource_reindex(ctx, instr);
3938 break;
3939 case nir_intrinsic_store_ssbo:
3940 visit_store_ssbo(ctx, instr);
3941 break;
3942 case nir_intrinsic_load_ssbo:
3943 result = visit_load_buffer(ctx, instr);
3944 break;
3945 case nir_intrinsic_ssbo_atomic_add:
3946 case nir_intrinsic_ssbo_atomic_imin:
3947 case nir_intrinsic_ssbo_atomic_umin:
3948 case nir_intrinsic_ssbo_atomic_imax:
3949 case nir_intrinsic_ssbo_atomic_umax:
3950 case nir_intrinsic_ssbo_atomic_and:
3951 case nir_intrinsic_ssbo_atomic_or:
3952 case nir_intrinsic_ssbo_atomic_xor:
3953 case nir_intrinsic_ssbo_atomic_exchange:
3954 case nir_intrinsic_ssbo_atomic_comp_swap:
3955 result = visit_atomic_ssbo(ctx, instr);
3956 break;
3957 case nir_intrinsic_load_ubo:
3958 result = visit_load_ubo_buffer(ctx, instr);
3959 break;
3960 case nir_intrinsic_get_buffer_size:
3961 result = visit_get_buffer_size(ctx, instr);
3962 break;
3963 case nir_intrinsic_load_deref:
3964 result = visit_load_var(ctx, instr);
3965 break;
3966 case nir_intrinsic_store_deref:
3967 visit_store_var(ctx, instr);
3968 break;
3969 case nir_intrinsic_load_input:
3970 case nir_intrinsic_load_input_vertex:
3971 case nir_intrinsic_load_per_vertex_input:
3972 result = visit_load(ctx, instr, false);
3973 break;
3974 case nir_intrinsic_load_output:
3975 case nir_intrinsic_load_per_vertex_output:
3976 result = visit_load(ctx, instr, true);
3977 break;
3978 case nir_intrinsic_store_output:
3979 case nir_intrinsic_store_per_vertex_output:
3980 visit_store_output(ctx, instr);
3981 break;
3982 case nir_intrinsic_load_shared:
3983 result = visit_load_shared(ctx, instr);
3984 break;
3985 case nir_intrinsic_store_shared:
3986 visit_store_shared(ctx, instr);
3987 break;
3988 case nir_intrinsic_bindless_image_samples:
3989 case nir_intrinsic_image_deref_samples:
3990 result = visit_image_samples(ctx, instr);
3991 break;
3992 case nir_intrinsic_bindless_image_load:
3993 result = visit_image_load(ctx, instr, true);
3994 break;
3995 case nir_intrinsic_image_deref_load:
3996 result = visit_image_load(ctx, instr, false);
3997 break;
3998 case nir_intrinsic_bindless_image_store:
3999 visit_image_store(ctx, instr, true);
4000 break;
4001 case nir_intrinsic_image_deref_store:
4002 visit_image_store(ctx, instr, false);
4003 break;
4004 case nir_intrinsic_bindless_image_atomic_add:
4005 case nir_intrinsic_bindless_image_atomic_imin:
4006 case nir_intrinsic_bindless_image_atomic_umin:
4007 case nir_intrinsic_bindless_image_atomic_imax:
4008 case nir_intrinsic_bindless_image_atomic_umax:
4009 case nir_intrinsic_bindless_image_atomic_and:
4010 case nir_intrinsic_bindless_image_atomic_or:
4011 case nir_intrinsic_bindless_image_atomic_xor:
4012 case nir_intrinsic_bindless_image_atomic_exchange:
4013 case nir_intrinsic_bindless_image_atomic_comp_swap:
4014 case nir_intrinsic_bindless_image_atomic_inc_wrap:
4015 case nir_intrinsic_bindless_image_atomic_dec_wrap:
4016 result = visit_image_atomic(ctx, instr, true);
4017 break;
4018 case nir_intrinsic_image_deref_atomic_add:
4019 case nir_intrinsic_image_deref_atomic_imin:
4020 case nir_intrinsic_image_deref_atomic_umin:
4021 case nir_intrinsic_image_deref_atomic_imax:
4022 case nir_intrinsic_image_deref_atomic_umax:
4023 case nir_intrinsic_image_deref_atomic_and:
4024 case nir_intrinsic_image_deref_atomic_or:
4025 case nir_intrinsic_image_deref_atomic_xor:
4026 case nir_intrinsic_image_deref_atomic_exchange:
4027 case nir_intrinsic_image_deref_atomic_comp_swap:
4028 case nir_intrinsic_image_deref_atomic_inc_wrap:
4029 case nir_intrinsic_image_deref_atomic_dec_wrap:
4030 result = visit_image_atomic(ctx, instr, false);
4031 break;
4032 case nir_intrinsic_bindless_image_size:
4033 result = visit_image_size(ctx, instr, true);
4034 break;
4035 case nir_intrinsic_image_deref_size:
4036 result = visit_image_size(ctx, instr, false);
4037 break;
4038 case nir_intrinsic_shader_clock:
4039 result = ac_build_shader_clock(&ctx->ac,
4040 nir_intrinsic_memory_scope(instr));
4041 break;
4042 case nir_intrinsic_discard:
4043 case nir_intrinsic_discard_if:
4044 emit_discard(ctx, instr);
4045 break;
4046 case nir_intrinsic_demote:
4047 case nir_intrinsic_demote_if:
4048 emit_demote(ctx, instr);
4049 break;
4050 case nir_intrinsic_memory_barrier:
4051 case nir_intrinsic_group_memory_barrier:
4052 case nir_intrinsic_memory_barrier_buffer:
4053 case nir_intrinsic_memory_barrier_image:
4054 case nir_intrinsic_memory_barrier_shared:
4055 emit_membar(&ctx->ac, instr);
4056 break;
4057 case nir_intrinsic_scoped_barrier: {
4058 assert(!(nir_intrinsic_memory_semantics(instr) &
4059 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
4060
4061 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
4062
4063 unsigned wait_flags = 0;
4064 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
4065 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
4066 if (modes & nir_var_mem_shared)
4067 wait_flags |= AC_WAIT_LGKM;
4068
4069 if (wait_flags)
4070 ac_build_waitcnt(&ctx->ac, wait_flags);
4071
4072 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
4073 ac_emit_barrier(&ctx->ac, ctx->stage);
4074 break;
4075 }
4076 case nir_intrinsic_memory_barrier_tcs_patch:
4077 break;
4078 case nir_intrinsic_control_barrier:
4079 ac_emit_barrier(&ctx->ac, ctx->stage);
4080 break;
4081 case nir_intrinsic_shared_atomic_add:
4082 case nir_intrinsic_shared_atomic_imin:
4083 case nir_intrinsic_shared_atomic_umin:
4084 case nir_intrinsic_shared_atomic_imax:
4085 case nir_intrinsic_shared_atomic_umax:
4086 case nir_intrinsic_shared_atomic_and:
4087 case nir_intrinsic_shared_atomic_or:
4088 case nir_intrinsic_shared_atomic_xor:
4089 case nir_intrinsic_shared_atomic_exchange:
4090 case nir_intrinsic_shared_atomic_comp_swap:
4091 case nir_intrinsic_shared_atomic_fadd: {
4092 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
4093 instr->src[1].ssa->bit_size);
4094 result = visit_var_atomic(ctx, instr, ptr, 1);
4095 break;
4096 }
4097 case nir_intrinsic_deref_atomic_add:
4098 case nir_intrinsic_deref_atomic_imin:
4099 case nir_intrinsic_deref_atomic_umin:
4100 case nir_intrinsic_deref_atomic_imax:
4101 case nir_intrinsic_deref_atomic_umax:
4102 case nir_intrinsic_deref_atomic_and:
4103 case nir_intrinsic_deref_atomic_or:
4104 case nir_intrinsic_deref_atomic_xor:
4105 case nir_intrinsic_deref_atomic_exchange:
4106 case nir_intrinsic_deref_atomic_comp_swap:
4107 case nir_intrinsic_deref_atomic_fadd: {
4108 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4109 result = visit_var_atomic(ctx, instr, ptr, 1);
4110 break;
4111 }
4112 case nir_intrinsic_load_barycentric_pixel:
4113 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4114 break;
4115 case nir_intrinsic_load_barycentric_centroid:
4116 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4117 break;
4118 case nir_intrinsic_load_barycentric_sample:
4119 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4120 break;
4121 case nir_intrinsic_load_barycentric_model:
4122 result = barycentric_model(ctx);
4123 break;
4124 case nir_intrinsic_load_barycentric_at_offset: {
4125 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4126 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4127 break;
4128 }
4129 case nir_intrinsic_load_barycentric_at_sample: {
4130 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4131 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4132 break;
4133 }
4134 case nir_intrinsic_load_interpolated_input: {
4135 /* We assume any indirect loads have been lowered away */
4136 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4137 assert(offset);
4138 assert(offset[0].i32 == 0);
4139
4140 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4141 unsigned index = nir_intrinsic_base(instr);
4142 unsigned component = nir_intrinsic_component(instr);
4143 result = load_interpolated_input(ctx, interp_param, index,
4144 component,
4145 instr->dest.ssa.num_components,
4146 instr->dest.ssa.bit_size);
4147 break;
4148 }
4149 case nir_intrinsic_emit_vertex:
4150 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4151 break;
4152 case nir_intrinsic_emit_vertex_with_counter: {
4153 unsigned stream = nir_intrinsic_stream_id(instr);
4154 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4155 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4156 next_vertex,
4157 ctx->abi->outputs);
4158 break;
4159 }
4160 case nir_intrinsic_end_primitive:
4161 case nir_intrinsic_end_primitive_with_counter:
4162 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4163 break;
4164 case nir_intrinsic_load_tess_coord:
4165 result = ctx->abi->load_tess_coord(ctx->abi);
4166 break;
4167 case nir_intrinsic_load_tess_level_outer:
4168 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4169 break;
4170 case nir_intrinsic_load_tess_level_inner:
4171 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4172 break;
4173 case nir_intrinsic_load_tess_level_outer_default:
4174 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4175 break;
4176 case nir_intrinsic_load_tess_level_inner_default:
4177 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4178 break;
4179 case nir_intrinsic_load_patch_vertices_in:
4180 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4181 break;
4182 case nir_intrinsic_vote_all: {
4183 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4184 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4185 break;
4186 }
4187 case nir_intrinsic_vote_any: {
4188 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4189 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4190 break;
4191 }
4192 case nir_intrinsic_shuffle:
4193 if (ctx->ac.chip_class == GFX8 ||
4194 ctx->ac.chip_class == GFX9 ||
4195 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4196 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4197 get_src(ctx, instr->src[1]));
4198 } else {
4199 LLVMValueRef src = get_src(ctx, instr->src[0]);
4200 LLVMValueRef index = get_src(ctx, instr->src[1]);
4201 LLVMTypeRef type = LLVMTypeOf(src);
4202 struct waterfall_context wctx;
4203 LLVMValueRef index_val;
4204
4205 index_val = enter_waterfall(ctx, &wctx, index, true);
4206
4207 src = LLVMBuildZExt(ctx->ac.builder, src,
4208 ctx->ac.i32, "");
4209
4210 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4211 ctx->ac.i32,
4212 (LLVMValueRef []) { src, index_val }, 2,
4213 AC_FUNC_ATTR_READNONE |
4214 AC_FUNC_ATTR_CONVERGENT);
4215
4216 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4217
4218 result = exit_waterfall(ctx, &wctx, result);
4219 }
4220 break;
4221 case nir_intrinsic_reduce:
4222 result = ac_build_reduce(&ctx->ac,
4223 get_src(ctx, instr->src[0]),
4224 instr->const_index[0],
4225 instr->const_index[1]);
4226 break;
4227 case nir_intrinsic_inclusive_scan:
4228 result = ac_build_inclusive_scan(&ctx->ac,
4229 get_src(ctx, instr->src[0]),
4230 instr->const_index[0]);
4231 break;
4232 case nir_intrinsic_exclusive_scan:
4233 result = ac_build_exclusive_scan(&ctx->ac,
4234 get_src(ctx, instr->src[0]),
4235 instr->const_index[0]);
4236 break;
4237 case nir_intrinsic_quad_broadcast: {
4238 unsigned lane = nir_src_as_uint(instr->src[1]);
4239 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4240 lane, lane, lane, lane);
4241 break;
4242 }
4243 case nir_intrinsic_quad_swap_horizontal:
4244 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4245 break;
4246 case nir_intrinsic_quad_swap_vertical:
4247 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4248 break;
4249 case nir_intrinsic_quad_swap_diagonal:
4250 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4251 break;
4252 case nir_intrinsic_quad_swizzle_amd: {
4253 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4254 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4255 mask & 0x3, (mask >> 2) & 0x3,
4256 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4257 break;
4258 }
4259 case nir_intrinsic_masked_swizzle_amd: {
4260 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4261 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4262 break;
4263 }
4264 case nir_intrinsic_write_invocation_amd:
4265 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4266 get_src(ctx, instr->src[1]),
4267 get_src(ctx, instr->src[2]));
4268 break;
4269 case nir_intrinsic_mbcnt_amd:
4270 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4271 break;
4272 case nir_intrinsic_load_scratch: {
4273 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4274 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4275 offset);
4276 LLVMTypeRef comp_type =
4277 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4278 LLVMTypeRef vec_type =
4279 instr->dest.ssa.num_components == 1 ? comp_type :
4280 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4281 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4282 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4283 LLVMPointerType(vec_type, addr_space), "");
4284 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4285 break;
4286 }
4287 case nir_intrinsic_store_scratch: {
4288 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4289 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4290 offset);
4291 LLVMTypeRef comp_type =
4292 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4293 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4294 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4295 LLVMPointerType(comp_type, addr_space), "");
4296 LLVMValueRef src = get_src(ctx, instr->src[0]);
4297 unsigned wrmask = nir_intrinsic_write_mask(instr);
4298 while (wrmask) {
4299 int start, count;
4300 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4301
4302 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4303 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4304 LLVMTypeRef vec_type =
4305 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4306 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4307 offset_ptr,
4308 LLVMPointerType(vec_type, addr_space),
4309 "");
4310 LLVMValueRef offset_src =
4311 ac_extract_components(&ctx->ac, src, start, count);
4312 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4313 }
4314 break;
4315 }
4316 case nir_intrinsic_load_constant: {
4317 unsigned base = nir_intrinsic_base(instr);
4318 unsigned range = nir_intrinsic_range(instr);
4319
4320 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4321 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4322 LLVMConstInt(ctx->ac.i32, base, false), "");
4323
4324 /* Clamp the offset to avoid out-of-bound access because global
4325 * instructions can't handle them.
4326 */
4327 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4328 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4329 offset, size, "");
4330 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4331
4332 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4333 offset);
4334 LLVMTypeRef comp_type =
4335 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4336 LLVMTypeRef vec_type =
4337 instr->dest.ssa.num_components == 1 ? comp_type :
4338 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4339 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4340 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4341 LLVMPointerType(vec_type, addr_space), "");
4342 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4343 break;
4344 }
4345 default:
4346 fprintf(stderr, "Unknown intrinsic: ");
4347 nir_print_instr(&instr->instr, stderr);
4348 fprintf(stderr, "\n");
4349 break;
4350 }
4351 if (result) {
4352 ctx->ssa_defs[instr->dest.ssa.index] = result;
4353 }
4354 }
4355
4356 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4357 unsigned base_index,
4358 unsigned constant_index,
4359 LLVMValueRef dynamic_index)
4360 {
4361 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4362 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4363 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4364
4365 /* Bindless uniforms are 64bit so multiple index by 8 */
4366 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4367 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4368
4369 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4370
4371 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4372 NULL, 0, 0, true, true);
4373
4374 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4375 }
4376
4377 struct sampler_desc_address {
4378 unsigned descriptor_set;
4379 unsigned base_index; /* binding in vulkan */
4380 unsigned constant_index;
4381 LLVMValueRef dynamic_index;
4382 bool image;
4383 bool bindless;
4384 };
4385
4386 static struct sampler_desc_address
4387 get_sampler_desc_internal(struct ac_nir_context *ctx,
4388 nir_deref_instr *deref_instr,
4389 const nir_instr *instr,
4390 bool image)
4391 {
4392 LLVMValueRef index = NULL;
4393 unsigned constant_index = 0;
4394 unsigned descriptor_set;
4395 unsigned base_index;
4396 bool bindless = false;
4397
4398 if (!deref_instr) {
4399 descriptor_set = 0;
4400 if (image) {
4401 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4402 base_index = 0;
4403 bindless = true;
4404 index = get_src(ctx, img_instr->src[0]);
4405 } else {
4406 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4407 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4408 nir_tex_src_sampler_handle);
4409 if (sampSrcIdx != -1) {
4410 base_index = 0;
4411 bindless = true;
4412 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4413 } else {
4414 assert(tex_instr && !image);
4415 base_index = tex_instr->sampler_index;
4416 }
4417 }
4418 } else {
4419 while(deref_instr->deref_type != nir_deref_type_var) {
4420 if (deref_instr->deref_type == nir_deref_type_array) {
4421 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4422 if (!array_size)
4423 array_size = 1;
4424
4425 if (nir_src_is_const(deref_instr->arr.index)) {
4426 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4427 } else {
4428 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4429
4430 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4431 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4432
4433 if (!index)
4434 index = indirect;
4435 else
4436 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4437 }
4438
4439 deref_instr = nir_src_as_deref(deref_instr->parent);
4440 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4441 unsigned sidx = deref_instr->strct.index;
4442 deref_instr = nir_src_as_deref(deref_instr->parent);
4443 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4444 } else {
4445 unreachable("Unsupported deref type");
4446 }
4447 }
4448 descriptor_set = deref_instr->var->data.descriptor_set;
4449
4450 if (deref_instr->var->data.bindless) {
4451 /* For now just assert on unhandled variable types */
4452 assert(deref_instr->var->data.mode == nir_var_uniform);
4453
4454 base_index = deref_instr->var->data.driver_location;
4455 bindless = true;
4456
4457 index = index ? index : ctx->ac.i32_0;
4458 index = get_bindless_index_from_uniform(ctx, base_index,
4459 constant_index, index);
4460 } else
4461 base_index = deref_instr->var->data.binding;
4462 }
4463 return (struct sampler_desc_address) {
4464 .descriptor_set = descriptor_set,
4465 .base_index = base_index,
4466 .constant_index = constant_index,
4467 .dynamic_index = index,
4468 .image = image,
4469 .bindless = bindless,
4470 };
4471 }
4472
4473 /* Extract any possibly divergent index into a separate value that can be fed
4474 * into get_sampler_desc with the same arguments. */
4475 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4476 nir_deref_instr *deref_instr,
4477 const nir_instr *instr,
4478 bool image)
4479 {
4480 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4481 return addr.dynamic_index;
4482 }
4483
4484 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4485 nir_deref_instr *deref_instr,
4486 enum ac_descriptor_type desc_type,
4487 const nir_instr *instr,
4488 LLVMValueRef index,
4489 bool image, bool write)
4490 {
4491 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4492 return ctx->abi->load_sampler_desc(ctx->abi,
4493 addr.descriptor_set,
4494 addr.base_index,
4495 addr.constant_index, index,
4496 desc_type, addr.image, write, addr.bindless);
4497 }
4498
4499 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4500 *
4501 * GFX6-GFX7:
4502 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4503 * filtering manually. The driver sets img7 to a mask clearing
4504 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4505 * s_and_b32 samp0, samp0, img7
4506 *
4507 * GFX8:
4508 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4509 */
4510 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4511 LLVMValueRef res, LLVMValueRef samp)
4512 {
4513 LLVMBuilderRef builder = ctx->ac.builder;
4514 LLVMValueRef img7, samp0;
4515
4516 if (ctx->ac.chip_class >= GFX8)
4517 return samp;
4518
4519 img7 = LLVMBuildExtractElement(builder, res,
4520 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4521 samp0 = LLVMBuildExtractElement(builder, samp,
4522 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4523 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4524 return LLVMBuildInsertElement(builder, samp, samp0,
4525 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4526 }
4527
4528 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4529 nir_tex_instr *instr,
4530 struct waterfall_context *wctx,
4531 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4532 LLVMValueRef *fmask_ptr)
4533 {
4534 nir_deref_instr *texture_deref_instr = NULL;
4535 nir_deref_instr *sampler_deref_instr = NULL;
4536 int plane = -1;
4537
4538 for (unsigned i = 0; i < instr->num_srcs; i++) {
4539 switch (instr->src[i].src_type) {
4540 case nir_tex_src_texture_deref:
4541 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4542 break;
4543 case nir_tex_src_sampler_deref:
4544 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4545 break;
4546 case nir_tex_src_plane:
4547 plane = nir_src_as_int(instr->src[i].src);
4548 break;
4549 default:
4550 break;
4551 }
4552 }
4553
4554 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4555 &instr->instr, false);
4556 if (!sampler_deref_instr)
4557 sampler_deref_instr = texture_deref_instr;
4558
4559 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4560 &instr->instr, false);
4561 if (instr->texture_non_uniform)
4562 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4563
4564 if (instr->sampler_non_uniform)
4565 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4566
4567 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4568
4569 if (plane >= 0) {
4570 assert(instr->op != nir_texop_txf_ms &&
4571 instr->op != nir_texop_samples_identical);
4572 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4573
4574 main_descriptor = AC_DESC_PLANE_0 + plane;
4575 }
4576
4577 if (instr->op == nir_texop_fragment_mask_fetch) {
4578 /* The fragment mask is fetched from the compressed
4579 * multisampled surface.
4580 */
4581 main_descriptor = AC_DESC_FMASK;
4582 }
4583
4584 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4585 texture_dynamic_index, false, false);
4586
4587 if (samp_ptr) {
4588 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4589 sampler_dynamic_index, false, false);
4590 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4591 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4592 }
4593 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4594 instr->op == nir_texop_samples_identical))
4595 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4596 &instr->instr, texture_dynamic_index, false, false);
4597 }
4598
4599 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4600 LLVMValueRef coord)
4601 {
4602 coord = ac_to_float(ctx, coord);
4603 coord = ac_build_round(ctx, coord);
4604 coord = ac_to_integer(ctx, coord);
4605 return coord;
4606 }
4607
4608 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4609 {
4610 LLVMValueRef result = NULL;
4611 struct ac_image_args args = { 0 };
4612 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4613 LLVMValueRef ddx = NULL, ddy = NULL;
4614 unsigned offset_src = 0;
4615 struct waterfall_context wctx[2] = {{{0}}};
4616
4617 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4618
4619 for (unsigned i = 0; i < instr->num_srcs; i++) {
4620 switch (instr->src[i].src_type) {
4621 case nir_tex_src_coord: {
4622 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4623 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4624 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4625 break;
4626 }
4627 case nir_tex_src_projector:
4628 break;
4629 case nir_tex_src_comparator:
4630 if (instr->is_shadow) {
4631 args.compare = get_src(ctx, instr->src[i].src);
4632 args.compare = ac_to_float(&ctx->ac, args.compare);
4633 }
4634 break;
4635 case nir_tex_src_offset:
4636 args.offset = get_src(ctx, instr->src[i].src);
4637 offset_src = i;
4638 break;
4639 case nir_tex_src_bias:
4640 args.bias = get_src(ctx, instr->src[i].src);
4641 break;
4642 case nir_tex_src_lod: {
4643 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4644 args.level_zero = true;
4645 else
4646 args.lod = get_src(ctx, instr->src[i].src);
4647 break;
4648 }
4649 case nir_tex_src_ms_index:
4650 sample_index = get_src(ctx, instr->src[i].src);
4651 break;
4652 case nir_tex_src_ms_mcs:
4653 break;
4654 case nir_tex_src_ddx:
4655 ddx = get_src(ctx, instr->src[i].src);
4656 break;
4657 case nir_tex_src_ddy:
4658 ddy = get_src(ctx, instr->src[i].src);
4659 break;
4660 case nir_tex_src_min_lod:
4661 args.min_lod = get_src(ctx, instr->src[i].src);
4662 break;
4663 case nir_tex_src_texture_offset:
4664 case nir_tex_src_sampler_offset:
4665 case nir_tex_src_plane:
4666 default:
4667 break;
4668 }
4669 }
4670
4671 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4672 result = get_buffer_size(ctx, args.resource, true);
4673 goto write_result;
4674 }
4675
4676 if (instr->op == nir_texop_texture_samples) {
4677 LLVMValueRef res, samples, is_msaa;
4678 LLVMValueRef default_sample;
4679
4680 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4681 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4682 LLVMConstInt(ctx->ac.i32, 3, false), "");
4683 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4684 LLVMConstInt(ctx->ac.i32, 28, false), "");
4685 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4686 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4687 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4688 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4689
4690 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4691 LLVMConstInt(ctx->ac.i32, 16, false), "");
4692 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4693 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4694 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4695 samples, "");
4696
4697 if (ctx->abi->robust_buffer_access) {
4698 LLVMValueRef dword1, is_null_descriptor;
4699
4700 /* Extract the second dword of the descriptor, if it's
4701 * all zero, then it's a null descriptor.
4702 */
4703 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4704 LLVMConstInt(ctx->ac.i32, 1, false), "");
4705 is_null_descriptor =
4706 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4707 LLVMConstInt(ctx->ac.i32, 0, false), "");
4708 default_sample =
4709 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4710 ctx->ac.i32_0, ctx->ac.i32_1, "");
4711 } else {
4712 default_sample = ctx->ac.i32_1;
4713 }
4714
4715 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4716 default_sample, "");
4717 result = samples;
4718 goto write_result;
4719 }
4720
4721 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4722 LLVMValueRef offset[3], pack;
4723 for (unsigned chan = 0; chan < 3; ++chan)
4724 offset[chan] = ctx->ac.i32_0;
4725
4726 unsigned num_components = ac_get_llvm_num_components(args.offset);
4727 for (unsigned chan = 0; chan < num_components; chan++) {
4728 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4729 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4730 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4731 if (chan)
4732 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4733 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4734 }
4735 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4736 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4737 args.offset = pack;
4738 }
4739
4740 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4741 * OpenGL 4.5 spec says:
4742 *
4743 * "If the texture’s internal format indicates a fixed-point
4744 * depth texture, then D_t and D_ref are clamped to the
4745 * range [0, 1]; otherwise no clamping is performed."
4746 *
4747 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4748 * so the depth comparison value isn't clamped for Z16 and
4749 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4750 * an explicitly clamped 32-bit float format.
4751 */
4752 if (args.compare &&
4753 ctx->ac.chip_class >= GFX8 &&
4754 ctx->ac.chip_class <= GFX9 &&
4755 ctx->abi->clamp_shadow_reference) {
4756 LLVMValueRef upgraded, clamped;
4757
4758 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4759 LLVMConstInt(ctx->ac.i32, 3, false), "");
4760 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4761 LLVMConstInt(ctx->ac.i32, 29, false), "");
4762 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4763 clamped = ac_build_clamp(&ctx->ac, args.compare);
4764 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4765 args.compare, "");
4766 }
4767
4768 /* pack derivatives */
4769 if (ddx || ddy) {
4770 int num_src_deriv_channels, num_dest_deriv_channels;
4771 switch (instr->sampler_dim) {
4772 case GLSL_SAMPLER_DIM_3D:
4773 case GLSL_SAMPLER_DIM_CUBE:
4774 num_src_deriv_channels = 3;
4775 num_dest_deriv_channels = 3;
4776 break;
4777 case GLSL_SAMPLER_DIM_2D:
4778 default:
4779 num_src_deriv_channels = 2;
4780 num_dest_deriv_channels = 2;
4781 break;
4782 case GLSL_SAMPLER_DIM_1D:
4783 num_src_deriv_channels = 1;
4784 if (ctx->ac.chip_class == GFX9) {
4785 num_dest_deriv_channels = 2;
4786 } else {
4787 num_dest_deriv_channels = 1;
4788 }
4789 break;
4790 }
4791
4792 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4793 args.derivs[i] = ac_to_float(&ctx->ac,
4794 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4795 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4796 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4797 }
4798 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4799 args.derivs[i] = ctx->ac.f32_0;
4800 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4801 }
4802 }
4803
4804 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4805 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4806 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4807 if (instr->coord_components == 3)
4808 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4809 ac_prepare_cube_coords(&ctx->ac,
4810 instr->op == nir_texop_txd, instr->is_array,
4811 instr->op == nir_texop_lod, args.coords, args.derivs);
4812 }
4813
4814 /* Texture coordinates fixups */
4815 if (instr->coord_components > 1 &&
4816 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4817 instr->is_array &&
4818 instr->op != nir_texop_txf) {
4819 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4820 }
4821
4822 if (instr->coord_components > 2 &&
4823 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4824 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4825 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4826 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4827 instr->is_array &&
4828 instr->op != nir_texop_txf &&
4829 instr->op != nir_texop_txf_ms &&
4830 instr->op != nir_texop_fragment_fetch &&
4831 instr->op != nir_texop_fragment_mask_fetch) {
4832 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4833 }
4834
4835 if (ctx->ac.chip_class == GFX9 &&
4836 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4837 instr->op != nir_texop_lod) {
4838 LLVMValueRef filler;
4839 if (instr->op == nir_texop_txf)
4840 filler = ctx->ac.i32_0;
4841 else
4842 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4843
4844 if (instr->is_array)
4845 args.coords[2] = args.coords[1];
4846 args.coords[1] = filler;
4847 }
4848
4849 /* Pack sample index */
4850 if (sample_index && (instr->op == nir_texop_txf_ms ||
4851 instr->op == nir_texop_fragment_fetch))
4852 args.coords[instr->coord_components] = sample_index;
4853
4854 if (instr->op == nir_texop_samples_identical) {
4855 struct ac_image_args txf_args = { 0 };
4856 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4857
4858 txf_args.dmask = 0xf;
4859 txf_args.resource = fmask_ptr;
4860 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4861 result = build_tex_intrinsic(ctx, instr, &txf_args);
4862
4863 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4864 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4865 goto write_result;
4866 }
4867
4868 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4869 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4870 instr->op != nir_texop_txs &&
4871 instr->op != nir_texop_fragment_fetch &&
4872 instr->op != nir_texop_fragment_mask_fetch) {
4873 unsigned sample_chan = instr->is_array ? 3 : 2;
4874 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4875 &ctx->ac, args.coords[0], args.coords[1],
4876 instr->is_array ? args.coords[2] : NULL,
4877 args.coords[sample_chan], fmask_ptr);
4878 }
4879
4880 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4881 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4882 num_offsets = MIN2(num_offsets, instr->coord_components);
4883 for (unsigned i = 0; i < num_offsets; ++i) {
4884 args.coords[i] = LLVMBuildAdd(
4885 ctx->ac.builder, args.coords[i],
4886 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4887 }
4888 args.offset = NULL;
4889 }
4890
4891 /* DMASK was repurposed for GATHER4. 4 components are always
4892 * returned and DMASK works like a swizzle - it selects
4893 * the component to fetch. The only valid DMASK values are
4894 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4895 * (red,red,red,red) etc.) The ISA document doesn't mention
4896 * this.
4897 */
4898 args.dmask = 0xf;
4899 if (instr->op == nir_texop_tg4) {
4900 if (instr->is_shadow)
4901 args.dmask = 1;
4902 else
4903 args.dmask = 1 << instr->component;
4904 }
4905
4906 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4907 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4908 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4909 }
4910
4911 /* Adjust the number of coordinates because we only need (x,y) for 2D
4912 * multisampled images and (x,y,layer) for 2D multisampled layered
4913 * images or for multisampled input attachments.
4914 */
4915 if (instr->op == nir_texop_fragment_mask_fetch) {
4916 if (args.dim == ac_image_2dmsaa) {
4917 args.dim = ac_image_2d;
4918 } else {
4919 assert(args.dim == ac_image_2darraymsaa);
4920 args.dim = ac_image_2darray;
4921 }
4922 }
4923
4924 assert(instr->dest.is_ssa);
4925 args.d16 = instr->dest.ssa.bit_size == 16;
4926
4927 result = build_tex_intrinsic(ctx, instr, &args);
4928
4929 if (instr->op == nir_texop_query_levels)
4930 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4931 else if (instr->is_shadow && instr->is_new_style_shadow &&
4932 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4933 instr->op != nir_texop_tg4)
4934 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4935 else if (instr->op == nir_texop_txs &&
4936 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4937 instr->is_array) {
4938 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4939 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4940 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4941 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4942 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4943 } else if (ctx->ac.chip_class == GFX9 &&
4944 instr->op == nir_texop_txs &&
4945 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4946 instr->is_array) {
4947 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4948 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4949 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4950 ctx->ac.i32_1, "");
4951 } else if (instr->dest.ssa.num_components != 4)
4952 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4953
4954 write_result:
4955 if (result) {
4956 assert(instr->dest.is_ssa);
4957 result = ac_to_integer(&ctx->ac, result);
4958
4959 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4960 result = exit_waterfall(ctx, wctx + i, result);
4961 }
4962
4963 ctx->ssa_defs[instr->dest.ssa.index] = result;
4964 }
4965 }
4966
4967 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4968 {
4969 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4970 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4971
4972 ctx->ssa_defs[instr->dest.ssa.index] = result;
4973 _mesa_hash_table_insert(ctx->phis, instr, result);
4974 }
4975
4976 static void visit_post_phi(struct ac_nir_context *ctx,
4977 nir_phi_instr *instr,
4978 LLVMValueRef llvm_phi)
4979 {
4980 nir_foreach_phi_src(src, instr) {
4981 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4982 LLVMValueRef llvm_src = get_src(ctx, src->src);
4983
4984 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4985 }
4986 }
4987
4988 static void phi_post_pass(struct ac_nir_context *ctx)
4989 {
4990 hash_table_foreach(ctx->phis, entry) {
4991 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4992 (LLVMValueRef)entry->data);
4993 }
4994 }
4995
4996
4997 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4998 nir_foreach_use(use_src, def) {
4999 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
5000 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
5001 if (instr->intrinsic == nir_intrinsic_store_deref)
5002 return true;
5003 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
5004 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
5005 if (instr->op == nir_op_vec4 &&
5006 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
5007 return true;
5008 }
5009 }
5010 }
5011 return false;
5012 }
5013
5014 static void visit_ssa_undef(struct ac_nir_context *ctx,
5015 const nir_ssa_undef_instr *instr)
5016 {
5017 unsigned num_components = instr->def.num_components;
5018 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
5019
5020 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
5021 LLVMValueRef undef;
5022
5023 if (num_components == 1)
5024 undef = LLVMGetUndef(type);
5025 else {
5026 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
5027 }
5028 ctx->ssa_defs[instr->def.index] = undef;
5029 } else {
5030 LLVMValueRef zero = LLVMConstInt(type, 0, false);
5031 if (num_components > 1) {
5032 zero = ac_build_gather_values_extended(
5033 &ctx->ac, &zero, 4, 0, false, false);
5034 }
5035 ctx->ssa_defs[instr->def.index] = zero;
5036 }
5037 }
5038
5039 static void visit_jump(struct ac_llvm_context *ctx,
5040 const nir_jump_instr *instr)
5041 {
5042 switch (instr->type) {
5043 case nir_jump_break:
5044 ac_build_break(ctx);
5045 break;
5046 case nir_jump_continue:
5047 ac_build_continue(ctx);
5048 break;
5049 default:
5050 fprintf(stderr, "Unknown NIR jump instr: ");
5051 nir_print_instr(&instr->instr, stderr);
5052 fprintf(stderr, "\n");
5053 abort();
5054 }
5055 }
5056
5057 static LLVMTypeRef
5058 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
5059 enum glsl_base_type type)
5060 {
5061 switch (type) {
5062 case GLSL_TYPE_INT:
5063 case GLSL_TYPE_UINT:
5064 case GLSL_TYPE_BOOL:
5065 case GLSL_TYPE_SUBROUTINE:
5066 return ac->i32;
5067 case GLSL_TYPE_INT8:
5068 case GLSL_TYPE_UINT8:
5069 return ac->i8;
5070 case GLSL_TYPE_INT16:
5071 case GLSL_TYPE_UINT16:
5072 return ac->i16;
5073 case GLSL_TYPE_FLOAT:
5074 return ac->f32;
5075 case GLSL_TYPE_FLOAT16:
5076 return ac->f16;
5077 case GLSL_TYPE_INT64:
5078 case GLSL_TYPE_UINT64:
5079 return ac->i64;
5080 case GLSL_TYPE_DOUBLE:
5081 return ac->f64;
5082 default:
5083 unreachable("unknown GLSL type");
5084 }
5085 }
5086
5087 static LLVMTypeRef
5088 glsl_to_llvm_type(struct ac_llvm_context *ac,
5089 const struct glsl_type *type)
5090 {
5091 if (glsl_type_is_scalar(type)) {
5092 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
5093 }
5094
5095 if (glsl_type_is_vector(type)) {
5096 return LLVMVectorType(
5097 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5098 glsl_get_vector_elements(type));
5099 }
5100
5101 if (glsl_type_is_matrix(type)) {
5102 return LLVMArrayType(
5103 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5104 glsl_get_matrix_columns(type));
5105 }
5106
5107 if (glsl_type_is_array(type)) {
5108 return LLVMArrayType(
5109 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5110 glsl_get_length(type));
5111 }
5112
5113 assert(glsl_type_is_struct_or_ifc(type));
5114
5115 LLVMTypeRef member_types[glsl_get_length(type)];
5116
5117 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5118 member_types[i] =
5119 glsl_to_llvm_type(ac,
5120 glsl_get_struct_field(type, i));
5121 }
5122
5123 return LLVMStructTypeInContext(ac->context, member_types,
5124 glsl_get_length(type), false);
5125 }
5126
5127 static void visit_deref(struct ac_nir_context *ctx,
5128 nir_deref_instr *instr)
5129 {
5130 if (instr->mode != nir_var_mem_shared &&
5131 instr->mode != nir_var_mem_global)
5132 return;
5133
5134 LLVMValueRef result = NULL;
5135 switch(instr->deref_type) {
5136 case nir_deref_type_var: {
5137 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5138 result = entry->data;
5139 break;
5140 }
5141 case nir_deref_type_struct:
5142 if (instr->mode == nir_var_mem_global) {
5143 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5144 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5145 instr->strct.index);
5146 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5147 LLVMConstInt(ctx->ac.i32, offset, 0));
5148 } else {
5149 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5150 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5151 }
5152 break;
5153 case nir_deref_type_array:
5154 if (instr->mode == nir_var_mem_global) {
5155 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5156 unsigned stride = glsl_get_explicit_stride(parent->type);
5157
5158 if ((glsl_type_is_matrix(parent->type) &&
5159 glsl_matrix_type_is_row_major(parent->type)) ||
5160 (glsl_type_is_vector(parent->type) && stride == 0))
5161 stride = type_scalar_size_bytes(parent->type);
5162
5163 assert(stride > 0);
5164 LLVMValueRef index = get_src(ctx, instr->arr.index);
5165 if (LLVMTypeOf(index) != ctx->ac.i64)
5166 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5167
5168 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5169
5170 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5171 } else {
5172 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5173 get_src(ctx, instr->arr.index));
5174 }
5175 break;
5176 case nir_deref_type_ptr_as_array:
5177 if (instr->mode == nir_var_mem_global) {
5178 unsigned stride = nir_deref_instr_array_stride(instr);
5179
5180 LLVMValueRef index = get_src(ctx, instr->arr.index);
5181 if (LLVMTypeOf(index) != ctx->ac.i64)
5182 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5183
5184 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5185
5186 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5187 } else {
5188 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5189 get_src(ctx, instr->arr.index));
5190 }
5191 break;
5192 case nir_deref_type_cast: {
5193 result = get_src(ctx, instr->parent);
5194
5195 /* We can't use the structs from LLVM because the shader
5196 * specifies its own offsets. */
5197 LLVMTypeRef pointee_type = ctx->ac.i8;
5198 if (instr->mode == nir_var_mem_shared)
5199 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5200
5201 unsigned address_space;
5202
5203 switch(instr->mode) {
5204 case nir_var_mem_shared:
5205 address_space = AC_ADDR_SPACE_LDS;
5206 break;
5207 case nir_var_mem_global:
5208 address_space = AC_ADDR_SPACE_GLOBAL;
5209 break;
5210 default:
5211 unreachable("Unhandled address space");
5212 }
5213
5214 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5215
5216 if (LLVMTypeOf(result) != type) {
5217 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5218 result = LLVMBuildBitCast(ctx->ac.builder, result,
5219 type, "");
5220 } else {
5221 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5222 type, "");
5223 }
5224 }
5225 break;
5226 }
5227 default:
5228 unreachable("Unhandled deref_instr deref type");
5229 }
5230
5231 ctx->ssa_defs[instr->dest.ssa.index] = result;
5232 }
5233
5234 static void visit_cf_list(struct ac_nir_context *ctx,
5235 struct exec_list *list);
5236
5237 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5238 {
5239 nir_foreach_instr(instr, block)
5240 {
5241 switch (instr->type) {
5242 case nir_instr_type_alu:
5243 visit_alu(ctx, nir_instr_as_alu(instr));
5244 break;
5245 case nir_instr_type_load_const:
5246 visit_load_const(ctx, nir_instr_as_load_const(instr));
5247 break;
5248 case nir_instr_type_intrinsic:
5249 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5250 break;
5251 case nir_instr_type_tex:
5252 visit_tex(ctx, nir_instr_as_tex(instr));
5253 break;
5254 case nir_instr_type_phi:
5255 visit_phi(ctx, nir_instr_as_phi(instr));
5256 break;
5257 case nir_instr_type_ssa_undef:
5258 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5259 break;
5260 case nir_instr_type_jump:
5261 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5262 break;
5263 case nir_instr_type_deref:
5264 visit_deref(ctx, nir_instr_as_deref(instr));
5265 break;
5266 default:
5267 fprintf(stderr, "Unknown NIR instr type: ");
5268 nir_print_instr(instr, stderr);
5269 fprintf(stderr, "\n");
5270 abort();
5271 }
5272 }
5273
5274 _mesa_hash_table_insert(ctx->defs, block,
5275 LLVMGetInsertBlock(ctx->ac.builder));
5276 }
5277
5278 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5279 {
5280 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5281
5282 nir_block *then_block =
5283 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5284
5285 ac_build_uif(&ctx->ac, value, then_block->index);
5286
5287 visit_cf_list(ctx, &if_stmt->then_list);
5288
5289 if (!exec_list_is_empty(&if_stmt->else_list)) {
5290 nir_block *else_block =
5291 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5292
5293 ac_build_else(&ctx->ac, else_block->index);
5294 visit_cf_list(ctx, &if_stmt->else_list);
5295 }
5296
5297 ac_build_endif(&ctx->ac, then_block->index);
5298 }
5299
5300 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5301 {
5302 nir_block *first_loop_block =
5303 (nir_block *) exec_list_get_head(&loop->body);
5304
5305 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5306
5307 visit_cf_list(ctx, &loop->body);
5308
5309 ac_build_endloop(&ctx->ac, first_loop_block->index);
5310 }
5311
5312 static void visit_cf_list(struct ac_nir_context *ctx,
5313 struct exec_list *list)
5314 {
5315 foreach_list_typed(nir_cf_node, node, node, list)
5316 {
5317 switch (node->type) {
5318 case nir_cf_node_block:
5319 visit_block(ctx, nir_cf_node_as_block(node));
5320 break;
5321
5322 case nir_cf_node_if:
5323 visit_if(ctx, nir_cf_node_as_if(node));
5324 break;
5325
5326 case nir_cf_node_loop:
5327 visit_loop(ctx, nir_cf_node_as_loop(node));
5328 break;
5329
5330 default:
5331 assert(0);
5332 }
5333 }
5334 }
5335
5336 void
5337 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5338 struct ac_shader_abi *abi,
5339 struct nir_shader *nir,
5340 struct nir_variable *variable,
5341 gl_shader_stage stage)
5342 {
5343 unsigned output_loc = variable->data.driver_location / 4;
5344 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5345
5346 /* tess ctrl has it's own load/store paths for outputs */
5347 if (stage == MESA_SHADER_TESS_CTRL)
5348 return;
5349
5350 if (stage == MESA_SHADER_VERTEX ||
5351 stage == MESA_SHADER_TESS_EVAL ||
5352 stage == MESA_SHADER_GEOMETRY) {
5353 int idx = variable->data.location + variable->data.index;
5354 if (idx == VARYING_SLOT_CLIP_DIST0) {
5355 int length = nir->info.clip_distance_array_size +
5356 nir->info.cull_distance_array_size;
5357
5358 if (length > 4)
5359 attrib_count = 2;
5360 else
5361 attrib_count = 1;
5362 }
5363 }
5364
5365 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5366 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5367 for (unsigned i = 0; i < attrib_count; ++i) {
5368 for (unsigned chan = 0; chan < 4; chan++) {
5369 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5370 ac_build_alloca_undef(ctx, type, "");
5371 }
5372 }
5373 }
5374
5375 static void
5376 setup_locals(struct ac_nir_context *ctx,
5377 struct nir_function *func)
5378 {
5379 int i, j;
5380 ctx->num_locals = 0;
5381 nir_foreach_function_temp_variable(variable, func->impl) {
5382 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5383 variable->data.driver_location = ctx->num_locals * 4;
5384 variable->data.location_frac = 0;
5385 ctx->num_locals += attrib_count;
5386 }
5387 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5388 if (!ctx->locals)
5389 return;
5390
5391 for (i = 0; i < ctx->num_locals; i++) {
5392 for (j = 0; j < 4; j++) {
5393 ctx->locals[i * 4 + j] =
5394 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5395 }
5396 }
5397 }
5398
5399 static void
5400 setup_scratch(struct ac_nir_context *ctx,
5401 struct nir_shader *shader)
5402 {
5403 if (shader->scratch_size == 0)
5404 return;
5405
5406 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5407 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5408 "scratch");
5409 }
5410
5411 static void
5412 setup_constant_data(struct ac_nir_context *ctx,
5413 struct nir_shader *shader)
5414 {
5415 if (!shader->constant_data)
5416 return;
5417
5418 LLVMValueRef data =
5419 LLVMConstStringInContext(ctx->ac.context,
5420 shader->constant_data,
5421 shader->constant_data_size,
5422 true);
5423 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5424
5425 /* We want to put the constant data in the CONST address space so that
5426 * we can use scalar loads. However, LLVM versions before 10 put these
5427 * variables in the same section as the code, which is unacceptable
5428 * for RadeonSI as it needs to relocate all the data sections after
5429 * the code sections. See https://reviews.llvm.org/D65813.
5430 */
5431 unsigned address_space =
5432 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5433
5434 LLVMValueRef global =
5435 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5436 "const_data",
5437 address_space);
5438
5439 LLVMSetInitializer(global, data);
5440 LLVMSetGlobalConstant(global, true);
5441 LLVMSetVisibility(global, LLVMHiddenVisibility);
5442 ctx->constant_data = global;
5443 }
5444
5445 static void
5446 setup_shared(struct ac_nir_context *ctx,
5447 struct nir_shader *nir)
5448 {
5449 if (ctx->ac.lds)
5450 return;
5451
5452 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5453 nir->info.cs.shared_size);
5454
5455 LLVMValueRef lds =
5456 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5457 "compute_lds",
5458 AC_ADDR_SPACE_LDS);
5459 LLVMSetAlignment(lds, 64 * 1024);
5460
5461 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5462 LLVMPointerType(ctx->ac.i8,
5463 AC_ADDR_SPACE_LDS), "");
5464 }
5465
5466 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5467 const struct ac_shader_args *args, struct nir_shader *nir)
5468 {
5469 struct ac_nir_context ctx = {};
5470 struct nir_function *func;
5471
5472 ctx.ac = *ac;
5473 ctx.abi = abi;
5474 ctx.args = args;
5475
5476 ctx.stage = nir->info.stage;
5477 ctx.info = &nir->info;
5478
5479 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5480
5481 /* TODO: remove this after RADV switches to lowered IO */
5482 if (!nir->info.io_lowered) {
5483 nir_foreach_shader_out_variable(variable, nir) {
5484 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5485 ctx.stage);
5486 }
5487 }
5488
5489 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5490 _mesa_key_pointer_equal);
5491 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5492 _mesa_key_pointer_equal);
5493 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5494 _mesa_key_pointer_equal);
5495
5496 if (ctx.abi->kill_ps_if_inf_interp)
5497 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5498 _mesa_key_pointer_equal);
5499
5500 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5501
5502 nir_index_ssa_defs(func->impl);
5503 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5504
5505 setup_locals(&ctx, func);
5506 setup_scratch(&ctx, nir);
5507 setup_constant_data(&ctx, nir);
5508
5509 if (gl_shader_stage_is_compute(nir->info.stage))
5510 setup_shared(&ctx, nir);
5511
5512 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5513 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5514 /* true = don't kill. */
5515 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5516 }
5517
5518 visit_cf_list(&ctx, &func->impl->body);
5519 phi_post_pass(&ctx);
5520
5521 if (ctx.ac.postponed_kill)
5522 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5523 ctx.ac.postponed_kill, ""));
5524
5525 if (!gl_shader_stage_is_compute(nir->info.stage))
5526 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5527 ctx.abi->outputs);
5528
5529 free(ctx.locals);
5530 free(ctx.ssa_defs);
5531 ralloc_free(ctx.defs);
5532 ralloc_free(ctx.phis);
5533 ralloc_free(ctx.vars);
5534 if (ctx.abi->kill_ps_if_inf_interp)
5535 ralloc_free(ctx.verified_interp);
5536 }
5537
5538 bool
5539 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5540 {
5541 bool progress = false;
5542
5543 /* Lower large variables to scratch first so that we won't bloat the
5544 * shader by generating large if ladders for them. We later lower
5545 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5546 */
5547 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5548 nir_var_function_temp,
5549 256,
5550 glsl_get_natural_size_align_bytes);
5551
5552 /* While it would be nice not to have this flag, we are constrained
5553 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5554 */
5555 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5556
5557 /* TODO: Indirect indexing of GS inputs is unimplemented.
5558 *
5559 * TCS and TES load inputs directly from LDS or offchip memory, so
5560 * indirect indexing is trivial.
5561 */
5562 nir_variable_mode indirect_mask = 0;
5563 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5564 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5565 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5566 !llvm_has_working_vgpr_indexing)) {
5567 indirect_mask |= nir_var_shader_in;
5568 }
5569 if (!llvm_has_working_vgpr_indexing &&
5570 nir->info.stage != MESA_SHADER_TESS_CTRL)
5571 indirect_mask |= nir_var_shader_out;
5572
5573 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5574 * smart enough to handle indirects without causing excess spilling
5575 * causing the gpu to hang.
5576 *
5577 * See the following thread for more details of the problem:
5578 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5579 */
5580 indirect_mask |= nir_var_function_temp;
5581
5582 progress |= nir_lower_indirect_derefs(nir, indirect_mask, UINT32_MAX);
5583 return progress;
5584 }
5585
5586 static unsigned
5587 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5588 {
5589 if (intrin->intrinsic != nir_intrinsic_store_output)
5590 return 0;
5591
5592 unsigned writemask = nir_intrinsic_write_mask(intrin) <<
5593 nir_intrinsic_component(intrin);
5594 unsigned location = nir_intrinsic_io_semantics(intrin).location;
5595
5596 if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5597 return writemask << 4;
5598 else if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5599 return writemask;
5600
5601 return 0;
5602 }
5603
5604 static void
5605 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5606 unsigned *cond_block_tf_writemask,
5607 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5608 {
5609 switch (cf_node->type) {
5610 case nir_cf_node_block: {
5611 nir_block *block = nir_cf_node_as_block(cf_node);
5612 nir_foreach_instr(instr, block) {
5613 if (instr->type != nir_instr_type_intrinsic)
5614 continue;
5615
5616 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5617 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5618
5619 /* If we find a barrier in nested control flow put this in the
5620 * too hard basket. In GLSL this is not possible but it is in
5621 * SPIR-V.
5622 */
5623 if (is_nested_cf) {
5624 *tessfactors_are_def_in_all_invocs = false;
5625 return;
5626 }
5627
5628 /* The following case must be prevented:
5629 * gl_TessLevelInner = ...;
5630 * barrier();
5631 * if (gl_InvocationID == 1)
5632 * gl_TessLevelInner = ...;
5633 *
5634 * If you consider disjoint code segments separated by barriers, each
5635 * such segment that writes tess factor channels should write the same
5636 * channels in all codepaths within that segment.
5637 */
5638 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5639 /* Accumulate the result: */
5640 *tessfactors_are_def_in_all_invocs &=
5641 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5642
5643 /* Analyze the next code segment from scratch. */
5644 *upper_block_tf_writemask = 0;
5645 *cond_block_tf_writemask = 0;
5646 }
5647 } else
5648 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5649 }
5650
5651 break;
5652 }
5653 case nir_cf_node_if: {
5654 unsigned then_tessfactor_writemask = 0;
5655 unsigned else_tessfactor_writemask = 0;
5656
5657 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5658 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5659 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5660 cond_block_tf_writemask,
5661 tessfactors_are_def_in_all_invocs, true);
5662 }
5663
5664 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5665 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5666 cond_block_tf_writemask,
5667 tessfactors_are_def_in_all_invocs, true);
5668 }
5669
5670 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5671 /* If both statements write the same tess factor channels,
5672 * we can say that the upper block writes them too.
5673 */
5674 *upper_block_tf_writemask |= then_tessfactor_writemask &
5675 else_tessfactor_writemask;
5676 *cond_block_tf_writemask |= then_tessfactor_writemask |
5677 else_tessfactor_writemask;
5678 }
5679
5680 break;
5681 }
5682 case nir_cf_node_loop: {
5683 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5684 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5685 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5686 cond_block_tf_writemask,
5687 tessfactors_are_def_in_all_invocs, true);
5688 }
5689
5690 break;
5691 }
5692 default:
5693 unreachable("unknown cf node type");
5694 }
5695 }
5696
5697 bool
5698 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5699 {
5700 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5701
5702 /* The pass works as follows:
5703 * If all codepaths write tess factors, we can say that all
5704 * invocations define tess factors.
5705 *
5706 * Each tess factor channel is tracked separately.
5707 */
5708 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5709 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5710
5711 /* Initial value = true. Here the pass will accumulate results from
5712 * multiple segments surrounded by barriers. If tess factors aren't
5713 * written at all, it's a shader bug and we don't care if this will be
5714 * true.
5715 */
5716 bool tessfactors_are_def_in_all_invocs = true;
5717
5718 nir_foreach_function(function, nir) {
5719 if (function->impl) {
5720 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5721 scan_tess_ctrl(node, &main_block_tf_writemask,
5722 &cond_block_tf_writemask,
5723 &tessfactors_are_def_in_all_invocs,
5724 false);
5725 }
5726 }
5727 }
5728
5729 /* Accumulate the result for the last code segment separated by a
5730 * barrier.
5731 */
5732 if (main_block_tf_writemask || cond_block_tf_writemask) {
5733 tessfactors_are_def_in_all_invocs &=
5734 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5735 }
5736
5737 return tessfactors_are_def_in_all_invocs;
5738 }