src/bigint_presentation_code/_tests/test_compiler_ir2.py

   1 import unittest
   2 from bigint_presentation_code.compiler_ir import GPR_SIZE_IN_BYTES
   3
   4 from bigint_presentation_code.compiler_ir2 import (Fn, OpKind, PreRASimState)
   5
   6
   7 class TestCompilerIR(unittest.TestCase):
   8     maxDiff = None
   9
  10     def test_sim(self):
  11         fn = Fn()
  12         op0 = fn.append_new_op(OpKind.FuncArgR3, name="arg")
  13         arg = op0.outputs[0]
  14         MAXVL = 32
  15         op1 = fn.append_new_op(OpKind.SetVLI, immediates=[MAXVL], name="vl")
  16         vl = op1.outputs[0]
  17         op2 = fn.append_new_op(
  18             OpKind.SvLd, inputs=[arg, vl], immediates=[0], maxvl=MAXVL,
  19             name="ld")
  20         a = op2.outputs[0]
  21         op3 = fn.append_new_op(
  22             OpKind.SvLI, inputs=[vl], immediates=[0], maxvl=MAXVL, name="li")
  23         b = op3.outputs[0]
  24         op4 = fn.append_new_op(OpKind.SetCA, name="ca")
  25         ca = op4.outputs[0]
  26         op5 = fn.append_new_op(
  27             OpKind.SvAddE, inputs=[a, b, ca, vl], maxvl=MAXVL, name="add")
  28         s = op5.outputs[0]
  29         fn.append_new_op(
  30             OpKind.SvStd, inputs=[s, arg, vl], immediates=[0], maxvl=MAXVL,
  31             name="st")
  32
  33         self.assertEqual([repr(i) for i in fn.ops], [
  34             "Op(fn=<Fn>, properties=OpProperties(kind=OpKind.FuncArgR3, "
  35             "inputs=(), outputs=("
  36             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  37             "LocKind.GPR: FBitSet([3])}), "
  38             "ty=Ty(base_ty=BaseTy.I64, reg_len=1)), "
  39             "tied_input_index=None, spread_index=None),), maxvl=1), "
  40             "inputs=OpInputs([], op=...), "
  41             "immediates=OpImmediates([], op=...), "
  42             "outputs=(<arg#0>,), "
  43             "name='arg')",
  44             "Op(fn=<Fn>, properties=OpProperties(kind=OpKind.SetVLI, "
  45             "inputs=(), outputs=("
  46             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  47             "LocKind.VL_MAXVL: FBitSet([0])}), "
  48             "ty=Ty(base_ty=BaseTy.VL_MAXVL, reg_len=1)), "
  49             "tied_input_index=None, spread_index=None),), maxvl=1), "
  50             "inputs=OpInputs([], op=...), "
  51             "immediates=OpImmediates([32], op=...), "
  52             "outputs=(<vl#0>,), "
  53             "name='vl')",
  54             "Op(fn=<Fn>, properties=OpProperties(kind=OpKind.SvLd, "
  55             "inputs=("
  56             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  57             "LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
  58             "ty=Ty(base_ty=BaseTy.I64, reg_len=1)), "
  59             "tied_input_index=None, spread_index=None), "
  60             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  61             "LocKind.VL_MAXVL: FBitSet([0])}), "
  62             "ty=Ty(base_ty=BaseTy.VL_MAXVL, reg_len=1)), "
  63             "tied_input_index=None, spread_index=None)), "
  64             "outputs=("
  65             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  66             "LocKind.GPR: FBitSet(range(14, 97))}), "
  67             "ty=Ty(base_ty=BaseTy.I64, reg_len=32)), "
  68             "tied_input_index=None, spread_index=None),), maxvl=32), "
  69             "inputs=OpInputs([<arg#0>, <vl#0>], op=...), "
  70             "immediates=OpImmediates([0], op=...), "
  71             "outputs=(<ld#0>,), "
  72             "name='ld')",
  73             "Op(fn=<Fn>, properties=OpProperties(kind=OpKind.SvLI, "
  74             "inputs=("
  75             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  76             "LocKind.VL_MAXVL: FBitSet([0])}), "
  77             "ty=Ty(base_ty=BaseTy.VL_MAXVL, reg_len=1)), "
  78             "tied_input_index=None, spread_index=None),), outputs=("
  79             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  80             "LocKind.GPR: FBitSet(range(14, 97))}), "
  81             "ty=Ty(base_ty=BaseTy.I64, reg_len=32)), "
  82             "tied_input_index=None, spread_index=None),), maxvl=32), "
  83             "inputs=OpInputs([<vl#0>], op=...), "
  84             "immediates=OpImmediates([0], op=...), "
  85             "outputs=(<li#0>,), "
  86             "name='li')",
  87             "Op(fn=<Fn>, properties=OpProperties(kind=OpKind.SetCA, "
  88             "inputs=(), outputs=("
  89             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
  90             "LocKind.CA: FBitSet([0])}), "
  91             "ty=Ty(base_ty=BaseTy.CA, reg_len=1)), "
  92             "tied_input_index=None, spread_index=None),), maxvl=1), "
  93             "inputs=OpInputs([], op=...), "
  94             "immediates=OpImmediates([], op=...), "
  95             "outputs=(<ca#0>,), "
  96             "name='ca')",
  97             "Op(fn=<Fn>, properties=OpProperties(kind=OpKind.SvAddE, "
  98             "inputs=("
  99             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 100             "LocKind.GPR: FBitSet(range(14, 97))}), "
 101             "ty=Ty(base_ty=BaseTy.I64, reg_len=32)), "
 102             "tied_input_index=None, spread_index=None), "
 103             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 104             "LocKind.GPR: FBitSet(range(14, 97))}), "
 105             "ty=Ty(base_ty=BaseTy.I64, reg_len=32)), "
 106             "tied_input_index=None, spread_index=None), "
 107             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 108             "LocKind.CA: FBitSet([0])}), "
 109             "ty=Ty(base_ty=BaseTy.CA, reg_len=1)), "
 110             "tied_input_index=None, spread_index=None), "
 111             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 112             "LocKind.VL_MAXVL: FBitSet([0])}), "
 113             "ty=Ty(base_ty=BaseTy.VL_MAXVL, reg_len=1)), "
 114             "tied_input_index=None, spread_index=None)), outputs=("
 115             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 116             "LocKind.GPR: FBitSet(range(14, 97))}), "
 117             "ty=Ty(base_ty=BaseTy.I64, reg_len=32)), "
 118             "tied_input_index=None, spread_index=None), "
 119             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 120             "LocKind.CA: FBitSet([0])}), "
 121             "ty=Ty(base_ty=BaseTy.CA, reg_len=1)), "
 122             "tied_input_index=None, spread_index=None)), maxvl=32), "
 123             "inputs=OpInputs([<ld#0>, <li#0>, <ca#0>, <vl#0>], op=...), "
 124             "immediates=OpImmediates([], op=...), "
 125             "outputs=(<add#0>, <add#1>), "
 126             "name='add')",
 127             "Op(fn=<Fn>, properties=OpProperties(kind=OpKind.SvStd, "
 128             "inputs=("
 129             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 130             "LocKind.GPR: FBitSet(range(14, 97))}), "
 131             "ty=Ty(base_ty=BaseTy.I64, reg_len=32)), "
 132             "tied_input_index=None, spread_index=None), "
 133             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 134             "LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
 135             "ty=Ty(base_ty=BaseTy.I64, reg_len=1)), "
 136             "tied_input_index=None, spread_index=None), "
 137             "OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
 138             "LocKind.VL_MAXVL: FBitSet([0])}), "
 139             "ty=Ty(base_ty=BaseTy.VL_MAXVL, reg_len=1)), "
 140             "tied_input_index=None, spread_index=None)), "
 141             "outputs=(), maxvl=32), "
 142             "inputs=OpInputs([<add#0>, <arg#0>, <vl#0>], op=...), "
 143             "immediates=OpImmediates([0], op=...), outputs=(), "
 144             "name='st')",
 145         ])
 146
 147         addr = 0x100
 148         state = PreRASimState(ssa_vals={arg: (addr,)}, memory={})
 149         state.store(addr=addr, value=0xffffffff_ffffffff,
 150                     size_in_bytes=GPR_SIZE_IN_BYTES)
 151         state.store(addr=addr + GPR_SIZE_IN_BYTES, value=0xabcdef01_23456789,
 152                     size_in_bytes=GPR_SIZE_IN_BYTES)
 153         self.assertEqual(
 154             repr(state),
 155             "PreRASimState(ssa_vals={<arg#0>: (0x100,)}, memory={\n"
 156             "0x00100: <0xffffffffffffffff>,\n"
 157             "0x00108: <0xabcdef0123456789>})")
 158         fn.pre_ra_sim(state)
 159         self.assertEqual(
 160             repr(state),
 161             "PreRASimState(ssa_vals={\n"
 162             "<arg#0>: (0x100,),\n"
 163             "<vl#0>: (0x20,),\n"
 164             "<ld#0>: (\n"
 165             "    0xffffffffffffffff, 0xabcdef0123456789, 0x0, 0x0,\n"
 166             "    0x0, 0x0, 0x0, 0x0,\n"
 167             "    0x0, 0x0, 0x0, 0x0,\n"
 168             "    0x0, 0x0, 0x0, 0x0,\n"
 169             "    0x0, 0x0, 0x0, 0x0,\n"
 170             "    0x0, 0x0, 0x0, 0x0,\n"
 171             "    0x0, 0x0, 0x0, 0x0,\n"
 172             "    0x0, 0x0, 0x0, 0x0),\n"
 173             "<li#0>: (\n"
 174             "    0x0, 0x0, 0x0, 0x0,\n"
 175             "    0x0, 0x0, 0x0, 0x0,\n"
 176             "    0x0, 0x0, 0x0, 0x0,\n"
 177             "    0x0, 0x0, 0x0, 0x0,\n"
 178             "    0x0, 0x0, 0x0, 0x0,\n"
 179             "    0x0, 0x0, 0x0, 0x0,\n"
 180             "    0x0, 0x0, 0x0, 0x0,\n"
 181             "    0x0, 0x0, 0x0, 0x0),\n"
 182             "<ca#0>: (0x1,),\n"
 183             "<add#0>: (\n"
 184             "    0x0, 0xabcdef012345678a, 0x0, 0x0,\n"
 185             "    0x0, 0x0, 0x0, 0x0,\n"
 186             "    0x0, 0x0, 0x0, 0x0,\n"
 187             "    0x0, 0x0, 0x0, 0x0,\n"
 188             "    0x0, 0x0, 0x0, 0x0,\n"
 189             "    0x0, 0x0, 0x0, 0x0,\n"
 190             "    0x0, 0x0, 0x0, 0x0,\n"
 191             "    0x0, 0x0, 0x0, 0x0),\n"
 192             "<add#1>: (0x0,),\n"
 193             "}, memory={\n"
 194             "0x00100: <0x0000000000000000>,\n"
 195             "0x00108: <0xabcdef012345678a>,\n"
 196             "0x00110: <0x0000000000000000>,\n"
 197             "0x00118: <0x0000000000000000>,\n"
 198             "0x00120: <0x0000000000000000>,\n"
 199             "0x00128: <0x0000000000000000>,\n"
 200             "0x00130: <0x0000000000000000>,\n"
 201             "0x00138: <0x0000000000000000>,\n"
 202             "0x00140: <0x0000000000000000>,\n"
 203             "0x00148: <0x0000000000000000>,\n"
 204             "0x00150: <0x0000000000000000>,\n"
 205             "0x00158: <0x0000000000000000>,\n"
 206             "0x00160: <0x0000000000000000>,\n"
 207             "0x00168: <0x0000000000000000>,\n"
 208             "0x00170: <0x0000000000000000>,\n"
 209             "0x00178: <0x0000000000000000>,\n"
 210             "0x00180: <0x0000000000000000>,\n"
 211             "0x00188: <0x0000000000000000>,\n"
 212             "0x00190: <0x0000000000000000>,\n"
 213             "0x00198: <0x0000000000000000>,\n"
 214             "0x001a0: <0x0000000000000000>,\n"
 215             "0x001a8: <0x0000000000000000>,\n"
 216             "0x001b0: <0x0000000000000000>,\n"
 217             "0x001b8: <0x0000000000000000>,\n"
 218             "0x001c0: <0x0000000000000000>,\n"
 219             "0x001c8: <0x0000000000000000>,\n"
 220             "0x001d0: <0x0000000000000000>,\n"
 221             "0x001d8: <0x0000000000000000>,\n"
 222             "0x001e0: <0x0000000000000000>,\n"
 223             "0x001e8: <0x0000000000000000>,\n"
 224             "0x001f0: <0x0000000000000000>,\n"
 225             "0x001f8: <0x0000000000000000>})")
 226
 227
 228 if __name__ == "__main__":
 229     unittest.main()