src/bigint_presentation_code/_tests/test_register_allocator.py

   1 import sys
   2 import unittest
   3 from pathlib import Path
   4
   5 from bigint_presentation_code.compiler_ir import (Fn, GenAsmState, OpKind,
   6                                                   SSAVal)
   7 from bigint_presentation_code.register_allocator import allocate_registers
   8 from bigint_presentation_code.register_allocator_test_util import GraphDumper
   9
  10
  11 class TestRegisterAllocator(unittest.TestCase):
  12     maxDiff = None
  13
  14     def make_add_fn(self):
  15         # type: () -> tuple[Fn, SSAVal]
  16         fn = Fn()
  17         op0 = fn.append_new_op(OpKind.FuncArgR3, name="arg")
  18         arg = op0.outputs[0]
  19         MAXVL = 32
  20         op1 = fn.append_new_op(OpKind.SetVLI, immediates=[MAXVL], name="vl")
  21         vl = op1.outputs[0]
  22         op2 = fn.append_new_op(
  23             OpKind.SvLd, input_vals=[arg, vl], immediates=[0], maxvl=MAXVL,
  24             name="ld")
  25         a = op2.outputs[0]
  26         op3 = fn.append_new_op(OpKind.SvLI, input_vals=[vl], immediates=[0],
  27                                maxvl=MAXVL, name="li")
  28         b = op3.outputs[0]
  29         op4 = fn.append_new_op(OpKind.SetCA, name="ca")
  30         ca = op4.outputs[0]
  31         op5 = fn.append_new_op(
  32             OpKind.SvAddE, input_vals=[a, b, ca, vl], maxvl=MAXVL, name="add")
  33         s = op5.outputs[0]
  34         _ = fn.append_new_op(OpKind.SvStd, input_vals=[s, arg, vl],
  35                              immediates=[0], maxvl=MAXVL, name="st")
  36         return fn, arg
  37
  38     def test_register_allocate(self):
  39         fn, _arg = self.make_add_fn()
  40         reg_assignments = allocate_registers(
  41             fn, debug_out=sys.stdout, dump_graph=GraphDumper(self))
  42
  43         self.assertEqual(
  44             repr(reg_assignments),
  45             "{"
  46             "<add.outputs[0]: <I64*32>>: "
  47             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  48             "<add.out0.copy.outputs[0]: <I64*32>>: "
  49             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  50             "<st.inp0.copy.outputs[0]: <I64*32>>: "
  51             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  52             "<add.inp1.copy.outputs[0]: <I64*32>>: "
  53             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
  54             "<li.outputs[0]: <I64*32>>: "
  55             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
  56             "<li.out0.copy.outputs[0]: <I64*32>>: "
  57             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
  58             "<add.inp0.copy.outputs[0]: <I64*32>>: "
  59             "Loc(kind=LocKind.GPR, start=78, reg_len=32), "
  60             "<ld.out0.copy.outputs[0]: <I64*32>>: "
  61             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  62             "<ld.outputs[0]: <I64*32>>: "
  63             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  64             "<arg.outputs[0]: <I64>>: "
  65             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
  66             "<arg.out0.copy.outputs[0]: <I64>>: "
  67             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
  68             "<ld.inp0.copy.outputs[0]: <I64>>: "
  69             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
  70             "<st.inp1.copy.outputs[0]: <I64>>: "
  71             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
  72             "<st.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
  73             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  74             "<st.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
  75             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  76             "<add.out0.setvl.outputs[0]: <VL_MAXVL>>: "
  77             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  78             "<ca.outputs[0]: <CA>>: "
  79             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
  80             "<add.outputs[1]: <CA>>: "
  81             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
  82             "<add.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
  83             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  84             "<add.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
  85             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  86             "<add.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
  87             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  88             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
  89             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  90             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
  91             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  92             "<ld.out0.setvl.outputs[0]: <VL_MAXVL>>: "
  93             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  94             "<ld.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
  95             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  96             "<vl.outputs[0]: <VL_MAXVL>>: "
  97             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1)"
  98             "}"
  99         )
 100
 101     def test_gen_asm(self):
 102         fn, _arg = self.make_add_fn()
 103         reg_assignments = allocate_registers(
 104             fn, debug_out=sys.stdout, dump_graph=GraphDumper(self))
 105
 106         self.assertEqual(
 107             repr(reg_assignments),
 108             "{"
 109             "<add.outputs[0]: <I64*32>>: "
 110             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 111             "<add.out0.copy.outputs[0]: <I64*32>>: "
 112             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 113             "<st.inp0.copy.outputs[0]: <I64*32>>: "
 114             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 115             "<add.inp1.copy.outputs[0]: <I64*32>>: "
 116             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 117             "<li.outputs[0]: <I64*32>>: "
 118             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 119             "<li.out0.copy.outputs[0]: <I64*32>>: "
 120             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 121             "<add.inp0.copy.outputs[0]: <I64*32>>: "
 122             "Loc(kind=LocKind.GPR, start=78, reg_len=32), "
 123             "<ld.out0.copy.outputs[0]: <I64*32>>: "
 124             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 125             "<ld.outputs[0]: <I64*32>>: "
 126             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 127             "<arg.outputs[0]: <I64>>: "
 128             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 129             "<arg.out0.copy.outputs[0]: <I64>>: "
 130             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 131             "<ld.inp0.copy.outputs[0]: <I64>>: "
 132             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 133             "<st.inp1.copy.outputs[0]: <I64>>: "
 134             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 135             "<st.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
 136             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 137             "<st.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 138             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 139             "<add.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 140             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 141             "<ca.outputs[0]: <CA>>: "
 142             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 143             "<add.outputs[1]: <CA>>: "
 144             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 145             "<add.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 146             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 147             "<add.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 148             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 149             "<add.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 150             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 151             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 152             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 153             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 154             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 155             "<ld.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 156             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 157             "<ld.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 158             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 159             "<vl.outputs[0]: <VL_MAXVL>>: "
 160             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1)"
 161             "}"
 162         )
 163         state = GenAsmState(reg_assignments)
 164         fn.gen_asm(state)
 165         self.assertEqual(state.output, [
 166             'setvl 0, 0, 32, 0, 1, 1',
 167             'setvl 0, 0, 32, 0, 1, 1',
 168             'sv.ld *14, 0(3)',
 169             'setvl 0, 0, 32, 0, 1, 1',
 170             'setvl 0, 0, 32, 0, 1, 1',
 171             'sv.addi *46, 0, 0',
 172             'setvl 0, 0, 32, 0, 1, 1',
 173             'subfc 0, 0, 0',
 174             'setvl 0, 0, 32, 0, 1, 1',
 175             'sv.or *78, *14, *14',
 176             'setvl 0, 0, 32, 0, 1, 1',
 177             'setvl 0, 0, 32, 0, 1, 1',
 178             'sv.adde *14, *78, *46',
 179             'setvl 0, 0, 32, 0, 1, 1',
 180             'setvl 0, 0, 32, 0, 1, 1',
 181             'setvl 0, 0, 32, 0, 1, 1',
 182             'sv.std *14, 0(3)'
 183         ])
 184
 185     def test_register_allocate_graphs(self):
 186         fn, _arg = self.make_add_fn()
 187         graphs = {}  # type: dict[str, str]
 188
 189         graph_dumper = GraphDumper(self)
 190
 191         def dump_graph(name, dot):
 192             # type: (str, str) -> None
 193             self.assertNotIn(name, graphs, "duplicate graph name")
 194             graphs[name] = dot
 195             graph_dumper(name, dot)
 196         allocated = allocate_registers(
 197             fn, debug_out=sys.stdout, dump_graph=dump_graph)
 198         self.assertEqual(
 199             repr(allocated),
 200             "{"
 201             "<add.outputs[0]: <I64*32>>: "
 202             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 203             "<add.out0.copy.outputs[0]: <I64*32>>: "
 204             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 205             "<st.inp0.copy.outputs[0]: <I64*32>>: "
 206             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 207             "<add.inp1.copy.outputs[0]: <I64*32>>: "
 208             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 209             "<li.outputs[0]: <I64*32>>: "
 210             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 211             "<li.out0.copy.outputs[0]: <I64*32>>: "
 212             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 213             "<add.inp0.copy.outputs[0]: <I64*32>>: "
 214             "Loc(kind=LocKind.GPR, start=78, reg_len=32), "
 215             "<ld.out0.copy.outputs[0]: <I64*32>>: "
 216             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 217             "<ld.outputs[0]: <I64*32>>: "
 218             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 219             "<arg.outputs[0]: <I64>>: "
 220             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 221             "<arg.out0.copy.outputs[0]: <I64>>: "
 222             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 223             "<ld.inp0.copy.outputs[0]: <I64>>: "
 224             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 225             "<st.inp1.copy.outputs[0]: <I64>>: "
 226             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 227             "<st.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
 228             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 229             "<st.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 230             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 231             "<add.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 232             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 233             "<ca.outputs[0]: <CA>>: "
 234             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 235             "<add.outputs[1]: <CA>>: "
 236             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 237             "<add.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 238             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 239             "<add.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 240             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 241             "<add.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 242             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 243             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 244             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 245             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 246             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 247             "<ld.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 248             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 249             "<ld.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 250             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 251             "<vl.outputs[0]: <VL_MAXVL>>: "
 252             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1)"
 253             "}"
 254         )
 255         # load expected graphs
 256         data_path = Path(__file__).with_suffix("")
 257         data_path /= "test_register_allocate_graphs"
 258         data_path /= "expected"
 259         expected_graphs = {}  # type: dict[str, str]
 260         expected_graph_names = [
 261             'initial',
 262             'step_0_simplify',
 263             'step_1_simplify',
 264             'step_2_simplify',
 265             'step_3_simplify',
 266             'step_4_simplify',
 267             'step_5_simplify',
 268             'step_6_simplify',
 269             'step_7_simplify',
 270             'step_8_simplify',
 271             'step_9_simplify',
 272             'step_10_simplify',
 273             'step_11_simplify',
 274             'step_12_copy_merge',
 275             'step_12_copy_merge_result',
 276             'step_13_copy_merge',
 277             'step_13_copy_merge_result',
 278             'step_14_copy_merge',
 279             'step_14_copy_merge_result',
 280             'step_15_copy_merge',
 281             'step_15_copy_merge_result',
 282             'step_16_simplify',
 283             'step_17_freeze',
 284             'step_18_freeze',
 285             'step_19_simplify',
 286             'step_20_copy_merge',
 287             'step_20_copy_merge_result',
 288             'step_21_copy_merge',
 289             'step_21_copy_merge_result',
 290             'step_22_simplify',
 291             'step_23_copy_merge',
 292             'step_23_copy_merge_result',
 293             'step_24_simplify',
 294             'final',
 295         ]
 296         for name in expected_graph_names:
 297             file_path = (data_path / name).with_suffix(".dot")
 298             expected_graphs[name] = file_path.read_text(encoding="utf-8")
 299         self.assertEqual(graphs, expected_graphs)
 300
 301     def test_register_allocate_spread(self):
 302         fn = Fn()
 303         maxvl = 32
 304         vl = fn.append_new_op(OpKind.SetVLI, immediates=[maxvl],
 305                               name="vl", maxvl=maxvl).outputs[0]
 306         li = fn.append_new_op(OpKind.SvLI, input_vals=[vl], immediates=[0],
 307                               name="li", maxvl=maxvl).outputs[0]
 308         spread = fn.append_new_op(OpKind.Spread, input_vals=[li, vl],
 309                                   name="spread", maxvl=maxvl).outputs
 310         _concat = fn.append_new_op(
 311             OpKind.Concat, input_vals=[*spread[::-1], vl],
 312             name="concat", maxvl=maxvl)
 313         reg_assignments = allocate_registers(
 314             fn, debug_out=sys.stdout, dump_graph=GraphDumper(self))
 315
 316         self.assertEqual(
 317             repr(reg_assignments),
 318             "{"
 319             "<spread.out31.copy.outputs[0]: <I64>>: "
 320             "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
 321             "<concat.out0.copy.outputs[0]: <I64*32>>: "
 322             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 323             "<li.outputs[0]: <I64*32>>: "
 324             "Loc(kind=LocKind.GPR, start=45, reg_len=32), "
 325             "<li.out0.copy.outputs[0]: <I64*32>>: "
 326             "Loc(kind=LocKind.GPR, start=45, reg_len=32), "
 327             "<spread.inp0.copy.outputs[0]: <I64*32>>: "
 328             "Loc(kind=LocKind.GPR, start=45, reg_len=32), "
 329             "<spread.outputs[0]: <I64>>: "
 330             "Loc(kind=LocKind.GPR, start=45, reg_len=1), "
 331             "<spread.outputs[1]: <I64>>: "
 332             "Loc(kind=LocKind.GPR, start=46, reg_len=1), "
 333             "<spread.outputs[2]: <I64>>: "
 334             "Loc(kind=LocKind.GPR, start=47, reg_len=1), "
 335             "<spread.outputs[3]: <I64>>: "
 336             "Loc(kind=LocKind.GPR, start=48, reg_len=1), "
 337             "<spread.outputs[4]: <I64>>: "
 338             "Loc(kind=LocKind.GPR, start=49, reg_len=1), "
 339             "<spread.outputs[5]: <I64>>: "
 340             "Loc(kind=LocKind.GPR, start=50, reg_len=1), "
 341             "<spread.outputs[6]: <I64>>: "
 342             "Loc(kind=LocKind.GPR, start=51, reg_len=1), "
 343             "<spread.outputs[7]: <I64>>: "
 344             "Loc(kind=LocKind.GPR, start=52, reg_len=1), "
 345             "<spread.outputs[8]: <I64>>: "
 346             "Loc(kind=LocKind.GPR, start=53, reg_len=1), "
 347             "<spread.outputs[9]: <I64>>: "
 348             "Loc(kind=LocKind.GPR, start=54, reg_len=1), "
 349             "<spread.outputs[10]: <I64>>: "
 350             "Loc(kind=LocKind.GPR, start=55, reg_len=1), "
 351             "<spread.outputs[11]: <I64>>: "
 352             "Loc(kind=LocKind.GPR, start=56, reg_len=1), "
 353             "<spread.outputs[12]: <I64>>: "
 354             "Loc(kind=LocKind.GPR, start=57, reg_len=1), "
 355             "<spread.outputs[13]: <I64>>: "
 356             "Loc(kind=LocKind.GPR, start=58, reg_len=1), "
 357             "<spread.outputs[14]: <I64>>: "
 358             "Loc(kind=LocKind.GPR, start=59, reg_len=1), "
 359             "<spread.outputs[15]: <I64>>: "
 360             "Loc(kind=LocKind.GPR, start=60, reg_len=1), "
 361             "<spread.outputs[16]: <I64>>: "
 362             "Loc(kind=LocKind.GPR, start=61, reg_len=1), "
 363             "<spread.outputs[17]: <I64>>: "
 364             "Loc(kind=LocKind.GPR, start=62, reg_len=1), "
 365             "<spread.outputs[18]: <I64>>: "
 366             "Loc(kind=LocKind.GPR, start=63, reg_len=1), "
 367             "<spread.outputs[19]: <I64>>: "
 368             "Loc(kind=LocKind.GPR, start=64, reg_len=1), "
 369             "<spread.outputs[20]: <I64>>: "
 370             "Loc(kind=LocKind.GPR, start=65, reg_len=1), "
 371             "<spread.outputs[21]: <I64>>: "
 372             "Loc(kind=LocKind.GPR, start=66, reg_len=1), "
 373             "<spread.outputs[22]: <I64>>: "
 374             "Loc(kind=LocKind.GPR, start=67, reg_len=1), "
 375             "<spread.outputs[23]: <I64>>: "
 376             "Loc(kind=LocKind.GPR, start=68, reg_len=1), "
 377             "<spread.outputs[24]: <I64>>: "
 378             "Loc(kind=LocKind.GPR, start=69, reg_len=1), "
 379             "<spread.outputs[25]: <I64>>: "
 380             "Loc(kind=LocKind.GPR, start=70, reg_len=1), "
 381             "<spread.outputs[26]: <I64>>: "
 382             "Loc(kind=LocKind.GPR, start=71, reg_len=1), "
 383             "<spread.outputs[27]: <I64>>: "
 384             "Loc(kind=LocKind.GPR, start=72, reg_len=1), "
 385             "<spread.outputs[28]: <I64>>: "
 386             "Loc(kind=LocKind.GPR, start=73, reg_len=1), "
 387             "<spread.outputs[29]: <I64>>: "
 388             "Loc(kind=LocKind.GPR, start=74, reg_len=1), "
 389             "<spread.outputs[30]: <I64>>: "
 390             "Loc(kind=LocKind.GPR, start=75, reg_len=1), "
 391             "<spread.outputs[31]: <I64>>: "
 392             "Loc(kind=LocKind.GPR, start=76, reg_len=1), "
 393             "<concat.inp0.copy.outputs[0]: <I64>>: "
 394             "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
 395             "<concat.inp1.copy.outputs[0]: <I64>>: "
 396             "Loc(kind=LocKind.GPR, start=15, reg_len=1), "
 397             "<concat.inp2.copy.outputs[0]: <I64>>: "
 398             "Loc(kind=LocKind.GPR, start=16, reg_len=1), "
 399             "<concat.inp3.copy.outputs[0]: <I64>>: "
 400             "Loc(kind=LocKind.GPR, start=17, reg_len=1), "
 401             "<concat.inp4.copy.outputs[0]: <I64>>: "
 402             "Loc(kind=LocKind.GPR, start=18, reg_len=1), "
 403             "<concat.inp5.copy.outputs[0]: <I64>>: "
 404             "Loc(kind=LocKind.GPR, start=19, reg_len=1), "
 405             "<concat.inp6.copy.outputs[0]: <I64>>: "
 406             "Loc(kind=LocKind.GPR, start=20, reg_len=1), "
 407             "<concat.inp7.copy.outputs[0]: <I64>>: "
 408             "Loc(kind=LocKind.GPR, start=21, reg_len=1), "
 409             "<concat.inp8.copy.outputs[0]: <I64>>: "
 410             "Loc(kind=LocKind.GPR, start=22, reg_len=1), "
 411             "<concat.inp9.copy.outputs[0]: <I64>>: "
 412             "Loc(kind=LocKind.GPR, start=23, reg_len=1), "
 413             "<concat.inp10.copy.outputs[0]: <I64>>: "
 414             "Loc(kind=LocKind.GPR, start=24, reg_len=1), "
 415             "<concat.inp11.copy.outputs[0]: <I64>>: "
 416             "Loc(kind=LocKind.GPR, start=25, reg_len=1), "
 417             "<concat.inp12.copy.outputs[0]: <I64>>: "
 418             "Loc(kind=LocKind.GPR, start=26, reg_len=1), "
 419             "<concat.inp13.copy.outputs[0]: <I64>>: "
 420             "Loc(kind=LocKind.GPR, start=27, reg_len=1), "
 421             "<concat.inp14.copy.outputs[0]: <I64>>: "
 422             "Loc(kind=LocKind.GPR, start=28, reg_len=1), "
 423             "<concat.inp15.copy.outputs[0]: <I64>>: "
 424             "Loc(kind=LocKind.GPR, start=29, reg_len=1), "
 425             "<concat.inp16.copy.outputs[0]: <I64>>: "
 426             "Loc(kind=LocKind.GPR, start=30, reg_len=1), "
 427             "<concat.inp17.copy.outputs[0]: <I64>>: "
 428             "Loc(kind=LocKind.GPR, start=31, reg_len=1), "
 429             "<concat.inp18.copy.outputs[0]: <I64>>: "
 430             "Loc(kind=LocKind.GPR, start=32, reg_len=1), "
 431             "<concat.inp19.copy.outputs[0]: <I64>>: "
 432             "Loc(kind=LocKind.GPR, start=33, reg_len=1), "
 433             "<concat.inp20.copy.outputs[0]: <I64>>: "
 434             "Loc(kind=LocKind.GPR, start=34, reg_len=1), "
 435             "<concat.inp21.copy.outputs[0]: <I64>>: "
 436             "Loc(kind=LocKind.GPR, start=35, reg_len=1), "
 437             "<concat.inp22.copy.outputs[0]: <I64>>: "
 438             "Loc(kind=LocKind.GPR, start=36, reg_len=1), "
 439             "<concat.inp23.copy.outputs[0]: <I64>>: "
 440             "Loc(kind=LocKind.GPR, start=37, reg_len=1), "
 441             "<concat.inp24.copy.outputs[0]: <I64>>: "
 442             "Loc(kind=LocKind.GPR, start=38, reg_len=1), "
 443             "<concat.inp25.copy.outputs[0]: <I64>>: "
 444             "Loc(kind=LocKind.GPR, start=39, reg_len=1), "
 445             "<concat.inp26.copy.outputs[0]: <I64>>: "
 446             "Loc(kind=LocKind.GPR, start=40, reg_len=1), "
 447             "<concat.inp27.copy.outputs[0]: <I64>>: "
 448             "Loc(kind=LocKind.GPR, start=41, reg_len=1), "
 449             "<concat.inp28.copy.outputs[0]: <I64>>: "
 450             "Loc(kind=LocKind.GPR, start=42, reg_len=1), "
 451             "<concat.inp29.copy.outputs[0]: <I64>>: "
 452             "Loc(kind=LocKind.GPR, start=43, reg_len=1), "
 453             "<concat.inp30.copy.outputs[0]: <I64>>: "
 454             "Loc(kind=LocKind.GPR, start=44, reg_len=1), "
 455             "<concat.inp31.copy.outputs[0]: <I64>>: "
 456             "Loc(kind=LocKind.GPR, start=45, reg_len=1), "
 457             "<concat.outputs[0]: <I64*32>>: "
 458             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 459             "<spread.out30.copy.outputs[0]: <I64>>: "
 460             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 461             "<spread.out29.copy.outputs[0]: <I64>>: "
 462             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 463             "<spread.out28.copy.outputs[0]: <I64>>: "
 464             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 465             "<spread.out27.copy.outputs[0]: <I64>>: "
 466             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 467             "<spread.out26.copy.outputs[0]: <I64>>: "
 468             "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
 469             "<spread.out25.copy.outputs[0]: <I64>>: "
 470             "Loc(kind=LocKind.GPR, start=8, reg_len=1), "
 471             "<spread.out24.copy.outputs[0]: <I64>>: "
 472             "Loc(kind=LocKind.GPR, start=9, reg_len=1), "
 473             "<spread.out23.copy.outputs[0]: <I64>>: "
 474             "Loc(kind=LocKind.GPR, start=10, reg_len=1), "
 475             "<spread.out22.copy.outputs[0]: <I64>>: "
 476             "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
 477             "<spread.out21.copy.outputs[0]: <I64>>: "
 478             "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
 479             "<spread.out20.copy.outputs[0]: <I64>>: "
 480             "Loc(kind=LocKind.GPR, start=77, reg_len=1), "
 481             "<spread.out19.copy.outputs[0]: <I64>>: "
 482             "Loc(kind=LocKind.GPR, start=78, reg_len=1), "
 483             "<spread.out18.copy.outputs[0]: <I64>>: "
 484             "Loc(kind=LocKind.GPR, start=79, reg_len=1), "
 485             "<spread.out17.copy.outputs[0]: <I64>>: "
 486             "Loc(kind=LocKind.GPR, start=80, reg_len=1), "
 487             "<spread.out16.copy.outputs[0]: <I64>>: "
 488             "Loc(kind=LocKind.GPR, start=81, reg_len=1), "
 489             "<spread.out15.copy.outputs[0]: <I64>>: "
 490             "Loc(kind=LocKind.GPR, start=82, reg_len=1), "
 491             "<spread.out14.copy.outputs[0]: <I64>>: "
 492             "Loc(kind=LocKind.GPR, start=83, reg_len=1), "
 493             "<spread.out13.copy.outputs[0]: <I64>>: "
 494             "Loc(kind=LocKind.GPR, start=84, reg_len=1), "
 495             "<spread.out12.copy.outputs[0]: <I64>>: "
 496             "Loc(kind=LocKind.GPR, start=85, reg_len=1), "
 497             "<spread.out11.copy.outputs[0]: <I64>>: "
 498             "Loc(kind=LocKind.GPR, start=86, reg_len=1), "
 499             "<spread.out10.copy.outputs[0]: <I64>>: "
 500             "Loc(kind=LocKind.GPR, start=87, reg_len=1), "
 501             "<spread.out9.copy.outputs[0]: <I64>>: "
 502             "Loc(kind=LocKind.GPR, start=88, reg_len=1), "
 503             "<spread.out8.copy.outputs[0]: <I64>>: "
 504             "Loc(kind=LocKind.GPR, start=89, reg_len=1), "
 505             "<spread.out7.copy.outputs[0]: <I64>>: "
 506             "Loc(kind=LocKind.GPR, start=90, reg_len=1), "
 507             "<spread.out6.copy.outputs[0]: <I64>>: "
 508             "Loc(kind=LocKind.GPR, start=91, reg_len=1), "
 509             "<spread.out5.copy.outputs[0]: <I64>>: "
 510             "Loc(kind=LocKind.GPR, start=92, reg_len=1), "
 511             "<spread.out4.copy.outputs[0]: <I64>>: "
 512             "Loc(kind=LocKind.GPR, start=93, reg_len=1), "
 513             "<spread.out3.copy.outputs[0]: <I64>>: "
 514             "Loc(kind=LocKind.GPR, start=94, reg_len=1), "
 515             "<spread.out2.copy.outputs[0]: <I64>>: "
 516             "Loc(kind=LocKind.GPR, start=95, reg_len=1), "
 517             "<spread.out1.copy.outputs[0]: <I64>>: "
 518             "Loc(kind=LocKind.GPR, start=96, reg_len=1), "
 519             "<spread.out0.copy.outputs[0]: <I64>>: "
 520             "Loc(kind=LocKind.GPR, start=97, reg_len=1), "
 521             "<concat.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 522             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 523             "<concat.inp32.setvl.outputs[0]: <VL_MAXVL>>: "
 524             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 525             "<spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 526             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 527             "<spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 528             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 529             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 530             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 531             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 532             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 533             "<vl.outputs[0]: <VL_MAXVL>>: "
 534             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1)"
 535             "}"
 536         )
 537         state = GenAsmState(reg_assignments)
 538         fn.gen_asm(state)
 539         self.assertEqual(state.output, [
 540             'setvl 0, 0, 32, 0, 1, 1',
 541             'setvl 0, 0, 32, 0, 1, 1',
 542             'sv.addi *45, 0, 0',
 543             'setvl 0, 0, 32, 0, 1, 1',
 544             'setvl 0, 0, 32, 0, 1, 1',
 545             'setvl 0, 0, 32, 0, 1, 1',
 546             'or 97, 45, 45',
 547             'or 96, 46, 46',
 548             'or 95, 47, 47',
 549             'or 94, 48, 48',
 550             'or 93, 49, 49',
 551             'or 92, 50, 50',
 552             'or 91, 51, 51',
 553             'or 90, 52, 52',
 554             'or 89, 53, 53',
 555             'or 88, 54, 54',
 556             'or 87, 55, 55',
 557             'or 86, 56, 56',
 558             'or 85, 57, 57',
 559             'or 84, 58, 58',
 560             'or 83, 59, 59',
 561             'or 82, 60, 60',
 562             'or 81, 61, 61',
 563             'or 80, 62, 62',
 564             'or 79, 63, 63',
 565             'or 78, 64, 64',
 566             'or 77, 65, 65',
 567             'or 12, 66, 66',
 568             'or 11, 67, 67',
 569             'or 10, 68, 68',
 570             'or 9, 69, 69',
 571             'or 8, 70, 70',
 572             'or 7, 71, 71',
 573             'or 6, 72, 72',
 574             'or 5, 73, 73',
 575             'or 4, 74, 74',
 576             'or 3, 75, 75',
 577             'or 14, 76, 76',
 578             'or 15, 3, 3',
 579             'or 16, 4, 4',
 580             'or 17, 5, 5',
 581             'or 18, 6, 6',
 582             'or 19, 7, 7',
 583             'or 20, 8, 8',
 584             'or 21, 9, 9',
 585             'or 22, 10, 10',
 586             'or 23, 11, 11',
 587             'or 24, 12, 12',
 588             'or 25, 77, 77',
 589             'or 26, 78, 78',
 590             'or 27, 79, 79',
 591             'or 28, 80, 80',
 592             'or 29, 81, 81',
 593             'or 30, 82, 82',
 594             'or 31, 83, 83',
 595             'or 32, 84, 84',
 596             'or 33, 85, 85',
 597             'or 34, 86, 86',
 598             'or 35, 87, 87',
 599             'or 36, 88, 88',
 600             'or 37, 89, 89',
 601             'or 38, 90, 90',
 602             'or 39, 91, 91',
 603             'or 40, 92, 92',
 604             'or 41, 93, 93',
 605             'or 42, 94, 94',
 606             'or 43, 95, 95',
 607             'or 44, 96, 96',
 608             'or 45, 97, 97',
 609             'setvl 0, 0, 32, 0, 1, 1',
 610             'setvl 0, 0, 32, 0, 1, 1'
 611         ])
 612
 613
 614 if __name__ == "__main__":
 615     _ = unittest.main()