3 from bigint_presentation_code
.compiler_ir
import (FixedGPRRangeType
, Fn
, GPRRange
,
4 GPRType
, GlobalMem
, Op
, OpAddSubE
,
5 OpClearCY
, OpConcat
, OpCopy
,
6 OpFuncArg
, OpInputMem
, OpLI
,
7 OpLoad
, OpStore
, XERBit
)
8 from bigint_presentation_code
.register_allocator
import (
9 AllocationFailed
, allocate_registers
, MergedRegSet
,
10 try_allocate_registers_without_spilling
)
13 class TestMergedRegSet(unittest
.TestCase
):
16 def test_from_equality_constraint(self
):
18 op0
= OpLI(fn
, 0, length
=1)
19 op1
= OpLI(fn
, 0, length
=2)
20 op2
= OpLI(fn
, 0, length
=3)
21 self
.assertEqual(MergedRegSet
.from_equality_constraint([
30 self
.assertEqual(MergedRegSet
.from_equality_constraint([
41 class TestRegisterAllocator(unittest
.TestCase
):
44 def test_try_alloc_fail(self
):
46 op0
= OpLI(fn
, 0, length
=52)
47 op1
= OpLI(fn
, 0, length
=64)
48 op2
= OpConcat(fn
, [op0
.out
, op1
.out
])
50 reg_assignments
= try_allocate_registers_without_spilling(fn
.ops
)
52 repr(reg_assignments
),
54 "node=IGNode(#0, merged_reg_set=MergedRegSet(["
55 "(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)]), "
56 "edges={}, reg=None), "
57 "live_intervals=LiveIntervals("
59 "MergedRegSet([(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)]): "
60 "LiveInterval(first_write=0, last_use=2)}, "
61 "merged_reg_sets=MergedRegSets(data={"
62 "<#0.out>: MergedRegSet(["
63 "(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)]), "
64 "<#1.out>: MergedRegSet(["
65 "(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)]), "
66 "<#2.dest>: MergedRegSet(["
67 "(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)])}), "
68 "reg_sets_live_after={"
69 "0: OFSet([MergedRegSet(["
70 "(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)])]), "
71 "1: OFSet([MergedRegSet(["
72 "(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)])]), "
74 "interference_graph=InterferenceGraph(nodes={"
76 "merged_reg_set=MergedRegSet(["
77 "(<#2.dest>, 0), (<#0.out>, 0), (<#1.out>, 52)]), "
78 "edges={}, reg=None)}))"
81 def test_try_alloc_bigint_inc(self
):
83 op0
= OpFuncArg(fn
, FixedGPRRangeType(GPRRange(3)))
84 op1
= OpCopy(fn
, op0
.out
, GPRType())
88 op3
= OpLoad(fn
, arg
, offset
=0, mem
=mem
, length
=32)
92 op5
= OpLI(fn
, 0, length
=31)
94 op6
= OpConcat(fn
, [b_0
, b_rest
])
98 op8
= OpAddSubE(fn
, a
, b
, cy
, is_sub
=False)
100 op9
= OpStore(fn
, s
, arg
, offset
=0, mem_in
=mem
)
103 reg_assignments
= try_allocate_registers_without_spilling(fn
.ops
)
105 expected_reg_assignments
= {
106 op0
.out
: GPRRange(start
=3, length
=1),
107 op1
.dest
: GPRRange(start
=3, length
=1),
108 op2
.out
: GlobalMem
.GlobalMem
,
109 op3
.RT
: GPRRange(start
=78, length
=32),
110 op4
.out
: GPRRange(start
=46, length
=1),
111 op5
.out
: GPRRange(start
=47, length
=31),
112 op6
.dest
: GPRRange(start
=46, length
=32),
114 op8
.RT
: GPRRange(start
=14, length
=32),
115 op8
.CY_out
: XERBit
.CY
,
116 op9
.mem_out
: GlobalMem
.GlobalMem
,
119 self
.assertEqual(reg_assignments
, expected_reg_assignments
)
121 def tst_try_alloc_concat(self
, expected_regs
, expected_dest_reg
):
122 # type: (list[GPRRange], GPRRange) -> None
124 li_ops
= [OpLI(fn
, i
, r
.length
) for i
, r
in enumerate(expected_regs
)]
125 concat
= OpConcat(fn
, [i
.out
for i
in li_ops
])
127 reg_assignments
= try_allocate_registers_without_spilling(fn
.ops
)
129 expected_reg_assignments
= {concat
.dest
: expected_dest_reg
}
130 for li_op
, reg
in zip(li_ops
, expected_regs
):
131 expected_reg_assignments
[li_op
.out
] = reg
133 self
.assertEqual(reg_assignments
, expected_reg_assignments
)
135 def test_try_alloc_concat_1(self
):
136 self
.tst_try_alloc_concat([GPRRange(3)], GPRRange(3))
138 def test_try_alloc_concat_3(self
):
139 self
.tst_try_alloc_concat([GPRRange(3, 3)], GPRRange(3, 3))
141 def test_try_alloc_concat_3_5(self
):
142 self
.tst_try_alloc_concat([GPRRange(3, 3), GPRRange(6, 5)],
145 def test_try_alloc_concat_5_3(self
):
146 self
.tst_try_alloc_concat([GPRRange(3, 5), GPRRange(8, 3)],
149 def test_try_alloc_concat_1_2_3_4_5_6(self
):
150 self
.tst_try_alloc_concat([
160 if __name__
== "__main__":