1 // SPDX-License-Identifier: LGPL-2.1-or-later
2 // See Notices.txt for copyright information
4 #![cfg_attr(feature = "native_instrs", feature(llvm_asm))]
6 #[cfg(all(feature = "native_instrs", not(target_arch = "powerpc64")))]
7 compile_error!("native_instrs feature requires target_arch to be powerpc64");
12 use power_instruction_analyzer_proc_macro::instructions;
13 use serde::{Deserialize, Serialize};
14 use serde_plain::forward_display_to_serde;
15 use std::{cmp::Ordering, fmt};
17 // powerpc bit numbers count from MSB to LSB
18 const fn get_xer_bit_mask(powerpc_bit_num: usize) -> u64 {
19 (1 << 63) >> powerpc_bit_num
22 macro_rules! xer_subset {
24 $struct_vis:vis struct $struct_name:ident {
26 #[bit($powerpc_bit_num:expr, $mask_name:ident)]
27 $field_vis:vis $field_name:ident: bool,
31 #[derive(Default, Copy, Clone, Debug, PartialEq, Serialize, Deserialize)]
32 $struct_vis struct $struct_name {
34 $field_vis $field_name: bool,
40 $field_vis const $mask_name: u64 = get_xer_bit_mask($powerpc_bit_num);
42 $struct_vis const XER_MASK: u64 = $(Self::$mask_name)|+;
43 pub const fn from_xer(xer: u64) -> Self {
46 $field_name: (xer & Self::$mask_name) != 0,
50 pub const fn to_xer(self) -> u64 {
51 let mut retval = 0u64;
54 retval |= Self::$mask_name;
64 pub struct OverflowFlags {
65 #[bit(32, XER_SO_MASK)]
67 #[bit(33, XER_OV_MASK)]
69 #[bit(44, XER_OV32_MASK)]
75 pub const fn from_overflow(overflow: bool) -> Self {
85 pub struct CarryFlags {
86 #[bit(34, XER_CA_MASK)]
88 #[bit(45, XER_CA32_MASK)]
93 #[derive(Copy, Clone, Debug, PartialEq, Serialize, Deserialize)]
94 pub struct ConditionRegister {
101 impl ConditionRegister {
102 pub const fn from_4_bits(bits: u8) -> Self {
103 // assert bits is 4-bits long
104 // can switch to using assert! once rustc feature const_panic is stabilized
105 [0; 0x10][bits as usize];
114 pub const CR_FIELD_COUNT: usize = 8;
115 pub const fn from_cr_field(cr: u32, field_index: usize) -> Self {
116 // assert field_index is less than CR_FIELD_COUNT
117 // can switch to using assert! once rustc feature const_panic is stabilized
118 [0; Self::CR_FIELD_COUNT][field_index];
120 let reversed_field_index = Self::CR_FIELD_COUNT - field_index - 1;
121 let bits = (cr >> (4 * reversed_field_index)) & 0xF;
122 Self::from_4_bits(bits as u8)
124 pub fn from_signed_int<T: Ord + Default>(value: T, so: bool) -> Self {
125 let ordering = value.cmp(&T::default());
127 lt: ordering == Ordering::Less,
128 gt: ordering == Ordering::Greater,
129 eq: ordering == Ordering::Equal,
135 #[derive(Copy, Clone, Default, Debug, PartialEq, Serialize, Deserialize)]
136 pub struct InstructionOutput {
139 skip_serializing_if = "Option::is_none",
140 with = "serde_hex::SerdeHex"
143 #[serde(default, flatten, skip_serializing_if = "Option::is_none")]
144 pub overflow: Option<OverflowFlags>,
145 #[serde(default, flatten, skip_serializing_if = "Option::is_none")]
146 pub carry: Option<CarryFlags>,
147 #[serde(default, skip_serializing_if = "Option::is_none")]
148 pub cr0: Option<ConditionRegister>,
149 #[serde(default, skip_serializing_if = "Option::is_none")]
150 pub cr1: Option<ConditionRegister>,
151 #[serde(default, skip_serializing_if = "Option::is_none")]
152 pub cr2: Option<ConditionRegister>,
153 #[serde(default, skip_serializing_if = "Option::is_none")]
154 pub cr3: Option<ConditionRegister>,
155 #[serde(default, skip_serializing_if = "Option::is_none")]
156 pub cr4: Option<ConditionRegister>,
157 #[serde(default, skip_serializing_if = "Option::is_none")]
158 pub cr5: Option<ConditionRegister>,
159 #[serde(default, skip_serializing_if = "Option::is_none")]
160 pub cr6: Option<ConditionRegister>,
161 #[serde(default, skip_serializing_if = "Option::is_none")]
162 pub cr7: Option<ConditionRegister>,
166 pub struct MissingInstructionInput {
167 pub input: InstructionInputRegister,
170 impl fmt::Display for MissingInstructionInput {
171 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
172 write!(f, "missing instruction input: {}", self.input)
176 impl std::error::Error for MissingInstructionInput {}
178 pub type InstructionResult = Result<InstructionOutput, MissingInstructionInput>;
180 #[derive(Copy, Clone, Eq, PartialEq, Hash, Debug, Serialize, Deserialize)]
181 pub enum InstructionInputRegister {
182 #[serde(rename = "ra")]
184 #[serde(rename = "rb")]
186 #[serde(rename = "rc")]
188 #[serde(rename = "carry")]
190 #[serde(rename = "overflow")]
194 forward_display_to_serde!(InstructionInputRegister);
196 #[derive(Copy, Clone, Default, Debug, Serialize, Deserialize)]
197 pub struct InstructionInput {
200 skip_serializing_if = "Option::is_none",
201 with = "serde_hex::SerdeHex"
206 skip_serializing_if = "Option::is_none",
207 with = "serde_hex::SerdeHex"
212 skip_serializing_if = "Option::is_none",
213 with = "serde_hex::SerdeHex"
216 #[serde(default, skip_serializing_if = "Option::is_none", flatten)]
217 pub carry: Option<CarryFlags>,
218 #[serde(default, skip_serializing_if = "Option::is_none", flatten)]
219 pub overflow: Option<OverflowFlags>,
222 macro_rules! impl_instr_try_get {
225 $vis:vis fn $fn:ident -> $return_type:ty { .$field:ident else $error_enum:ident }
228 impl InstructionInput {
230 $vis fn $fn(self) -> Result<$return_type, MissingInstructionInput> {
231 self.$field.ok_or(MissingInstructionInput {
232 input: InstructionInputRegister::$error_enum,
240 impl_instr_try_get! {
241 pub fn try_get_ra -> u64 {
244 pub fn try_get_rb -> u64 {
247 pub fn try_get_rc -> u64 {
250 pub fn try_get_carry -> CarryFlags {
253 pub fn try_get_overflow -> OverflowFlags {
254 .overflow else Overflow
258 fn is_false(v: &bool) -> bool {
262 #[derive(Copy, Clone, Debug, Serialize, Deserialize)]
263 pub struct TestCase {
266 pub inputs: InstructionInput,
267 #[serde(default, skip_serializing_if = "Option::is_none")]
268 pub native_outputs: Option<InstructionOutput>,
269 pub model_outputs: InstructionOutput,
270 #[serde(default, skip_serializing_if = "is_false")]
271 pub model_mismatch: bool,
274 #[derive(Clone, Debug, Serialize, Deserialize)]
275 pub struct WholeTest {
276 #[serde(default, skip_serializing_if = "Vec::is_empty")]
277 pub test_cases: Vec<TestCase>,
278 pub any_model_mismatch: bool,
284 fn add(Ra, Rb) -> (Rt) {
288 fn addo(Ra, Rb, Overflow) -> (Rt, Overflow) {
292 fn add_(Ra, Rb, Overflow) -> (Rt, CR0) {
296 fn addo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
302 fn subf(Ra, Rb) -> (Rt) {
306 fn subfo(Ra, Rb, Overflow) -> (Rt, Overflow) {
310 fn subf_(Ra, Rb, Overflow) -> (Rt, CR0) {
313 #[enumerant = SubFO_]
314 fn subfo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
320 fn addc(Ra, Rb) -> (Rt, Carry) {
324 fn addco(Ra, Rb, Overflow) -> (Rt, Carry, Overflow) {
328 fn addc_(Ra, Rb, Overflow) -> (Rt, Carry, CR0) {
331 #[enumerant = AddCO_]
332 fn addco_(Ra, Rb, Overflow) -> (Rt, Carry, Overflow, CR0) {
338 fn subfc(Ra, Rb) -> (Rt, Carry) {
341 #[enumerant = SubFCO]
342 fn subfco(Ra, Rb, Overflow) -> (Rt, Carry, Overflow) {
345 #[enumerant = SubFC_]
346 fn subfc_(Ra, Rb, Overflow) -> (Rt, Carry, CR0) {
349 #[enumerant = SubFCO_]
350 fn subfco_(Ra, Rb, Overflow) -> (Rt, Carry, Overflow, CR0) {
356 fn adde(Ra, Rb, Carry) -> (Rt, Carry) {
360 fn addeo(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow) {
364 fn adde_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, CR0) {
367 #[enumerant = AddEO_]
368 fn addeo_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
374 fn subfe(Ra, Rb, Carry) -> (Rt, Carry) {
377 #[enumerant = SubFEO]
378 fn subfeo(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow) {
381 #[enumerant = SubFE_]
382 fn subfe_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, CR0) {
385 #[enumerant = SubFEO_]
386 fn subfeo_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
392 fn addme(Ra, Carry) -> (Rt, Carry) {
395 #[enumerant = AddMEO]
396 fn addmeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
399 #[enumerant = AddME_]
400 fn addme_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
403 #[enumerant = AddMEO_]
404 fn addmeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
409 #[enumerant = SubFME]
410 fn subfme(Ra, Carry) -> (Rt, Carry) {
413 #[enumerant = SubFMEO]
414 fn subfmeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
417 #[enumerant = SubFME_]
418 fn subfme_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
421 #[enumerant = SubFMEO_]
422 fn subfmeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
428 fn addze(Ra, Carry) -> (Rt, Carry) {
431 #[enumerant = AddZEO]
432 fn addzeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
435 #[enumerant = AddZE_]
436 fn addze_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
439 #[enumerant = AddZEO_]
440 fn addzeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
445 #[enumerant = SubFZE]
446 fn subfze(Ra, Carry) -> (Rt, Carry) {
449 #[enumerant = SubFZEO]
450 fn subfzeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
453 #[enumerant = SubFZE_]
454 fn subfze_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
457 #[enumerant = SubFZEO_]
458 fn subfzeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
463 fn addex(Ra("r3"), Rb("r4"), Overflow) -> (Rt("r5"), Overflow) {
464 // work around LLVM not supporting addex instruction:
465 "addex" : ".long 0x7CA32154 # addex r5, r3, r4, 0"
474 fn nego(Ra, Overflow) -> (Rt, Overflow) {
478 fn neg_(Ra, Overflow) -> (Rt, CR0) {
482 fn nego_(Ra, Overflow) -> (Rt, Overflow, CR0) {
488 fn divde(Ra, Rb) -> (Rt) {
491 #[enumerant = DivDEO]
492 fn divdeo(Ra, Rb, Overflow) -> (Rt, Overflow) {
495 #[enumerant = DivDE_]
496 fn divde_(Ra, Rb, Overflow) -> (Rt, CR0) {
499 #[enumerant = DivDEO_]
500 fn divdeo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
505 #[enumerant = DivDEU]
506 fn divdeu(Ra, Rb) -> (Rt) {
509 #[enumerant = DivDEUO]
510 fn divdeuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
513 #[enumerant = DivDEU_]
514 fn divdeu_(Ra, Rb, Overflow) -> (Rt, CR0) {
517 #[enumerant = DivDEUO_]
518 fn divdeuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
524 fn divd(Ra, Rb) -> (Rt) {
528 fn divdo(Ra, Rb, Overflow) -> (Rt, Overflow) {
532 fn divd_(Ra, Rb, Overflow) -> (Rt, CR0) {
535 #[enumerant = DivDO_]
536 fn divdo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
542 fn divdu(Ra, Rb) -> (Rt) {
545 #[enumerant = DivDUO]
546 fn divduo(Ra, Rb, Overflow) -> (Rt, Overflow) {
549 #[enumerant = DivDU_]
550 fn divdu_(Ra, Rb, Overflow) -> (Rt, CR0) {
553 #[enumerant = DivDUO_]
554 fn divduo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
560 fn divwe(Ra, Rb) -> (Rt) {
563 #[enumerant = DivWEO]
564 fn divweo(Ra, Rb, Overflow) -> (Rt, Overflow) {
567 #[enumerant = DivWE_]
568 fn divwe_(Ra, Rb, Overflow) -> (Rt, CR0) {
571 #[enumerant = DivWEO_]
572 fn divweo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
577 #[enumerant = DivWEU]
578 fn divweu(Ra, Rb) -> (Rt) {
581 #[enumerant = DivWEUO]
582 fn divweuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
585 #[enumerant = DivWEU_]
586 fn divweu_(Ra, Rb, Overflow) -> (Rt, CR0) {
589 #[enumerant = DivWEUO_]
590 fn divweuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
596 fn divw(Ra, Rb) -> (Rt) {
600 fn divwo(Ra, Rb, Overflow) -> (Rt, Overflow) {
604 fn divw_(Ra, Rb, Overflow) -> (Rt, CR0) {
607 #[enumerant = DivWO_]
608 fn divwo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
614 fn divwu(Ra, Rb) -> (Rt) {
617 #[enumerant = DivWUO]
618 fn divwuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
621 #[enumerant = DivWU_]
622 fn divwu_(Ra, Rb, Overflow) -> (Rt, CR0) {
625 #[enumerant = DivWUO_]
626 fn divwuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
632 fn modsd(Ra, Rb) -> (Rt) {
636 fn modud(Ra, Rb) -> (Rt) {
640 fn modsw(Ra, Rb) -> (Rt) {
644 fn moduw(Ra, Rb) -> (Rt) {
650 fn mullw(Ra, Rb) -> (Rt) {
653 #[enumerant = MulLWO]
654 fn mullwo(Ra, Rb, Overflow) -> (Rt, Overflow) {
657 #[enumerant = MulLW_]
658 fn mullw_(Ra, Rb, Overflow) -> (Rt, CR0) {
661 #[enumerant = MulLWO_]
662 fn mullwo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
668 fn mulhw(Ra, Rb) -> (Rt) {
671 #[enumerant = MulHW_]
672 fn mulhw_(Ra, Rb, Overflow) -> (Rt, CR0) {
677 #[enumerant = MulHWU]
678 fn mulhwu(Ra, Rb) -> (Rt) {
681 #[enumerant = MulHWU_]
682 fn mulhwu_(Ra, Rb, Overflow) -> (Rt, CR0) {
688 fn mulld(Ra, Rb) -> (Rt) {
691 #[enumerant = MulLDO]
692 fn mulldo(Ra, Rb, Overflow) -> (Rt, Overflow) {
695 #[enumerant = MulLD_]
696 fn mulld_(Ra, Rb, Overflow) -> (Rt, CR0) {
699 #[enumerant = MulLDO_]
700 fn mulldo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
706 fn mulhd(Ra, Rb) -> (Rt) {
709 #[enumerant = MulHD_]
710 fn mulhd_(Ra, Rb, Overflow) -> (Rt, CR0) {
715 #[enumerant = MulHDU]
716 fn mulhdu(Ra, Rb) -> (Rt) {
719 #[enumerant = MulHDU_]
720 fn mulhdu_(Ra, Rb, Overflow) -> (Rt, CR0) {
725 #[enumerant = MAddHD]
726 fn maddhd(Ra, Rb, Rc) -> (Rt) {
729 #[enumerant = MAddHDU]
730 fn maddhdu(Ra, Rb, Rc) -> (Rt) {
733 #[enumerant = MAddLD]
734 fn maddld(Ra, Rb, Rc) -> (Rt) {
739 // must be after instrs macro call since it uses a macro definition