1 // SPDX-License-Identifier: LGPL-2.1-or-later
2 // See Notices.txt for copyright information
4 #![cfg_attr(feature = "native_instrs", feature(llvm_asm))]
6 #[cfg(all(feature = "native_instrs", not(target_arch = "powerpc64")))]
7 compile_error!("native_instrs feature requires target_arch to be powerpc64");
12 use power_instruction_analyzer_proc_macro::instructions;
13 use serde::{Deserialize, Serialize};
14 use serde_plain::forward_display_to_serde;
15 use std::{cmp::Ordering, fmt};
17 // powerpc bit numbers count from MSB to LSB
18 const fn get_xer_bit_mask(powerpc_bit_num: usize) -> u64 {
19 (1 << 63) >> powerpc_bit_num
22 macro_rules! xer_subset {
24 $struct_vis:vis struct $struct_name:ident {
26 #[bit($powerpc_bit_num:expr, $mask_name:ident)]
27 $field_vis:vis $field_name:ident: bool,
31 #[derive(Default, Copy, Clone, Debug, PartialEq, Serialize, Deserialize)]
32 $struct_vis struct $struct_name {
34 $field_vis $field_name: bool,
40 $field_vis const $mask_name: u64 = get_xer_bit_mask($powerpc_bit_num);
42 $struct_vis const XER_MASK: u64 = $(Self::$mask_name)|+;
43 pub const fn from_xer(xer: u64) -> Self {
46 $field_name: (xer & Self::$mask_name) != 0,
50 pub const fn to_xer(self) -> u64 {
51 let mut retval = 0u64;
54 retval |= Self::$mask_name;
64 pub struct OverflowFlags {
65 #[bit(32, XER_SO_MASK)]
67 #[bit(33, XER_OV_MASK)]
69 #[bit(44, XER_OV32_MASK)]
75 pub const fn from_overflow(overflow: bool) -> Self {
85 pub struct CarryFlags {
86 #[bit(34, XER_CA_MASK)]
88 #[bit(45, XER_CA32_MASK)]
93 #[derive(Copy, Clone, Debug, PartialEq, Serialize, Deserialize)]
94 pub struct ConditionRegister {
101 impl ConditionRegister {
102 pub const fn from_4_bits(bits: u8) -> Self {
103 // assert bits is 4-bits long
104 // can switch to using assert! once rustc feature const_panic is stabilized
105 [0; 0x10][bits as usize];
114 pub const CR_FIELD_COUNT: usize = 8;
115 pub const fn from_cr_field(cr: u32, field_index: usize) -> Self {
116 // assert field_index is less than CR_FIELD_COUNT
117 // can switch to using assert! once rustc feature const_panic is stabilized
118 [0; Self::CR_FIELD_COUNT][field_index];
120 let reversed_field_index = Self::CR_FIELD_COUNT - field_index - 1;
121 let bits = (cr >> (4 * reversed_field_index)) & 0xF;
122 Self::from_4_bits(bits as u8)
124 pub fn from_signed_int<T: Ord + Default>(value: T, so: bool) -> Self {
125 let ordering = value.cmp(&T::default());
127 lt: ordering == Ordering::Less,
128 gt: ordering == Ordering::Greater,
129 eq: ordering == Ordering::Equal,
135 #[derive(Copy, Clone, Default, Debug, PartialEq, Serialize, Deserialize)]
136 pub struct InstructionOutput {
139 skip_serializing_if = "Option::is_none",
140 with = "serde_hex::SerdeHex"
143 #[serde(default, flatten, skip_serializing_if = "Option::is_none")]
144 pub overflow: Option<OverflowFlags>,
145 #[serde(default, flatten, skip_serializing_if = "Option::is_none")]
146 pub carry: Option<CarryFlags>,
147 #[serde(default, skip_serializing_if = "Option::is_none")]
148 pub cr0: Option<ConditionRegister>,
149 #[serde(default, skip_serializing_if = "Option::is_none")]
150 pub cr1: Option<ConditionRegister>,
151 #[serde(default, skip_serializing_if = "Option::is_none")]
152 pub cr2: Option<ConditionRegister>,
153 #[serde(default, skip_serializing_if = "Option::is_none")]
154 pub cr3: Option<ConditionRegister>,
155 #[serde(default, skip_serializing_if = "Option::is_none")]
156 pub cr4: Option<ConditionRegister>,
157 #[serde(default, skip_serializing_if = "Option::is_none")]
158 pub cr5: Option<ConditionRegister>,
159 #[serde(default, skip_serializing_if = "Option::is_none")]
160 pub cr6: Option<ConditionRegister>,
161 #[serde(default, skip_serializing_if = "Option::is_none")]
162 pub cr7: Option<ConditionRegister>,
166 pub struct MissingInstructionInput {
167 pub input: InstructionInputRegister,
170 impl fmt::Display for MissingInstructionInput {
171 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
172 write!(f, "missing instruction input: {}", self.input)
176 impl std::error::Error for MissingInstructionInput {}
178 pub type InstructionResult = Result<InstructionOutput, MissingInstructionInput>;
180 #[derive(Copy, Clone, Eq, PartialEq, Hash, Debug, Serialize, Deserialize)]
181 pub enum InstructionInputRegister {
182 #[serde(rename = "ra")]
184 #[serde(rename = "rb")]
186 #[serde(rename = "rc")]
188 #[serde(rename = "carry")]
190 #[serde(rename = "overflow")]
192 #[serde(rename = "immediate_s16")]
194 #[serde(rename = "immediate_u16")]
198 forward_display_to_serde!(InstructionInputRegister);
200 #[derive(Copy, Clone, Default, Debug, Serialize, Deserialize)]
201 pub struct InstructionInput {
204 skip_serializing_if = "Option::is_none",
205 with = "serde_hex::SerdeHex"
210 skip_serializing_if = "Option::is_none",
211 with = "serde_hex::SerdeHex"
216 skip_serializing_if = "Option::is_none",
217 with = "serde_hex::SerdeHex"
222 skip_serializing_if = "Option::is_none",
223 with = "serde_hex::SerdeHex"
225 pub immediate: Option<u64>,
226 #[serde(default, skip_serializing_if = "Option::is_none", flatten)]
227 pub carry: Option<CarryFlags>,
228 #[serde(default, skip_serializing_if = "Option::is_none", flatten)]
229 pub overflow: Option<OverflowFlags>,
232 macro_rules! impl_instr_try_get {
235 $vis:vis fn $fn:ident -> $return_type:ty { .$field:ident else $error_enum:ident }
238 impl InstructionInput {
240 $vis fn $fn(self) -> Result<$return_type, MissingInstructionInput> {
241 self.$field.ok_or(MissingInstructionInput {
242 input: InstructionInputRegister::$error_enum,
250 impl_instr_try_get! {
251 pub fn try_get_ra -> u64 {
254 pub fn try_get_rb -> u64 {
257 pub fn try_get_rc -> u64 {
260 pub fn try_get_carry -> CarryFlags {
263 pub fn try_get_overflow -> OverflowFlags {
264 .overflow else Overflow
268 impl InstructionInput {
269 fn try_get_immediate(
271 input: InstructionInputRegister,
272 ) -> Result<u64, MissingInstructionInput> {
273 self.immediate.ok_or(MissingInstructionInput { input })
275 pub fn try_get_immediate_u16(self) -> Result<u16, MissingInstructionInput> {
276 Ok(self.try_get_immediate(InstructionInputRegister::ImmediateU16)? as u16)
278 pub fn try_get_immediate_s16(self) -> Result<i16, MissingInstructionInput> {
279 Ok(self.try_get_immediate(InstructionInputRegister::ImmediateS16)? as i16)
283 fn is_false(v: &bool) -> bool {
287 #[derive(Copy, Clone, Debug, Serialize, Deserialize)]
288 pub struct TestCase {
291 pub inputs: InstructionInput,
292 #[serde(default, skip_serializing_if = "Option::is_none")]
293 pub native_outputs: Option<InstructionOutput>,
294 pub model_outputs: InstructionOutput,
295 #[serde(default, skip_serializing_if = "is_false")]
296 pub model_mismatch: bool,
299 #[derive(Clone, Debug, Serialize, Deserialize)]
300 pub struct WholeTest {
301 #[serde(default, skip_serializing_if = "Vec::is_empty")]
302 pub test_cases: Vec<TestCase>,
303 pub any_model_mismatch: bool,
308 fn addi(Ra, ImmediateS16) -> (Rt) {
313 fn addis(Ra, ImmediateS16) -> (Rt) {
319 fn add(Ra, Rb) -> (Rt) {
323 fn addo(Ra, Rb, Overflow) -> (Rt, Overflow) {
327 fn add_(Ra, Rb, Overflow) -> (Rt, CR0) {
331 fn addo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
337 fn addic(Ra, ImmediateS16) -> (Rt, Carry) {
340 #[enumerant = AddIC_]
341 fn addic_(Ra, ImmediateS16, Overflow) -> (Rt, Carry, CR0) {
347 fn subf(Ra, Rb) -> (Rt) {
351 fn subfo(Ra, Rb, Overflow) -> (Rt, Overflow) {
355 fn subf_(Ra, Rb, Overflow) -> (Rt, CR0) {
358 #[enumerant = SubFO_]
359 fn subfo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
363 #[enumerant = SubFIC]
364 fn subfic(Ra, ImmediateS16) -> (Rt, Carry) {
370 fn addc(Ra, Rb) -> (Rt, Carry) {
374 fn addco(Ra, Rb, Overflow) -> (Rt, Carry, Overflow) {
378 fn addc_(Ra, Rb, Overflow) -> (Rt, Carry, CR0) {
381 #[enumerant = AddCO_]
382 fn addco_(Ra, Rb, Overflow) -> (Rt, Carry, Overflow, CR0) {
388 fn subfc(Ra, Rb) -> (Rt, Carry) {
391 #[enumerant = SubFCO]
392 fn subfco(Ra, Rb, Overflow) -> (Rt, Carry, Overflow) {
395 #[enumerant = SubFC_]
396 fn subfc_(Ra, Rb, Overflow) -> (Rt, Carry, CR0) {
399 #[enumerant = SubFCO_]
400 fn subfco_(Ra, Rb, Overflow) -> (Rt, Carry, Overflow, CR0) {
406 fn adde(Ra, Rb, Carry) -> (Rt, Carry) {
410 fn addeo(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow) {
414 fn adde_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, CR0) {
417 #[enumerant = AddEO_]
418 fn addeo_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
424 fn subfe(Ra, Rb, Carry) -> (Rt, Carry) {
427 #[enumerant = SubFEO]
428 fn subfeo(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow) {
431 #[enumerant = SubFE_]
432 fn subfe_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, CR0) {
435 #[enumerant = SubFEO_]
436 fn subfeo_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
442 fn addme(Ra, Carry) -> (Rt, Carry) {
445 #[enumerant = AddMEO]
446 fn addmeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
449 #[enumerant = AddME_]
450 fn addme_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
453 #[enumerant = AddMEO_]
454 fn addmeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
459 #[enumerant = SubFME]
460 fn subfme(Ra, Carry) -> (Rt, Carry) {
463 #[enumerant = SubFMEO]
464 fn subfmeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
467 #[enumerant = SubFME_]
468 fn subfme_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
471 #[enumerant = SubFMEO_]
472 fn subfmeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
478 fn addze(Ra, Carry) -> (Rt, Carry) {
481 #[enumerant = AddZEO]
482 fn addzeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
485 #[enumerant = AddZE_]
486 fn addze_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
489 #[enumerant = AddZEO_]
490 fn addzeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
495 #[enumerant = SubFZE]
496 fn subfze(Ra, Carry) -> (Rt, Carry) {
499 #[enumerant = SubFZEO]
500 fn subfzeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
503 #[enumerant = SubFZE_]
504 fn subfze_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
507 #[enumerant = SubFZEO_]
508 fn subfzeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
513 fn addex(Ra("r3"), Rb("r4"), Overflow) -> (Rt("r5"), Overflow) {
514 // work around LLVM not supporting addex instruction:
515 "addex" : ".long 0x7CA32154 # addex r5, r3, r4, 0"
524 fn nego(Ra, Overflow) -> (Rt, Overflow) {
528 fn neg_(Ra, Overflow) -> (Rt, CR0) {
532 fn nego_(Ra, Overflow) -> (Rt, Overflow, CR0) {
538 fn divde(Ra, Rb) -> (Rt) {
541 #[enumerant = DivDEO]
542 fn divdeo(Ra, Rb, Overflow) -> (Rt, Overflow) {
545 #[enumerant = DivDE_]
546 fn divde_(Ra, Rb, Overflow) -> (Rt, CR0) {
549 #[enumerant = DivDEO_]
550 fn divdeo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
555 #[enumerant = DivDEU]
556 fn divdeu(Ra, Rb) -> (Rt) {
559 #[enumerant = DivDEUO]
560 fn divdeuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
563 #[enumerant = DivDEU_]
564 fn divdeu_(Ra, Rb, Overflow) -> (Rt, CR0) {
567 #[enumerant = DivDEUO_]
568 fn divdeuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
574 fn divd(Ra, Rb) -> (Rt) {
578 fn divdo(Ra, Rb, Overflow) -> (Rt, Overflow) {
582 fn divd_(Ra, Rb, Overflow) -> (Rt, CR0) {
585 #[enumerant = DivDO_]
586 fn divdo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
592 fn divdu(Ra, Rb) -> (Rt) {
595 #[enumerant = DivDUO]
596 fn divduo(Ra, Rb, Overflow) -> (Rt, Overflow) {
599 #[enumerant = DivDU_]
600 fn divdu_(Ra, Rb, Overflow) -> (Rt, CR0) {
603 #[enumerant = DivDUO_]
604 fn divduo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
610 fn divwe(Ra, Rb) -> (Rt) {
613 #[enumerant = DivWEO]
614 fn divweo(Ra, Rb, Overflow) -> (Rt, Overflow) {
617 #[enumerant = DivWE_]
618 fn divwe_(Ra, Rb, Overflow) -> (Rt, CR0) {
621 #[enumerant = DivWEO_]
622 fn divweo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
627 #[enumerant = DivWEU]
628 fn divweu(Ra, Rb) -> (Rt) {
631 #[enumerant = DivWEUO]
632 fn divweuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
635 #[enumerant = DivWEU_]
636 fn divweu_(Ra, Rb, Overflow) -> (Rt, CR0) {
639 #[enumerant = DivWEUO_]
640 fn divweuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
646 fn divw(Ra, Rb) -> (Rt) {
650 fn divwo(Ra, Rb, Overflow) -> (Rt, Overflow) {
654 fn divw_(Ra, Rb, Overflow) -> (Rt, CR0) {
657 #[enumerant = DivWO_]
658 fn divwo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
664 fn divwu(Ra, Rb) -> (Rt) {
667 #[enumerant = DivWUO]
668 fn divwuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
671 #[enumerant = DivWU_]
672 fn divwu_(Ra, Rb, Overflow) -> (Rt, CR0) {
675 #[enumerant = DivWUO_]
676 fn divwuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
682 fn modsd(Ra, Rb) -> (Rt) {
686 fn modud(Ra, Rb) -> (Rt) {
690 fn modsw(Ra, Rb) -> (Rt) {
694 fn moduw(Ra, Rb) -> (Rt) {
700 fn mullw(Ra, Rb) -> (Rt) {
703 #[enumerant = MulLWO]
704 fn mullwo(Ra, Rb, Overflow) -> (Rt, Overflow) {
707 #[enumerant = MulLW_]
708 fn mullw_(Ra, Rb, Overflow) -> (Rt, CR0) {
711 #[enumerant = MulLWO_]
712 fn mullwo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
718 fn mulhw(Ra, Rb) -> (Rt) {
721 #[enumerant = MulHW_]
722 fn mulhw_(Ra, Rb, Overflow) -> (Rt, CR0) {
727 #[enumerant = MulHWU]
728 fn mulhwu(Ra, Rb) -> (Rt) {
731 #[enumerant = MulHWU_]
732 fn mulhwu_(Ra, Rb, Overflow) -> (Rt, CR0) {
738 fn mulld(Ra, Rb) -> (Rt) {
741 #[enumerant = MulLDO]
742 fn mulldo(Ra, Rb, Overflow) -> (Rt, Overflow) {
745 #[enumerant = MulLD_]
746 fn mulld_(Ra, Rb, Overflow) -> (Rt, CR0) {
749 #[enumerant = MulLDO_]
750 fn mulldo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
756 fn mulhd(Ra, Rb) -> (Rt) {
759 #[enumerant = MulHD_]
760 fn mulhd_(Ra, Rb, Overflow) -> (Rt, CR0) {
765 #[enumerant = MulHDU]
766 fn mulhdu(Ra, Rb) -> (Rt) {
769 #[enumerant = MulHDU_]
770 fn mulhdu_(Ra, Rb, Overflow) -> (Rt, CR0) {
775 #[enumerant = MAddHD]
776 fn maddhd(Ra, Rb, Rc) -> (Rt) {
779 #[enumerant = MAddHDU]
780 fn maddhdu(Ra, Rb, Rc) -> (Rt) {
783 #[enumerant = MAddLD]
784 fn maddld(Ra, Rb, Rc) -> (Rt) {
789 // must be after instrs macro call since it uses a macro definition