autopep8, whitespace
[pinmux.git] / src / pinmux_generator.py
1 # ================================== Steps to add peripherals ============
2 # Step-1: create interface declaration for the peripheral to be added.
3 # Remember these are interfaces defined for the pinmux and hence
4 # will be opposite to those defined at the peripheral.
5 # For eg. the output TX from the UART will be input (method Action)
6 # for the pinmux.
7 # These changes will have to be done in interface_decl.py
8 # Step-2 define the wires that will be required to transfer data from the
9 # peripheral interface to the IO cell and vice-versa. Create a
10 # mkDWire for each input/output between the peripheral and the
11 # pinmux. Also create an implicit wire of GenericIOType for each cell
12 # that can be connected to a each bit from the peripheral.
13 # These changes will have to be done in wire_def.py
14 # Step-3: create the definitions for each of the methods defined above.
15 # These changes will have to be done in interface_decl.py
16 # ========================================================================
17
18 # default module imports
19 import os
20 import sys
21 import time
22 import math
23
24 # project module imports
25 from interface_decl import Interfaces, mux_interface, io_interface
26 from parse import Parse
27 from actual_pinmux import init
28 from bus_transactors import axi4_lite
29
30 p = Parse()
31 init(p)
32 ifaces = Interfaces()
33 ifaces.ifaceadd('io', p.N_IO, io_interface, 0)
34
35 if not os.path.exists("bsv_src"):
36 os.makedirs("bsv_src")
37
38 copyright = '''
39 /*
40 This BSV file has been generated by the PinMux tool available at:
41 https://bitbucket.org/casl/pinmux.
42
43 Authors: Neel Gala, Luke
44 Date of generation: ''' + time.strftime("%c") + '''
45 */
46 '''
47 header = copyright + '''
48 package pinmux;
49
50 typedef struct{
51 Bit#(1) outputval; // output from core to pad bit7
52 Bit#(1) output_en; // output enable from core to pad bit6
53 Bit#(1) input_en; // input enable from core to io_cell bit5
54 Bit#(1) pullup_en; // pullup enable from core to io_cell bit4
55 Bit#(1) pulldown_en; // pulldown enable from core to io_cell bit3
56 Bit#(1) drivestrength; // drivestrength from core to io_cell bit2
57 Bit#(1) pushpull_en; // pushpull enable from core to io_cell bit1
58 Bit#(1) opendrain_en; // opendrain enable form core to io_cell bit0
59 } GenericIOType deriving(Eq,Bits,FShow);
60
61 '''
62 footer = '''
63 endinterface;
64 endmodule
65 endpackage
66 '''
67 # ============================================#
68 # ==== populating the file with the code =====#
69 # ============================================#
70
71 # package and interface declaration followed by the generic io_cell definition
72 with open("./bsv_src/pinmux.bsv", "w") as bsv_file:
73 bsv_file.write(header)
74
75 bsv_file.write('''\
76 interface MuxSelectionLines;
77
78 // declare the method which will capture the user pin-mux
79 // selection values.The width of the input is dependent on the number
80 // of muxes happening per IO. For now we have a generalized width
81 // where each IO will have the same number of muxes.''')
82
83 for cell in p.muxed_cells:
84 bsv_file.write(mux_interface.ifacefmt(cell[0],
85 int(math.log(len(cell) - 1, 2))))
86
87 bsv_file.write('''
88 endinterface
89
90 interface PeripheralSide;
91 // declare the interface to the IO cells.
92 // Each IO cell will have 8 input field (output from pin mux
93 // and on output field (input to pinmux)''')
94 # ==============================================================
95
96 # == create method definitions for all peripheral interfaces ==#
97 ifaces.ifacefmt(bsv_file)
98
99 # ==============================================================
100
101 # ===== finish interface definition and start module definition=======
102 bsv_file.write('''
103 endinterface
104
105 interface Ifc_pinmux;
106 interface MuxSelectionLines mux_lines;
107 interface PeripheralSide peripheral_side;
108 endinterface
109 (*synthesize*)
110 module mkpinmux(Ifc_pinmux);
111 ''')
112 # ====================================================================
113
114 # ======================= create wire and registers =================#
115 bsv_file.write('''
116 // the followins wires capture the pin-mux selection
117 // values for each mux assigned to a CELL
118 ''')
119 for cell in p.muxed_cells:
120 bsv_file.write(mux_interface.wirefmt(
121 cell[0], int(math.log(len(cell) - 1, 2))))
122
123 ifaces.wirefmt(bsv_file)
124
125 bsv_file.write("\n")
126 # ====================================================================
127 # ========================= Actual pinmuxing ========================#
128 bsv_file.write('''
129 /*====== This where the muxing starts for each io-cell======*/
130 ''')
131 bsv_file.write(p.pinmux)
132 bsv_file.write('''
133 /*============================================================*/
134 ''')
135 # ====================================================================
136 # ================= interface definitions for each method =============#
137 bsv_file.write('''
138 interface mux_lines = interface MuxSelectionLines
139 ''')
140 for cell in p.muxed_cells:
141 bsv_file.write(mux_interface.ifacedef(cell[0],
142 int(math.log(len(cell) - 1, 2))))
143 bsv_file.write('''
144 endinterface;
145 interface peripheral_side = interface PeripheralSide
146 ''')
147 ifaces.ifacedef(bsv_file)
148 bsv_file.write(footer)
149 print("BSV file successfully generated: bsv_src/pinmux.bsv")
150 # ======================================================================
151
152 with open('bsv_src/PinTop.bsv', 'w') as bsv_file:
153 bsv_file.write(copyright + '''
154 package PinTop;
155 import pinmux::*;
156 interface Ifc_PintTop;
157 method ActionValue#(Bool) write(Bit#({0}) addr, Bit#({1}) data);
158 method Tuple2#(Bool,Bit#({1})) read(Bit#({0}) addr);
159 interface PeripheralSide peripheral_side;
160 endinterface
161
162 module mkPinTop(Ifc_PintTop);
163 // instantiate the pin-mux module here
164 Ifc_pinmux pinmux <-mkpinmux;
165
166 // declare the registers which will be used to mux the IOs
167 '''.format(p.ADDR_WIDTH, p.DATA_WIDTH))
168
169 for cell in p.muxed_cells:
170 bsv_file.write('''
171 Reg#(Bit#({0})) rg_muxio_{1} <-mkReg(0);'''.format(
172 int(math.log(len(cell) - 1, 2)), cell[0]))
173
174 bsv_file.write('''
175 // rule to connect the registers to the selection lines of the
176 // pin-mux module
177 rule connect_selection_registers;''')
178
179 for cell in p.muxed_cells:
180 bsv_file.write('''
181 pinmux.mux_lines.cell{0}_mux(rg_muxio_{0});'''.format(cell[0]))
182
183 bsv_file.write('''
184 endrule
185 // method definitions for the write user interface
186 method ActionValue#(Bool) write(Bit#({2}) addr, Bit#({3}) data);
187 Bool err=False;
188 case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
189 p.ADDR_WIDTH, p.DATA_WIDTH))
190 index = 0
191 for cell in p.muxed_cells:
192 bsv_file.write('''
193 {0}: rg_muxio_{1}<=truncate(data);'''.format(index, cell[0]))
194 index = index + 1
195
196 bsv_file.write('''
197 default: err=True;
198 endcase
199 return err;
200 endmethod''')
201
202 bsv_file.write('''
203 // method definitions for the read user interface
204 method Tuple2#(Bool,Bit#({3})) read(Bit#({2}) addr);
205 Bool err=False;
206 Bit#(32) data=0;
207 case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
208 p.ADDR_WIDTH, p.DATA_WIDTH))
209 index = 0
210 for cell in p.muxed_cells:
211 bsv_file.write('''
212 {0}: data=zeroExtend(rg_muxio_{1});'''.format(index, cell[0]))
213 index = index + 1
214
215 bsv_file.write('''
216 default:err=True;
217 endcase
218 return tuple2(err,data);
219 endmethod
220 interface peripheral_side=pinmux.peripheral_side;
221 endmodule
222 endpackage
223 ''')
224
225 # ######## Generate bus transactors ################
226 with open('bsv_src/bus.bsv', 'w') as bsv_file:
227 bsv_file.write(axi4_lite.format(p.ADDR_WIDTH, p.DATA_WIDTH))
228 # ##################################################