remove unneeded generic_io import
[pinmux.git] / src / pinmux_generator.py
1 # ================================== Steps to add peripherals ============
2 # Step-1: create interface declaration for the peripheral to be added.
3 # Remember these are interfaces defined for the pinmux and hence
4 # will be opposite to those defined at the peripheral.
5 # For eg. the output TX from the UART will be input (method Action)
6 # for the pinmux.
7 # These changes will have to be done in interface_decl.py
8 # Step-2 define the wires that will be required to transfer data from the
9 # peripheral interface to the IO cell and vice-versa. Create a
10 # mkDWire for each input/output between the peripheral and the
11 # pinmux. Also create an implicit wire of GenericIOType for each cell
12 # that can be connected to a each bit from the peripheral.
13 # These changes will have to be done in wire_def.py
14 # Step-3: create the definitions for each of the methods defined above.
15 # These changes will have to be done in interface_decl.py
16 # ========================================================================
17
18 # default module imports
19 import os
20 import sys
21 import time
22 import math
23
24 # project module imports
25 from interface_decl import Interfaces, mux_interface, io_interface
26 from wire_def import muxwire
27 from parse import Parse
28 from actual_pinmux import init
29 from bus_transactors import axi4_lite
30
31 p = Parse()
32 init(p)
33 ifaces = Interfaces()
34 ifaces.ifaceadd('io', p.N_IO, io_interface, 0)
35
36 if not os.path.exists("bsv_src"):
37 os.makedirs("bsv_src")
38
39 copyright = '''
40 /*
41 This BSV file has been generated by the PinMux tool available at:
42 https://bitbucket.org/casl/pinmux.
43
44 Authors: Neel Gala, Luke
45 Date of generation: ''' + time.strftime("%c") + '''
46 */
47 '''
48 header = copyright+'''
49 package pinmux;
50
51 typedef struct{
52 Bit#(1) outputval; // output from core to pad bit7
53 Bit#(1) output_en; // output enable from core to pad bit6
54 Bit#(1) input_en; // input enable from core to io_cell bit5
55 Bit#(1) pullup_en; // pullup enable from core to io_cell bit4
56 Bit#(1) pulldown_en; // pulldown enable from core to io_cell bit3
57 Bit#(1) drivestrength; // drivestrength from core to io_cell bit2
58 Bit#(1) pushpull_en; // pushpull enable from core to io_cell bit1
59 Bit#(1) opendrain_en; // opendrain enable form core to io_cell bit0
60 } GenericIOType deriving(Eq,Bits,FShow);
61
62 interface MuxSelectionLines;
63 '''
64 footer = '''
65 endinterface;
66 endmodule
67 endpackage
68 '''
69 # ============================================#
70 # ==== populating the file with the code =====#
71 # ============================================#
72
73 # package and interface declaration followed by the generic io_cell definition
74 with open("./bsv_src/pinmux.bsv", "w") as bsv_file:
75 bsv_file.write(header)
76
77 bsv_file.write('''
78
79 // declare the method which will capture the user pin-mux
80 // selection values.The width of the input is dependent on the number
81 // of muxes happening per IO. For now we have a generalized width
82 // where each IO will have the same number of muxes.''')
83
84 for cell in p.muxed_cells:
85 bsv_file.write(mux_interface.ifacefmt(cell[0],
86 int(math.log(len(cell) - 1, 2))))
87
88 bsv_file.write('''
89 endinterface
90
91 interface PeripheralSide;
92 // declare the interface to the IO cells.
93 // Each IO cell will have 8 input field (output from pin mux
94 // and on output field (input to pinmux)''')
95 # ==============================================================
96
97 # == create method definitions for all peripheral interfaces ==#
98 ifaces.ifacefmt(bsv_file)
99
100 # ==============================================================
101
102 # ===== finish interface definition and start module definition=======
103 bsv_file.write('''
104 endinterface
105
106 interface Ifc_pinmux;
107 interface MuxSelectionLines mux_lines;
108 interface PeripheralSide peripheral_side;
109 endinterface
110 (*synthesize*)
111 module mkpinmux(Ifc_pinmux);
112 ''')
113 # ====================================================================
114
115 # ======================= create wire and registers =================#
116 bsv_file.write('''
117 // the followins wires capture the pin-mux selection
118 // values for each mux assigned to a CELL
119 ''')
120 for cell in p.muxed_cells:
121 bsv_file.write(muxwire.format(
122 cell[0], int(math.log(len(cell) - 1, 2))))
123
124 ifaces.wirefmt(bsv_file)
125
126 bsv_file.write("\n")
127 # ====================================================================
128 # ========================= Actual pinmuxing ========================#
129 bsv_file.write('''
130 /*====== This where the muxing starts for each io-cell======*/
131 ''')
132 bsv_file.write(p.pinmux)
133 bsv_file.write('''
134 /*============================================================*/
135 ''')
136 # ====================================================================
137 # ================= interface definitions for each method =============#
138 bsv_file.write('''
139 interface mux_lines = interface MuxSelectionLines
140 ''')
141 for cell in p.muxed_cells:
142 bsv_file.write(mux_interface.ifacedef(cell[0],
143 int(math.log(len(cell) - 1, 2))))
144 bsv_file.write('''
145 endinterface;
146 interface peripheral_side = interface PeripheralSide
147 ''')
148 ifaces.ifacedef(bsv_file)
149 bsv_file.write(footer)
150 print("BSV file successfully generated: bsv_src/pinmux.bsv")
151 # ======================================================================
152
153 with open('bsv_src/PinTop.bsv', 'w') as bsv_file:
154 bsv_file.write(copyright+'''
155 package PinTop;
156 import pinmux::*;
157 interface Ifc_PintTop;
158 method ActionValue#(Bool) write(Bit#({0}) addr, Bit#({1}) data);
159 method Tuple2#(Bool,Bit#({1})) read(Bit#({0}) addr);
160 interface PeripheralSide peripheral_side;
161 endinterface
162
163 module mkPinTop(Ifc_PintTop);
164 // instantiate the pin-mux module here
165 Ifc_pinmux pinmux <-mkpinmux;
166
167 // declare the registers which will be used to mux the IOs
168 '''.format(p.ADDR_WIDTH, p.DATA_WIDTH))
169
170 for cell in p.muxed_cells:
171 bsv_file.write('''
172 Reg#(Bit#({0})) rg_muxio_{1} <-mkReg(0);'''.format(
173 int(math.log(len(cell) - 1, 2)), cell[0]))
174
175 bsv_file.write('''
176 // rule to connect the registers to the selection lines of the
177 // pin-mux module
178 rule connect_selection_registers;''')
179
180 for cell in p.muxed_cells:
181 bsv_file.write('''
182 pinmux.mux_lines.cell{0}_mux(rg_muxio_{0});'''.format(cell[0]))
183
184 bsv_file.write('''
185 endrule
186 // method definitions for the write user interface
187 method ActionValue#(Bool) write(Bit#({2}) addr, Bit#({3}) data);
188 Bool err=False;
189 case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
190 p.ADDR_WIDTH, p.DATA_WIDTH))
191 index = 0
192 for cell in p.muxed_cells:
193 bsv_file.write('''
194 {0}: rg_muxio_{1}<=truncate(data);'''.format(index, cell[0]))
195 index = index + 1
196
197 bsv_file.write('''
198 default: err=True;
199 endcase
200 return err;
201 endmethod''')
202
203 bsv_file.write('''
204 // method definitions for the read user interface
205 method Tuple2#(Bool,Bit#({3})) read(Bit#({2}) addr);
206 Bool err=False;
207 Bit#(32) data=0;
208 case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
209 p.ADDR_WIDTH, p.DATA_WIDTH))
210 index = 0
211 for cell in p.muxed_cells:
212 bsv_file.write('''
213 {0}: data=zeroExtend(rg_muxio_{1});'''.format(index, cell[0]))
214 index = index + 1
215
216 bsv_file.write('''
217 default:err=True;
218 endcase
219 return tuple2(err,data);
220 endmethod
221 interface peripheral_side=pinmux.peripheral_side;
222 endmodule
223 endpackage
224 ''')
225
226 # ######## Generate bus transactors ################
227 with open('bsv_src/bus.bsv', 'w') as bsv_file:
228 bsv_file.write(axi4_lite.format(p.ADDR_WIDTH, p.DATA_WIDTH))
229 # ##################################################