src/soc/fu/div/test/test_pipe_caller.py

   1 import random
   2 import unittest
   3 from soc.simulator.program import Program
   4 from soc.config.endian import bigendian
   5
   6 from soc.fu.test.common import (TestCase, TestAccumulatorBase, skip_case)
   7 from soc.fu.div.pipe_data import DivPipeKind
   8
   9 from soc.fu.div.test.helper import (log_rand, get_cu_inputs,
  10                                     set_alu_inputs, DivTestHelper)
  11
  12
  13 class DivTestCases(TestAccumulatorBase):
  14     def case_divweu_regression(self):
  15         # simulator is wrong, FSM and power-instruction-analyzer both correct
  16         lst = ["divweu 3, 1, 2"]
  17         initial_regs = [0] * 32
  18         initial_regs[1] = 0x1
  19         initial_regs[2] = 0xffffffffffffffff
  20         with Program(lst, bigendian) as prog:
  21             self.add_case(prog, initial_regs)
  22
  23     def case_divwe_regression(self):
  24         # div FU and power-instruction-analyzer both correctly return 0
  25         # hitting behavior undefined by Power v3.1 spec, need to adjust
  26         # simulator API to tell tests that the simulator's output doesn't
  27         # need to completely match
  28         lst = [f"divwe 3, 1, 2"]
  29         initial_regs = [0] * 32
  30         initial_regs[1] = 1
  31         initial_regs[2] = 1
  32         with Program(lst, bigendian) as prog:
  33             self.add_case(prog, initial_regs)
  34
  35     def case_divwe__regression(self):
  36         lst = ["divwe. 3, 1, 2"]
  37         initial_regs = [0] * 32
  38         with Program(lst, bigendian) as prog:
  39             self.add_case(prog, initial_regs)
  40
  41     def case_divw_regression(self):
  42         # simulator is wrong, FSM and power-instruction-analyzer both correct
  43         lst = [f"divw 0, 1, 2"]
  44         initial_regs = [0] * 32
  45         initial_regs[2] = 0x2
  46         initial_regs[1] = 0x80000000
  47         with Program(lst, bigendian) as prog:
  48             self.add_case(prog, initial_regs)
  49
  50     # modulo
  51     def case_modsd_regression2(self):
  52         lst = [f"modsd 0, 1, 2"]
  53         initial_regs = [0] * 32
  54         initial_regs[2] = 0xff
  55         initial_regs[1] = 0x7fffffffffffffff
  56         with Program(lst, bigendian) as prog:
  57             self.add_case(prog, initial_regs)
  58
  59     # modulo
  60     def case_modsd_regression(self):
  61         lst = [f"modsd 17, 27, 0"]
  62         initial_regs = [0] * 32
  63         initial_regs[0] = 0xff
  64         initial_regs[27] = 0x7fffffffffffffff
  65         with Program(lst, bigendian) as prog:
  66             self.add_case(prog, initial_regs)
  67
  68     def case_divduo_regression(self):
  69         lst = [f"divduo. 11, 20, 6"]
  70         initial_regs = [0] * 32
  71         # gpr: 00ff00ff00ff0080 <- r6
  72         # gpr: 000000000000007f <- r11
  73         # gpr: 7f6e5d4c3b2a1908 <- r20
  74         initial_regs[6] = 0x00ff00ff00ff0080
  75         initial_regs[20] = 0x7f6e5d4c3b2a1908
  76         with Program(lst, bigendian) as prog:
  77             self.add_case(prog, initial_regs)
  78
  79     def case_0_regression(self):
  80         for i in range(40):
  81             lst = ["divwo 3, 1, 2"]
  82             initial_regs = [0] * 32
  83             initial_regs[1] = 0xbc716835f32ac00c
  84             initial_regs[2] = 0xcdf69a7f7042db66
  85             with Program(lst, bigendian) as prog:
  86                 self.add_case(prog, initial_regs)
  87
  88     def case_1_regression(self):
  89         lst = ["divwo 3, 1, 2"]
  90         initial_regs = [0] * 32
  91         initial_regs[1] = 0x10000000000000000-4
  92         initial_regs[2] = 0x10000000000000000-2
  93         with Program(lst, bigendian) as prog:
  94             self.add_case(prog, initial_regs)
  95
  96     def case_2_regression(self):
  97         lst = ["divwo 3, 1, 2"]
  98         initial_regs = [0] * 32
  99         initial_regs[1] = 0xffffffffffff9321
 100         initial_regs[2] = 0xffffffffffff7012
 101         with Program(lst, bigendian) as prog:
 102             self.add_case(prog, initial_regs)
 103
 104     def case_3_regression(self):
 105         lst = ["divwo. 3, 1, 2"]
 106         initial_regs = [0] * 32
 107         initial_regs[1] = 0x1b8e32f2458746af
 108         initial_regs[2] = 0x6b8aee2ccf7d62e9
 109         with Program(lst, bigendian) as prog:
 110             self.add_case(prog, initial_regs)
 111
 112     def case_4_regression(self):
 113         lst = ["divw 3, 1, 2"]
 114         initial_regs = [0] * 32
 115         initial_regs[1] = 0x1c4e6c2f3aa4a05c
 116         initial_regs[2] = 0xe730c2eed6cc8dd7
 117         with Program(lst, bigendian) as prog:
 118             self.add_case(prog, initial_regs)
 119
 120     def case_5_regression(self):
 121         lst = ["divw 3, 1, 2",
 122                "divwo. 6, 4, 5"]
 123         initial_regs = [0] * 32
 124         initial_regs[1] = 0x1c4e6c2f3aa4a05c
 125         initial_regs[2] = 0xe730c2eed6cc8dd7
 126         initial_regs[4] = 0x1b8e32f2458746af
 127         initial_regs[5] = 0x6b8aee2ccf7d62e9
 128         with Program(lst, bigendian) as prog:
 129             self.add_case(prog, initial_regs)
 130
 131     def case_6_regression(self):
 132         # CR0 not getting set properly for this one
 133         # turns out that overflow is not set correctly in
 134         # fu/div/output_stage.py calc_overflow
 135         # https://bugs.libre-soc.org/show_bug.cgi?id=425
 136         lst = ["divw. 3, 1, 2"]
 137         initial_regs = [0] * 32
 138         initial_regs[1] = 0x61c1cc3b80f2a6af
 139         initial_regs[2] = 0x9dc66a7622c32bc0
 140         with Program(lst, bigendian) as prog:
 141             self.add_case(prog, initial_regs)
 142
 143     def case_7_regression(self):
 144         # https://bugs.libre-soc.org/show_bug.cgi?id=425
 145         lst = ["divw. 3, 1, 2"]
 146         initial_regs = [0] * 32
 147         initial_regs[1] = 0xf1791627e05e8096
 148         initial_regs[2] = 0xffc868bf4573da0b
 149         with Program(lst, bigendian) as prog:
 150             self.add_case(prog, initial_regs)
 151
 152     def case_8_fsm_regression(self):  # FSM result is "36" not 6
 153         lst = ["divwu. 3, 1, 2"]
 154         initial_regs = [0] * 32
 155         initial_regs[1] = 18
 156         initial_regs[2] = 3
 157         with Program(lst, bigendian) as prog:
 158             self.add_case(prog, initial_regs)
 159
 160     def case_9_regression(self):  # CR0 fails: expected 0b10, actual 0b11
 161         lst = ["divw. 3, 1, 2"]
 162         initial_regs = [0] * 32
 163         initial_regs[1] = 1
 164         initial_regs[2] = 0
 165         with Program(lst, bigendian) as prog:
 166             self.add_case(prog, initial_regs)
 167
 168     def case_10_regression(self):  # overflow fails
 169         lst = ["divwo 3, 1, 2"]
 170         initial_regs = [0] * 32
 171         initial_regs[1] = 0xbc716835f32ac00c
 172         initial_regs[2] = 0xcdf69a7f7042db66
 173         with Program(lst, bigendian) as prog:
 174             self.add_case(prog, initial_regs)
 175
 176     def case_11_regression(self):
 177         lst = ["divwo. 3, 1, 2"]
 178         initial_regs = [0] * 32
 179         initial_regs[1] = 0xffffffffffffffff
 180         initial_regs[2] = 0xffffffffffffffff
 181         with Program(lst, bigendian) as prog:
 182             self.add_case(prog, initial_regs)
 183
 184     def case_divw_by_zero_1(self):
 185         lst = ["divw. 3, 1, 2"]
 186         initial_regs = [0] * 32
 187         initial_regs[1] = 0x1
 188         initial_regs[2] = 0x0
 189         with Program(lst, bigendian) as prog:
 190             self.add_case(prog, initial_regs)
 191
 192     def case_divw_overflow2(self):
 193         lst = ["divw. 3, 1, 2"]
 194         initial_regs = [0] * 32
 195         initial_regs[1] = 0x80000000
 196         initial_regs[2] = 0xffffffffffffffff  # top bits don't seem to matter
 197         with Program(lst, bigendian) as prog:
 198             self.add_case(prog, initial_regs)
 199
 200     def case_divw_overflow3(self):
 201         lst = ["divw. 3, 1, 2"]
 202         initial_regs = [0] * 32
 203         initial_regs[1] = 0x80000000
 204         initial_regs[2] = 0xffffffff
 205         with Program(lst, bigendian) as prog:
 206             self.add_case(prog, initial_regs)
 207
 208     def case_divwuo_regression_1(self):
 209         lst = ["divwuo. 3, 1, 2"]
 210         initial_regs = [0] * 32
 211         initial_regs[1] = 0x7591a398c4e32b68
 212         initial_regs[2] = 0x48674ab432867d69
 213         with Program(lst, bigendian) as prog:
 214             self.add_case(prog, initial_regs)
 215
 216     def case_divwuo_1(self):
 217         lst = ["divwuo. 3, 1, 2"]
 218         initial_regs = [0] * 32
 219         initial_regs[1] = 0x50
 220         initial_regs[2] = 0x2
 221         with Program(lst, bigendian) as prog:
 222             self.add_case(prog, initial_regs)
 223
 224     def case_rand_divwu(self):
 225         insns = ["divwu", "divwu.", "divwuo", "divwuo."]
 226         for i in range(40):
 227             choice = random.choice(insns)
 228             lst = [f"{choice} 3, 1, 2"]
 229             initial_regs = [0] * 32
 230             initial_regs[1] = log_rand(32)
 231             initial_regs[2] = log_rand(32)
 232             with Program(lst, bigendian) as prog:
 233                 self.add_case(prog, initial_regs)
 234
 235     def case_rand_divw(self):
 236         insns = ["divw", "divw.", "divwo", "divwo."]
 237         for i in range(40):
 238             choice = random.choice(insns)
 239             lst = [f"{choice} 3, 1, 2"]
 240             initial_regs = [0] * 32
 241             initial_regs[1] = log_rand(32)
 242             initial_regs[2] = log_rand(32)
 243             with Program(lst, bigendian) as prog:
 244                 self.add_case(prog, initial_regs)
 245
 246
 247 class TestPipe(DivTestHelper):
 248     def test_div_pipe_core(self):
 249         self.run_all(DivTestCases().test_data,
 250                      DivPipeKind.DivPipeCore, "div_pipe_caller")
 251
 252     def test_fsm_div_core(self):
 253         self.run_all(DivTestCases().test_data,
 254                      DivPipeKind.FSMDivCore, "div_pipe_caller")
 255
 256     def test_sim_only(self):
 257         self.run_all(DivTestCases().test_data,
 258                      DivPipeKind.SimOnly, "div_pipe_caller")
 259
 260
 261 if __name__ == "__main__":
 262     unittest.main()