1 # This file is Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
8 from litex
.soc
.cores
.icap
import ICAP
, ICAPBitstream
11 class TestICAP(unittest
.TestCase
):
12 def test_icap_command_reload(self
):
14 yield dut
.addr
.storage
.eq(0x4)
15 yield dut
.data
.storage
.eq(0xf)
18 yield dut
.send
.re
.eq(1)
20 yield dut
.send
.re
.eq(0)
24 dut
= ICAP(simulation
=True)
27 run_simulation(dut
, generator(dut
), clocks
, vcd_name
="icap.vcd")
29 def test_icap_bitstream_syntax(self
):
30 dut
= ICAPBitstream(simulation
=True)