1 from nmigen
.hdl
import *
2 from nmigen
.hdl
.rec
import *
3 from nmigen
.back
.pysim
import *
4 from nmigen
.lib
.io
import *
9 class PinLayoutTestCase(FHDLTestCase
):
10 def assertLayoutEqual(self
, layout
, expected
):
12 for name
, (shape
, dir) in layout
.items():
13 casted_layout
[name
] = (Shape
.cast(shape
), dir)
15 self
.assertEqual(casted_layout
, expected
)
18 class PinLayoutCombTestCase(PinLayoutTestCase
):
19 def test_pin_layout_i(self
):
20 layout_1
= pin_layout(1, dir="i")
21 self
.assertLayoutEqual(layout_1
.fields
, {
22 "i": ((1, False), DIR_NONE
),
25 layout_2
= pin_layout(2, dir="i")
26 self
.assertLayoutEqual(layout_2
.fields
, {
27 "i": ((2, False), DIR_NONE
),
30 def test_pin_layout_o(self
):
31 layout_1
= pin_layout(1, dir="o")
32 self
.assertLayoutEqual(layout_1
.fields
, {
33 "o": ((1, False), DIR_NONE
),
36 layout_2
= pin_layout(2, dir="o")
37 self
.assertLayoutEqual(layout_2
.fields
, {
38 "o": ((2, False), DIR_NONE
),
41 def test_pin_layout_oe(self
):
42 layout_1
= pin_layout(1, dir="oe")
43 self
.assertLayoutEqual(layout_1
.fields
, {
44 "o": ((1, False), DIR_NONE
),
45 "oe": ((1, False), DIR_NONE
),
48 layout_2
= pin_layout(2, dir="oe")
49 self
.assertLayoutEqual(layout_2
.fields
, {
50 "o": ((2, False), DIR_NONE
),
51 "oe": ((1, False), DIR_NONE
),
54 def test_pin_layout_io(self
):
55 layout_1
= pin_layout(1, dir="io")
56 self
.assertLayoutEqual(layout_1
.fields
, {
57 "i": ((1, False), DIR_NONE
),
58 "o": ((1, False), DIR_NONE
),
59 "oe": ((1, False), DIR_NONE
),
62 layout_2
= pin_layout(2, dir="io")
63 self
.assertLayoutEqual(layout_2
.fields
, {
64 "i": ((2, False), DIR_NONE
),
65 "o": ((2, False), DIR_NONE
),
66 "oe": ((1, False), DIR_NONE
),
70 class PinLayoutSDRTestCase(PinLayoutTestCase
):
71 def test_pin_layout_i(self
):
72 layout_1
= pin_layout(1, dir="i", xdr
=1)
73 self
.assertLayoutEqual(layout_1
.fields
, {
74 "i_clk": ((1, False), DIR_NONE
),
75 "i": ((1, False), DIR_NONE
),
78 layout_2
= pin_layout(2, dir="i", xdr
=1)
79 self
.assertLayoutEqual(layout_2
.fields
, {
80 "i_clk": ((1, False), DIR_NONE
),
81 "i": ((2, False), DIR_NONE
),
84 def test_pin_layout_o(self
):
85 layout_1
= pin_layout(1, dir="o", xdr
=1)
86 self
.assertLayoutEqual(layout_1
.fields
, {
87 "o_clk": ((1, False), DIR_NONE
),
88 "o": ((1, False), DIR_NONE
),
91 layout_2
= pin_layout(2, dir="o", xdr
=1)
92 self
.assertLayoutEqual(layout_2
.fields
, {
93 "o_clk": ((1, False), DIR_NONE
),
94 "o": ((2, False), DIR_NONE
),
97 def test_pin_layout_oe(self
):
98 layout_1
= pin_layout(1, dir="oe", xdr
=1)
99 self
.assertLayoutEqual(layout_1
.fields
, {
100 "o_clk": ((1, False), DIR_NONE
),
101 "o": ((1, False), DIR_NONE
),
102 "oe": ((1, False), DIR_NONE
),
105 layout_2
= pin_layout(2, dir="oe", xdr
=1)
106 self
.assertLayoutEqual(layout_2
.fields
, {
107 "o_clk": ((1, False), DIR_NONE
),
108 "o": ((2, False), DIR_NONE
),
109 "oe": ((1, False), DIR_NONE
),
112 def test_pin_layout_io(self
):
113 layout_1
= pin_layout(1, dir="io", xdr
=1)
114 self
.assertLayoutEqual(layout_1
.fields
, {
115 "i_clk": ((1, False), DIR_NONE
),
116 "i": ((1, False), DIR_NONE
),
117 "o_clk": ((1, False), DIR_NONE
),
118 "o": ((1, False), DIR_NONE
),
119 "oe": ((1, False), DIR_NONE
),
122 layout_2
= pin_layout(2, dir="io", xdr
=1)
123 self
.assertLayoutEqual(layout_2
.fields
, {
124 "i_clk": ((1, False), DIR_NONE
),
125 "i": ((2, False), DIR_NONE
),
126 "o_clk": ((1, False), DIR_NONE
),
127 "o": ((2, False), DIR_NONE
),
128 "oe": ((1, False), DIR_NONE
),
132 class PinLayoutDDRTestCase(PinLayoutTestCase
):
133 def test_pin_layout_i(self
):
134 layout_1
= pin_layout(1, dir="i", xdr
=2)
135 self
.assertLayoutEqual(layout_1
.fields
, {
136 "i_clk": ((1, False), DIR_NONE
),
137 "i0": ((1, False), DIR_NONE
),
138 "i1": ((1, False), DIR_NONE
),
141 layout_2
= pin_layout(2, dir="i", xdr
=2)
142 self
.assertLayoutEqual(layout_2
.fields
, {
143 "i_clk": ((1, False), DIR_NONE
),
144 "i0": ((2, False), DIR_NONE
),
145 "i1": ((2, False), DIR_NONE
),
148 def test_pin_layout_o(self
):
149 layout_1
= pin_layout(1, dir="o", xdr
=2)
150 self
.assertLayoutEqual(layout_1
.fields
, {
151 "o_clk": ((1, False), DIR_NONE
),
152 "o0": ((1, False), DIR_NONE
),
153 "o1": ((1, False), DIR_NONE
),
156 layout_2
= pin_layout(2, dir="o", xdr
=2)
157 self
.assertLayoutEqual(layout_2
.fields
, {
158 "o_clk": ((1, False), DIR_NONE
),
159 "o0": ((2, False), DIR_NONE
),
160 "o1": ((2, False), DIR_NONE
),
163 def test_pin_layout_oe(self
):
164 layout_1
= pin_layout(1, dir="oe", xdr
=2)
165 self
.assertLayoutEqual(layout_1
.fields
, {
166 "o_clk": ((1, False), DIR_NONE
),
167 "o0": ((1, False), DIR_NONE
),
168 "o1": ((1, False), DIR_NONE
),
169 "oe": ((1, False), DIR_NONE
),
172 layout_2
= pin_layout(2, dir="oe", xdr
=2)
173 self
.assertLayoutEqual(layout_2
.fields
, {
174 "o_clk": ((1, False), DIR_NONE
),
175 "o0": ((2, False), DIR_NONE
),
176 "o1": ((2, False), DIR_NONE
),
177 "oe": ((1, False), DIR_NONE
),
180 def test_pin_layout_io(self
):
181 layout_1
= pin_layout(1, dir="io", xdr
=2)
182 self
.assertLayoutEqual(layout_1
.fields
, {
183 "i_clk": ((1, False), DIR_NONE
),
184 "i0": ((1, False), DIR_NONE
),
185 "i1": ((1, False), DIR_NONE
),
186 "o_clk": ((1, False), DIR_NONE
),
187 "o0": ((1, False), DIR_NONE
),
188 "o1": ((1, False), DIR_NONE
),
189 "oe": ((1, False), DIR_NONE
),
192 layout_2
= pin_layout(2, dir="io", xdr
=2)
193 self
.assertLayoutEqual(layout_2
.fields
, {
194 "i_clk": ((1, False), DIR_NONE
),
195 "i0": ((2, False), DIR_NONE
),
196 "i1": ((2, False), DIR_NONE
),
197 "o_clk": ((1, False), DIR_NONE
),
198 "o0": ((2, False), DIR_NONE
),
199 "o1": ((2, False), DIR_NONE
),
200 "oe": ((1, False), DIR_NONE
),
204 class PinTestCase(FHDLTestCase
):
205 def test_attributes(self
):
206 pin
= Pin(2, dir="io", xdr
=2)
207 self
.assertEqual(pin
.width
, 2)
208 self
.assertEqual(pin
.dir, "io")
209 self
.assertEqual(pin
.xdr
, 2)