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Date: Tue, 26 May 2020 02:08:46 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: Libre-SOC's first SoC
X-Bugzilla-Component: Source Code
X-Bugzilla-Version: unspecified
X-Bugzilla-Keywords: 
X-Bugzilla-Severity: enhancement
X-Bugzilla-Who: colepoirier@gmail.com
X-Bugzilla-Status: CONFIRMED
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X-Bugzilla-Assigned-To: lkcl@lkcl.net
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Message-ID: <bug-351-13-Ven3BfcHt3@https.bugs.libre-soc.org/>
In-Reply-To: <bug-351-13@https.bugs.libre-soc.org/>
References: <bug-351-13@https.bugs.libre-soc.org/>
X-Bugzilla-URL: https://bugs.libre-soc.org/
Auto-Submitted: auto-generated
MIME-Version: 1.0
Subject: [libre-riscv-dev] [Bug 351] create a "block" (mass) regfile port
 (read and write) onto an array-based regfile
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