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From: Staf Verhaegen <staf@fibraservi.eu>
To: Libre RISC-V dev list <libre-riscv-dev@lists.libre-riscv.org>
Date: Tue, 20 Apr 2021 18:08:22 +0200
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Subject: [libre-riscv-dev] Some recent documenting of work performed for
 tape-out
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Goodday,

I recently added some documentation on work I performed for the tape-
out.

 * https://bugs.libre-soc.org/show_bug.cgi?id=3D204#c7Description on how Fr=
eePDK45 PDKMaster release can used for P&R of Libre-SOC prototype
 * https://bugs.libre-soc.org/show_bug.cgi?id=3D502#c32Spice simulation on =
SRAM block in Libre-SOC 0.18um prototype.

greets,
Staf.


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