projects
/
riscv-tests.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Test FPRs that aren't XLEN in size.
[riscv-tests.git]
/
debug
/
testlib.py
diff --git
a/debug/testlib.py
b/debug/testlib.py
index 39a6fc4b9e1c936acb7893b186d163bfc3e360b1..94ee83e79792e93de50af688068fd276a4974d3b 100644
(file)
--- a/
debug/testlib.py
+++ b/
debug/testlib.py
@@
-56,10
+56,12
@@
def compile(args, xlen=32): # pylint: disable=redefined-builtin
raise Exception("Compile failed!")
class Spike(object):
raise Exception("Compile failed!")
class Spike(object):
- def __init__(self, target, halted=False, timeout=None, with_jtag_gdb=True):
+ def __init__(self, target, halted=False, timeout=None, with_jtag_gdb=True,
+ isa=None):
"""Launch spike. Return tuple of its process and the port it's running
on."""
self.process = None
"""Launch spike. Return tuple of its process and the port it's running
on."""
self.process = None
+ self.isa = isa
if target.harts:
harts = target.harts
if target.harts:
harts = target.harts
@@
-109,10
+111,12
@@
class Spike(object):
assert len(set(t.xlen for t in harts)) == 1, \
"All spike harts must have the same XLEN"
assert len(set(t.xlen for t in harts)) == 1, \
"All spike harts must have the same XLEN"
- if
harts[0].xlen == 32
:
- cmd += ["--isa", "RV32G"]
+ if
self.isa
:
+ isa = self.isa
else:
else:
- cmd += ["--isa", "RV64G"]
+ isa = "RV%dG" % harts[0].xlen
+
+ cmd += ["--isa", isa]
assert len(set(t.ram for t in harts)) == 1, \
"All spike harts must have the same RAM layout"
assert len(set(t.ram for t in harts)) == 1, \
"All spike harts must have the same RAM layout"
@@
-800,7
+804,6
@@
class GdbTest(BaseTest):
self.logs += self.gdb.lognames()
self.gdb.connect()
self.logs += self.gdb.lognames()
self.gdb.connect()
- self.gdb.global_command("set arch riscv:rv%d" % self.hart.xlen)
self.gdb.global_command("set remotetimeout %d" %
self.target.timeout_sec)
self.gdb.global_command("set remotetimeout %d" %
self.target.timeout_sec)