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Allow the formal engine to perform a same-cycle result in the ALU
[soc.git]
/
flake.nix
diff --git
a/flake.nix
b/flake.nix
index 54ddb1a8ed74628b2e9cd439a337fb48f69173cd..90a976cb28525ebd39463b2089e9793e24da2144 100644
(file)
--- a/
flake.nix
+++ b/
flake.nix
@@
-1,5
+1,3
@@
-# The license for this file is included in the `nix` directory next to this file.
-
{
description = "FOSS CPU/GPU/VPU/SoC all in one, see https://libre-soc.org/";
{
description = "FOSS CPU/GPU/VPU/SoC all in one, see https://libre-soc.org/";
@@
-12,10
+10,13
@@
inputs.nmigen-soc.flake = false;
inputs.migen.url = "github:m-labs/migen";
inputs.migen.flake = false;
inputs.nmigen-soc.flake = false;
inputs.migen.url = "github:m-labs/migen";
inputs.migen.flake = false;
+ inputs.yosys.url = "github:YosysHQ/yosys?rev=a58571d0fe8971cb7d3a619a31b2c21be6d75bac";
+ inputs.yosys.flake = false;
+ # submodules needed
inputs.nix-litex.url = "git+https://git.sr.ht/~lschuermann/nix-litex?ref=main";
inputs.nix-litex.flake = false;
inputs.nix-litex.url = "git+https://git.sr.ht/~lschuermann/nix-litex?ref=main";
inputs.nix-litex.flake = false;
- outputs = { self, nixpkgs, c4m-jtag, nmigen, nmigen-soc, nix-litex, migen }:
+ outputs = { self, nixpkgs, c4m-jtag, nmigen, nmigen-soc, nix-litex, migen
, yosys
}:
let
getv = x: builtins.substring 0 8 x.lastModifiedDate;
let
getv = x: builtins.substring 0 8 x.lastModifiedDate;
@@
-35,8
+36,8
@@
in
{
overlay = final: prev: {
in
{
overlay = final: prev: {
- python37
Packages = prev.python37Packages
.override {
-
o
verrides = lib.composeExtensions (litex final).pythonOverlay (pfinal: pprev: {
+ python37
= prev.python37
.override {
+
packageO
verrides = lib.composeExtensions (litex final).pythonOverlay (pfinal: pprev: {
libresoc-ieee754fpu = pfinal.callPackage ./nix/ieee754fpu.nix {};
libresoc-openpower-isa = pfinal.callPackage ./nix/openpower-isa.nix {};
c4m-jtag = pfinal.callPackage (import ./nix/c4m-jtag.nix { src = c4m-jtag; version = getv c4m-jtag; }) {};
libresoc-ieee754fpu = pfinal.callPackage ./nix/ieee754fpu.nix {};
libresoc-openpower-isa = pfinal.callPackage ./nix/openpower-isa.nix {};
c4m-jtag = pfinal.callPackage (import ./nix/c4m-jtag.nix { src = c4m-jtag; version = getv c4m-jtag; }) {};
@@
-61,22
+62,37
@@
});
};
});
};
- libresoc-pre-litex = final.callPackage (import ./nix/pre-litex.nix { version = getv self; }) { python3Packages = final.python37Packages; };
+ yosys = prev.yosys.overrideAttrs (_: {
+ version = "0.9+4052";
+ src = yosys;
+ });
+
+ libresoc-verilog = final.callPackage (import ./nix/verilog.nix { version = getv self; }) { python3Packages = final.python37Packages; };
libresoc-ls180 = final.callPackage (import ./nix/ls180.nix { version = getv self; }) { python3Packages = final.python37Packages; };
libresoc-ecp5 = final.callPackage (import ./nix/ecp5.nix { version = getv self; }) { python3Packages = final.python37Packages; };
libresoc-ls180 = final.callPackage (import ./nix/ls180.nix { version = getv self; }) { python3Packages = final.python37Packages; };
libresoc-ecp5 = final.callPackage (import ./nix/ecp5.nix { version = getv self; }) { python3Packages = final.python37Packages; };
+ libresoc-ecp5-program = final.callPackage (import ./nix/ecp5-program.nix { version = getv self; }) { python3Packages = final.python37Packages; };
libresoc-pinmux = final.callPackage (import ./nix/pinmux.nix { version = getv self; }) {};
};
libresoc-pinmux = final.callPackage (import ./nix/pinmux.nix { version = getv self; }) {};
};
+ apps = forAllSystems (system: {
+ ecp5 = {
+ type = "app";
+ program = "${nixpkgsFor.${system}.libresoc-ecp5-program}";
+ };
+ });
+ defaultApp = forAllSystems (system: self.apps.${system}.ecp5);
+
packages = forAllSystems (system: {
soc = nixpkgsFor.${system}.python37Packages.libresoc-soc;
packages = forAllSystems (system: {
soc = nixpkgsFor.${system}.python37Packages.libresoc-soc;
-
pre-litex = nixpkgsFor.${system}.libresoc-pre-litex
;
+
verilog = nixpkgsFor.${system}.libresoc-verilog
;
pinmux = nixpkgsFor.${system}.libresoc-pinmux;
ls180 = nixpkgsFor.${system}.libresoc-ls180;
ecp5 = nixpkgsFor.${system}.libresoc-ecp5;
pinmux = nixpkgsFor.${system}.libresoc-pinmux;
ls180 = nixpkgsFor.${system}.libresoc-ls180;
ecp5 = nixpkgsFor.${system}.libresoc-ecp5;
+ ecp5-program = nixpkgsFor.${system}.libresoc-ecp5-program;
openpower-isa = nixpkgsFor.${system}.python37Packages.libresoc-openpower-isa;
debugNixpkgs = nixpkgsFor.${system};
});
openpower-isa = nixpkgsFor.${system}.python37Packages.libresoc-openpower-isa;
debugNixpkgs = nixpkgsFor.${system};
});
- defaultPackage = forAllSystems (system: self.packages.${system}.
pre-litex
);
+ defaultPackage = forAllSystems (system: self.packages.${system}.
verilog
);
};
}
};
}