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[ieee754fpu.git]
/
src
/
add
/
test_dual.py
diff --git
a/src/add/test_dual.py
b/src/add/test_dual.py
index 7d412c86477fa54bd857d0ced91b19b5e5783e8b..15f5c762df9a2e78ede74c8725c3806a022cc2ef 100644
(file)
--- a/
src/add/test_dual.py
+++ b/
src/add/test_dual.py
@@
-11,6
+11,8
@@
def get_case(dut, a, b, c):
a_ack = (yield dut.a.ack)
assert a_ack == 0
a_ack = (yield dut.a.ack)
assert a_ack == 0
+ yield dut.a.stb.eq(0)
+
yield dut.b.v.eq(b)
yield dut.b.stb.eq(1)
yield
yield dut.b.v.eq(b)
yield dut.b.stb.eq(1)
yield
@@
-18,12
+20,7
@@
def get_case(dut, a, b, c):
b_ack = (yield dut.b.ack)
assert b_ack == 0
b_ack = (yield dut.b.ack)
assert b_ack == 0
- while True:
- out_z_stb = (yield dut.int_stb)
- if not out_z_stb:
- yield
- continue
- break
+ yield dut.b.stb.eq(0)
yield dut.c.v.eq(c)
yield dut.c.stb.eq(1)
yield dut.c.v.eq(c)
yield dut.c.stb.eq(1)
@@
-32,6
+29,10
@@
def get_case(dut, a, b, c):
c_ack = (yield dut.c.ack)
assert c_ack == 0
c_ack = (yield dut.c.ack)
assert c_ack == 0
+ yield dut.c.stb.eq(0)
+
+ yield dut.z.ack.eq(1)
+
while True:
out_z_stb = (yield dut.z.stb)
if not out_z_stb:
while True:
out_z_stb = (yield dut.z.stb)
if not out_z_stb:
@@
-41,12
+42,6
@@
def get_case(dut, a, b, c):
out_z = yield dut.z.v
yield dut.z.ack.eq(0)
out_z = yield dut.z.v
yield dut.z.ack.eq(0)
- yield dut.a.stb.eq(0)
- yield dut.b.stb.eq(0)
- yield dut.c.stb.eq(0)
- yield
- yield dut.z.ack.eq(1)
- yield
break
return out_z
break
return out_z