-class sdmmc(PBase):
-
- def slowimport(self):
- return " import sdcard_dummy :: *;"
-
- def slowifdecl(self):
- return " interface QSPI_out sd{0}_out;\n" + \
- " method Bit#(1) sd{0}_isint;"
-
- def num_axi_regs32(self):
- return 13
-
- def mkslow_peripheral(self):
- return " Ifc_sdcard_dummy sd{0} <- mksdcard_dummy();"
-
- def _mk_connection(self, name=None, count=0):
- return "sd{0}.slave"
-
- def pinname_in(self, pname):
- return "%s_in" % pname
-
- def pinname_out(self, pname):
- if pname.startswith('d'):
- return "%s_out" % pname
- return pname
-
- def pinname_outen(self, pname):
- if pname.startswith('d'):
- return "%s_outen" % pname
-
-
-class spi(PBase):
-
- def slowimport(self):
- return " import qspi :: *;"
-
- def slowifdecl(self):
- return " interface QSPI_out spi{0}_out;\n" + \
- " method Bit#(1) spi{0}_isint;"
-
- def num_axi_regs32(self):
- return 13
-
- def mkslow_peripheral(self):
- return " Ifc_qspi spi{0} <- mkqspi();"
-
- def _mk_connection(self, name=None, count=0):
- return "spi{0}.slave"
-
- def pinname_out(self, pname):
- return {'clk': 'out.clk_o',
- 'nss': 'out.ncs_o',
- 'mosi': 'out.io_o[0]',
- 'miso': 'out.io_o[1]',
- }.get(pname, '')
-
- def pinname_outen(self, pname):
- return {'clk': 1,
- 'nss': 1,
- 'mosi': 'out.io_enable[0]',
- 'miso': 'out.io_enable[1]',
- }.get(pname, '')
-
- def mk_pincon(self, name, count):
- ret = [PBase.mk_pincon(self, name, count)]
- # special-case for gpio in, store in a temporary vector
- plen = len(self.peripheral.pinspecs)
- ret.append(" // XXX NSS and CLK are hard-coded master")
- ret.append(" // TODO: must add spi slave-mode")
- ret.append(" // all ins done in one rule from 4-bitfield")
- ret.append(" rule con_%s%d_io_in;" % (name, count))
- ret.append(" {0}{1}.out.io_i({{".format(name, count))
- for idx, pname in enumerate(['mosi', 'miso']):
- sname = self.peripheral.pname(pname).format(count)
- ps = "pinmux.peripheral_side.%s_in" % sname
- ret.append(" {0},".format(ps))
- ret.append(" 1'b0,1'b0")
- ret.append(" });")
- ret.append(" endrule")
- return '\n'.join(ret)
-
- def mk_ext_ifacedef(self, iname, inum):
- name = self.get_iname(inum)
- return " method {0}_isint = {0}.interrupts[5];".format(name)
-
- def slowifdeclmux(self):
- return " method Bit#(1) {1}{0}_isint;"
-
-
-class qspi(PBase):
-
- def slowimport(self):
- return " import qspi :: *;"
-
- def slowifdecl(self):
- return " interface QSPI_out qspi{0}_out;\n" + \
- " method Bit#(1) qspi{0}_isint;"
-
- def num_axi_regs32(self):
- return 13
-
- def mkslow_peripheral(self, size=0):
- return " Ifc_qspi qspi{0} <- mkqspi();"
-
- def _mk_connection(self, name=None, count=0):
- return "qspi{0}.slave"
-
- def pinname_out(self, pname):
- return {'ck': 'out.clk_o',
- 'nss': 'out.ncs_o',
- 'io0': 'out.io_o[0]',
- 'io1': 'out.io_o[1]',
- 'io2': 'out.io_o[2]',
- 'io3': 'out.io_o[3]',
- }.get(pname, '')
-
- def pinname_outen(self, pname):
- return {'ck': 1,
- 'nss': 1,
- 'io0': 'out.io_enable[0]',
- 'io1': 'out.io_enable[1]',
- 'io2': 'out.io_enable[2]',
- 'io3': 'out.io_enable[3]',
- }.get(pname, '')
-
- def mk_pincon(self, name, count):
- ret = [PBase.mk_pincon(self, name, count)]
- # special-case for gpio in, store in a temporary vector
- plen = len(self.peripheral.pinspecs)
- ret.append(" // XXX NSS and CLK are hard-coded master")
- ret.append(" // TODO: must add qspi slave-mode")
- ret.append(" // all ins done in one rule from 4-bitfield")
- ret.append(" rule con_%s%d_io_in;" % (name, count))
- ret.append(" {0}{1}.out.io_i({{".format(name, count))
- for i, p in enumerate(self.peripheral.pinspecs):
- typ = p['type']
- pname = p['name']
- if not pname.startswith('io'):
- continue
- idx = pname[1:]
- n = name
- sname = self.peripheral.pname(pname).format(count)
- ps = "pinmux.peripheral_side.%s_in" % sname
- comma = '' if i == 5 else ','
- ret.append(" {0}{1}".format(ps, comma))
- ret.append(" });")
- ret.append(" endrule")
- return '\n'.join(ret)
-
- def num_irqs(self):
- return 6
-
- def plic_object(self, pname, idx):
- return "{0}.interrupts()[{1}]".format(pname, idx)
-
- def mk_ext_ifacedef(self, iname, inum):
- name = self.get_iname(inum)
- return " method {0}_isint = {0}.interrupts[5];".format(name)
-
- def slowifdeclmux(self):
- return " method Bit#(1) {1}{0}_isint;"
-
-
-
-class pwm(PBase):
-
- def slowimport(self):
- return " import pwm::*;"
-
- def slowifdecl(self):
- return " interface PWMIO pwm{0}_io;"
-
- def num_axi_regs32(self):
- return 4
-
- def mkslow_peripheral(self, size=0):
- return " Ifc_PWM_bus pwm{0} <- mkPWM_bus(sp_clock);"
-
- def _mk_connection(self, name=None, count=0):
- return "pwm{0}.axi4_slave"
-
- def pinname_out(self, pname):
- return {'out': 'pwm_io.pwm_o'}.get(pname, '')
-
-
-class gpio(PBase):
-
- def slowimport(self):
- return " import pinmux::*;\n" + \
- " import mux::*;\n" + \
- " import gpio::*;\n"
-
- def slowifdeclmux(self):
- size = len(self.peripheral.pinspecs)
- return " interface GPIO_config#(%d) pad_config{0};" % size
-
- def num_axi_regs32(self):
- return 2
-
- def axi_slave_idx(self, idx, name, ifacenum):
- """ generates AXI slave number definition, except
- GPIO also has a muxer per bank
- """
- name = name.upper()
- mname = 'mux' + name[4:]
- mname = mname.upper()
- print "AXIslavenum", name, mname
- (ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
- (ret2, x) = PBase.axi_slave_idx(self, idx + 1, mname, ifacenum)
- return ("%s\n%s" % (ret, ret2), 2)
-
- def mkslow_peripheral(self, size=0):
- print "gpioslow", self.peripheral, dir(self.peripheral)
- size = len(self.peripheral.pinspecs)
- return " MUX#(%d) mux{0} <- mkmux();\n" % size + \
- " GPIO#(%d) gpio{0} <- mkgpio();" % size
-
- def mk_connection(self, count):
- print "GPIO mk_conn", self.name, count
- res = []
- dname = self.mksuffix(self.name, count)
- for i, n in enumerate(['gpio' + dname, 'mux' + dname]):
- res.append(PBase.mk_connection(self, count, n))
- return '\n'.join(res)
-
- def _mk_connection(self, name=None, count=0):
- n = self.mksuffix(name, count)
- if name.startswith('gpio'):
- return "gpio{0}.axi_slave".format(n)
- if name.startswith('mux'):
- return "mux{0}.axi_slave".format(n)
-
- def mksuffix(self, name, i):
- if name.startswith('mux'):
- return name[3:]
- return name[4:]
-
- def mk_cellconn(self, cellnum, name, count):
- ret = []
- bank = self.mksuffix(name, count)
- txt = " pinmux.mux_lines.cell{0}_mux(mux{1}.mux_config.mux[{2}]);"
- for p in self.peripheral.pinspecs:
- ret.append(txt.format(cellnum, bank, p['name'][1:]))
- cellnum += 1
- return ("\n".join(ret), cellnum)
-
- def pinname_out(self, pname):
- return "func.gpio_out[{0}]".format(pname[1:])
-
- def pinname_outen(self, pname):
- return "func.gpio_out_en[{0}]".format(pname[1:])
-
- def mk_pincon(self, name, count):
- ret = [PBase.mk_pincon(self, name, count)]
- # special-case for gpio in, store in a temporary vector
- plen = len(self.peripheral.pinspecs)
- ret.append(" rule con_%s%d_in;" % (name, count))
- ret.append(" Vector#({0},Bit#(1)) temp;".format(plen))
- for p in self.peripheral.pinspecs:
- typ = p['type']
- pname = p['name']
- idx = pname[1:]
- n = name
- sname = self.peripheral.pname(pname).format(count)
- ps = "pinmux.peripheral_side.%s_in" % sname
- ret.append(" temp[{0}]={1};".format(idx, ps))
- ret.append(" {0}.func.gpio_in(temp);".format(name))
- ret.append(" endrule")
- return '\n'.join(ret)