- (dq zip spi.dq).foreach {case (p, s) =>
- p.outputPin(s.o, pue = Bool(true), ds = driveStrength)
- p.o.oe := s.oe
- p.o.ie := ~s.oe
- s.i := ShiftRegister(p.i.ival, syncStages)
- }
+ withClockAndReset(clock, reset) {
+ sck.outputPin(spi.sck, ds = driveStrength)
+
+ (dq zip spi.dq).foreach {case (p, s) =>
+ p.outputPin(s.o, pue = Bool(true), ds = driveStrength)
+ p.o.oe := s.oe
+ p.o.ie := ~s.oe
+ s.i := ShiftRegister(p.i.ival, syncStages)
+ }