-
-class UARTPins(pingen: () => Pin) extends Bundle {
- val rxd = pingen()
- val txd = pingen()
-
- def fromUARTPort(uart: UARTPortIO, syncStages: Int = 0) {
- txd.outputPin(uart.txd)
- val rxd_t = rxd.inputPin()
- uart.rxd := ShiftRegisterInit(rxd_t, syncStages, Bool(true))
- }
-}
-