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uart: make it easy to simulate large text printouts (#33)
[sifive-blocks.git]
/
src
/
main
/
scala
/
devices
/
xilinxvc707mig
/
XilinxVC707MIG.scala
diff --git
a/src/main/scala/devices/xilinxvc707mig/XilinxVC707MIG.scala
b/src/main/scala/devices/xilinxvc707mig/XilinxVC707MIG.scala
index 3bb528970287ba0dadbfe8af3da8d1c615ac78e7..afaff337e3d67a340ae1b245e5f948ebd12f65a2 100644
(file)
--- a/
src/main/scala/devices/xilinxvc707mig/XilinxVC707MIG.scala
+++ b/
src/main/scala/devices/xilinxvc707mig/XilinxVC707MIG.scala
@@
-3,11
+3,11
@@
package sifive.blocks.devices.xilinxvc707mig
import Chisel._
import chisel3.experimental.{Analog,attach}
import Chisel._
import chisel3.experimental.{Analog,attach}
-import
config
._
-import
diplomacy._
-import
uncore.tilelink2
._
-import
uncore.axi4
._
-import
rocketchip
._
+import
freechips.rocketchip.amba.axi4
._
+import
freechips.rocketchip.config.Parameters
+import
freechips.rocketchip.coreplex
._
+import
freechips.rocketchip.diplomacy
._
+import
freechips.rocketchip.tilelink
._
import sifive.blocks.ip.xilinx.vc707mig.{VC707MIGIOClocksReset, VC707MIGIODDR, vc707mig}
trait HasXilinxVC707MIGParameters {
import sifive.blocks.ip.xilinx.vc707mig.{VC707MIGIOClocksReset, VC707MIGIODDR, vc707mig}
trait HasXilinxVC707MIGParameters {
@@
-34,7
+34,7
@@
class XilinxVC707MIG(implicit p: Parameters) extends LazyModule with HasXilinxVC
val xing = LazyModule(new TLAsyncCrossing)
val toaxi4 = LazyModule(new TLToAXI4(beatBytes = 8, adapterName = Some("mem"), stripBits = 1))
val indexer = LazyModule(new AXI4IdIndexer(idBits = 4))
val xing = LazyModule(new TLAsyncCrossing)
val toaxi4 = LazyModule(new TLToAXI4(beatBytes = 8, adapterName = Some("mem"), stripBits = 1))
val indexer = LazyModule(new AXI4IdIndexer(idBits = 4))
- val deint = LazyModule(new AXI4Deinterleaver(p(
coreplex.
CacheBlockBytes)))
+ val deint = LazyModule(new AXI4Deinterleaver(p(CacheBlockBytes)))
val yank = LazyModule(new AXI4UserYanker)
val buffer = LazyModule(new AXI4Buffer)
val yank = LazyModule(new AXI4UserYanker)
val buffer = LazyModule(new AXI4Buffer)