-import config._
-import diplomacy._
-import uncore.tilelink2._
-import uncore.axi4._
-import rocketchip._
-import sifive.blocks.ip.xilinx.vc707mig.{VC707MIGUnidirectionalIOClocksReset, VC707MIGUnidirectionalIODDR, vc707mig}
+import chisel3.experimental.{Analog,attach}
+import freechips.rocketchip.amba.axi4._
+import freechips.rocketchip.config.Parameters
+import freechips.rocketchip.coreplex._
+import freechips.rocketchip.diplomacy._
+import freechips.rocketchip.tilelink._
+import sifive.blocks.ip.xilinx.vc707mig.{VC707MIGIOClocksReset, VC707MIGIODDR, vc707mig}