# arty a7 build
export PATH=$PATH:/usr/local/symbiflow/bin/:/usr/local/symbiflow/vtr/bin/
-./versa_ecp5.py --sys-clk-freq=100e6 --build --fpga=artya7100t \
+./versa_ecp5.py --sys-clk-freq=25e6 --build --fpga=artya7100t \
+ --toolchain=symbiflow
+./versa_ecp5.py --sys-clk-freq=25e6 --load --fpga=artya7100t \
--toolchain=symbiflow