Rework benchmarks to run in M-mode

[riscv-tests.git] / benchmarks / mm / mm_main.c

diff --git a/benchmarks/mm/mm_main.c b/benchmarks/mm/mm_main.c
index 8b6a0933f096eb8202efe48586c077726da38fb7..4d08b152350e33fc2a5419375a825cacce2d8acb 100644 (file)
--- a/benchmarks/mm/mm_main.c
+++ b/benchmarks/mm/mm_main.c
@@ -31,11 +31,11 @@ void thread_entry(int cid, int nc)
   size_t instret, cycles;
   for (int i = 0; i < R; i++)
   {
-    instret = -rdinstret();
-    cycles = -rdcycle();
+    instret = -read_csr(minstret);
+    cycles = -read_csr(mcycle);
     mm(m, n, p, a, p, b, n, c, n);
-    instret += rdinstret();
-    cycles += rdcycle();
+    instret += read_csr(minstret);
+    cycles += read_csr(mcycle);
   }
 
   asm volatile("fence");