add test boundary scan hard-coded test

[soc-cocotb-sim.git] / ls180 / post_pnr / cocotb / Makefile

diff --git a/ls180/post_pnr/cocotb/Makefile b/ls180/post_pnr/cocotb/Makefile
index ea51d19905832589d7f8891e59b41673d3dddc1b..a53c81bd318903f679b4d2a3788956ae84bb6e73 100644 (file)
--- a/ls180/post_pnr/cocotb/Makefile
+++ b/ls180/post_pnr/cocotb/Makefile
@@ -20,7 +20,7 @@ VHDL_SOURCES = \
   $(wildcard $(NIOLIBDIR)/*.vhd)
 TOPLEVEL=chip_r
 TOPLEVEL_LANG=vhdl
-MODULE=test
+MODULE ?= test
 SIM=ghdl
 GPI_IMPL=vhpi
 GHDL_ARGS=--std=08