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get pre-coriolis2 verilator (wishbone) functional
[soc-cocotb-sim.git] / ls180 / pre_pnr / run_iverilog_wb_ls180.sh
diff --git a/ls180/pre_pnr/run_iverilog_wb_ls180.sh b/ls180/pre_pnr/run_iverilog_wb_ls180.sh
index 6b4bd266ef836539aedf7c3edfaa2e3b1f4d01ab..db24552ae4f6bc43dba4ee2c69f18096d26b774b 100755 (executable)
--- a/ls180/pre_pnr/run_iverilog_wb_ls180.sh
+++ b/ls180/pre_pnr/run_iverilog_wb_ls180.sh
@@ -10,7 +10,7 @@ make \
   SIM=icarus \
   TOPLEVEL=ls180 \
   COCOTB_RESULTS_FILE=results_iverilog_ls180_wb.xml \
-  COCOTB_HDL_TIMEUNIT=10ps \
+  COCOTB_HDL_TIMEUNIT=100ps \
   TESTCASE="wishbone_basic" \
   MODULE="testwb" \
   SIM_BUILD=sim_build_iverilog_wb_ls180