projects / nmigen-boards.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | inline | side by side
blackice_ii: fix UART RTS/CTS direction.
[nmigen-boards.git] / nmigen_boards / blackice_ii.py
diff --git a/nmigen_boards/blackice_ii.py b/nmigen_boards/blackice_ii.py
index a679bda966500d8dc9655d963281b0ff10713aca..2187d60686bb9e06edd53986e41e586d95c182dd 100644 (file)
--- a/nmigen_boards/blackice_ii.py
+++ b/nmigen_boards/blackice_ii.py
@@ -30,7 +30,8 @@ class BlackIceIIPlatform(LatticeICE40Platform):
 
         UARTResource(0,
             rx="88", tx="85", rts="91", cts="94",
-            attrs=Attrs(IO_STANDARD="SB_LVCMOS", PULLUP=1)
+            attrs=Attrs(IO_STANDARD="SB_LVCMOS", PULLUP=1),
+            role="dce"
         ),
 
         SRAMResource(0,