#include "debug_defines.h"
#include "opcodes.h"
#include "mmu.h"
+#include "sim.h"
#include "debug_rom/debug_rom.h"
#include "debug_rom_defines.h"
require_authentication(require_authentication),
debug_progbuf_start(debug_data_start - program_buffer_bytes),
debug_abstract_start(debug_progbuf_start - debug_abstract_size*4),
+ custom_base(0),
sim(sim)
{
D(fprintf(stderr, "debug_data_start=0x%x\n", debug_data_start));
memset(halted, 0, sizeof(halted));
memset(debug_rom_flags, 0, sizeof(debug_rom_flags));
memset(resumeack, 0, sizeof(resumeack));
+ memset(havereset, 0, sizeof(havereset));
memset(program_buffer, 0, program_buffer_bytes);
program_buffer[4*progbufsize] = ebreak();
program_buffer[4*progbufsize+1] = ebreak() >> 8;
} else if (sbcs.sbaccess == 2 && max_bus_master_bits >= 32) {
sbdata[0] = sim->debug_mmu->load_uint32(address);
} else if (sbcs.sbaccess == 3 && max_bus_master_bits >= 64) {
- uint64_t value = sim->debug_mmu->load_uint32(address);
+ uint64_t value = sim->debug_mmu->load_uint64(address);
sbdata[0] = value;
sbdata[1] = value >> 32;
} else {
result = set_field(result, DMI_DMCONTROL_HALTREQ, dmcontrol.haltreq);
result = set_field(result, DMI_DMCONTROL_RESUMEREQ, dmcontrol.resumereq);
- result = set_field(result, ((1L<<hartsellen)-1) <<
- DMI_DMCONTROL_HARTSEL_OFFSET, dmcontrol.hartsel);
+ result = set_field(result, DMI_DMCONTROL_HARTSELHI,
+ dmcontrol.hartsel >> DMI_DMCONTROL_HARTSELLO_LENGTH);
+ result = set_field(result, DMI_DMCONTROL_HARTSELLO, dmcontrol.hartsel);
result = set_field(result, DMI_DMCONTROL_HARTRESET, dmcontrol.hartreset);
result = set_field(result, DMI_DMCONTROL_NDMRESET, dmcontrol.ndmreset);
result = set_field(result, DMI_DMCONTROL_DMACTIVE, dmcontrol.dmactive);
result = set_field(result, DMI_DMSTATUS_IMPEBREAK,
dmstatus.impebreak);
+ result = set_field(result, DMI_DMSTATUS_ALLHAVERESET,
+ havereset[dmcontrol.hartsel]);
+ result = set_field(result, DMI_DMSTATUS_ANYHAVERESET,
+ havereset[dmcontrol.hartsel]);
result = set_field(result, DMI_DMSTATUS_ALLNONEXISTENT, dmstatus.allnonexistant);
result = set_field(result, DMI_DMSTATUS_ALLUNAVAIL, dmstatus.allunavail);
result = set_field(result, DMI_DMSTATUS_ALLRUNNING, dmstatus.allrunning);
}
}
+ } else if (regno >= 0xc000 && (regno & 1) == 1) {
+ // Support odd-numbered custom registers, to allow for debugger testing.
+ unsigned custom_number = regno - 0xc000;
+ abstractcs.cmderr = CMDERR_NONE;
+ if (write) {
+ // Writing V to custom register N will cause future reads of N to
+ // return V, reads of N-1 will return V-1, etc.
+ custom_base = read32(dmdata, 0) - custom_number;
+ } else {
+ write32(dmdata, 0, custom_number + custom_base);
+ write32(dmdata, 1, 0);
+ }
+ return true;
+
} else {
abstractcs.cmderr = CMDERR_NOTSUP;
return true;
dmcontrol.resumereq = get_field(value, DMI_DMCONTROL_RESUMEREQ);
dmcontrol.hartreset = get_field(value, DMI_DMCONTROL_HARTRESET);
dmcontrol.ndmreset = get_field(value, DMI_DMCONTROL_NDMRESET);
- dmcontrol.hartsel = get_field(value, ((1L<<hartsellen)-1) <<
- DMI_DMCONTROL_HARTSEL_OFFSET);
+ dmcontrol.hartsel = get_field(value, DMI_DMCONTROL_HARTSELHI) <<
+ DMI_DMCONTROL_HARTSELLO_LENGTH;
+ dmcontrol.hartsel |= get_field(value, DMI_DMCONTROL_HARTSELLO);
+ dmcontrol.hartsel &= (1L<<hartsellen) - 1;
+ if (get_field(value, DMI_DMCONTROL_ACKHAVERESET)) {
+ havereset[dmcontrol.hartsel] = false;
+ }
}
processor_t *proc = current_proc();
if (proc) {
}
return false;
}
+
+void debug_module_t::proc_reset(unsigned id)
+{
+ havereset[id] = true;
+ halted[id] = false;
+}