Have Debug memory kind of working again.

[riscv-isa-sim.git] / riscv / devices.cc

diff --git a/riscv/devices.cc b/riscv/devices.cc
index e6f5d7d0912b1672d8fda9f9adfec8710a856105..4e88a1df4328e02d9be83263304c6c6224071f83 100644 (file)
--- a/riscv/devices.cc
+++ b/riscv/devices.cc
@@ -7,9 +7,12 @@ void bus_t::add_device(reg_t addr, abstract_device_t* dev)
 
 bool bus_t::load(reg_t addr, size_t len, uint8_t* bytes)
 {
+  fprintf(stderr, "bus load(0x%lx, %ld)\n", addr, len);
   auto it = devices.lower_bound(-addr);
-  if (it == devices.end())
+  if (it == devices.end()) {
+      fprintf(stderr, "  -> false\n");
     return false;
+  }
   return it->second->load(addr - -it->first, len, bytes);
 }
 
@@ -20,11 +23,3 @@ bool bus_t::store(reg_t addr, size_t len, const uint8_t* bytes)
     return false;
   return it->second->store(addr - -it->first, len, bytes);
 }
-
-char* bus_t::page(reg_t paddr)
-{
-  auto it = devices.lower_bound(-paddr);
-  if (it == devices.end())
-    return NULL;
-  return it->second->page(paddr);
-}