Instructions are no longer member functions
[riscv-isa-sim.git] / riscv / insns / amoadd_d.h
index b8450bfd5038a76e7f1c762ebfa8b7f9bd08d1d5..bba975ce1fbccaf7357f02b71244bc8512dcc91a 100644 (file)
@@ -1,4 +1,4 @@
 require_xpr64;
-reg_t v = mmu.load_uint64(RS1);
-mmu.store_uint64(RS1, RS2 + v);
+reg_t v = MMU.load_uint64(RS1);
+MMU.store_uint64(RS1, RS2 + v);
 RD = v;