Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / amoor_w.h

diff --git a/riscv/insns/amoor_w.h b/riscv/insns/amoor_w.h
index 741fbefd9629f94a95d8fb04b87b873acc142173..0733fad203d4b9382f8fad58b759dbd418796fa9 100644 (file)
--- a/riscv/insns/amoor_w.h
+++ b/riscv/insns/amoor_w.h
@@ -1,3 +1,3 @@
-reg_t v = mmu.load_int32(RS1);
-mmu.store_uint32(RS1, RS2 | v);
+reg_t v = MMU.load_int32(RS1);
+MMU.store_uint32(RS1, RS2 | v);
 RD = v;