Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / amoswap_d.h

diff --git a/riscv/insns/amoswap_d.h b/riscv/insns/amoswap_d.h
index 43e353868f648976e0ba7afc849913ee6b3b4d7a..3423b91de2dab5464aad40dc6c0dbc6b17df7253 100644 (file)
--- a/riscv/insns/amoswap_d.h
+++ b/riscv/insns/amoswap_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
-reg_t v = mmu.load_uint64(RS1);
-mmu.store_uint64(RS1, RS2);
+reg_t v = MMU.load_uint64(RS1);
+MMU.store_uint64(RS1, RS2);
 RD = v;