[xcc, sim] changed instruction format so imm12 subs for rs2
[riscv-isa-sim.git] / riscv / insns / blt.h
index 8d95127c8cec52fa00004e90e09cf64970d0b1fa..3ffd20e780cbe51317abdf432f22aae95c19fcca 100644 (file)
@@ -1,2 +1,2 @@
-if(sreg_t(cmp_trunc(RA)) < sreg_t(cmp_trunc(RB)))
+if(sreg_t(cmp_trunc(RS1)) < sreg_t(cmp_trunc(RS2)))
   npc = BRANCH_TARGET;