[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / c_eq_d.h

diff --git a/riscv/insns/c_eq_d.h b/riscv/insns/c_eq_d.h
index 4387ea3a84c73f1732d1e989d6ea0492621aa59e..cc7b77a92c042a8d08422d813c55bdb6029f34f6 100644 (file)
--- a/riscv/insns/c_eq_d.h
+++ b/riscv/insns/c_eq_d.h
@@ -1,3 +1,3 @@
 require_fp;
-RC = float64_eq(FRA, FRB);
+RC = f64_eq(FRA, FRB);
 set_fp_exceptions;