[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b
[riscv-isa-sim.git] / riscv / insns / c_lt_d.h
index 3d42500aa0ab60e55ff89f12413a149dccfa3447..3f3756d674569579c0366d5bd02939f1851c6768 100644 (file)
@@ -1,3 +1,3 @@
 require_fp;
-RC = float64_lt(FRA, FRB);
+RC = f64_lt(FRA, FRB);
 set_fp_exceptions;