[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b
[riscv-isa-sim.git] / riscv / insns / cvt_d_l.h
index 5246f6f7001d89c63c38991ac64fb465a99b6009..808d20cc81a4b09d2a43b045888584c010865603 100644 (file)
@@ -1,3 +1,3 @@
 require_fp;
-FRC = int64_to_float64(FRA);
+FRC = i64_to_f64(FRA);
 set_fp_exceptions;