[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / cvt_s_l.h

diff --git a/riscv/insns/cvt_s_l.h b/riscv/insns/cvt_s_l.h
index 2d1f93a61f22c13481324b0bbfd4056820700e09..66e45664b950100121de02e45dc731b3d7b9f544 100644 (file)
--- a/riscv/insns/cvt_s_l.h
+++ b/riscv/insns/cvt_s_l.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = int64_to_float32(FRA);
+FRC = i64_to_f32(FRA);
 set_fp_exceptions;