[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / cvtu_s_w.h

diff --git a/riscv/insns/cvtu_s_w.h b/riscv/insns/cvtu_s_w.h
index c2d583fcf2fe541e3d309c9bcbb3839218357cbd..8eaeca3d8f2df691203132f0c32d48f5da3cb3c0 100644 (file)
--- a/riscv/insns/cvtu_s_w.h
+++ b/riscv/insns/cvtu_s_w.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = int32_to_float32(FRA);
+FRC = ui32_to_f32(FRA);
 set_fp_exceptions;