[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / div_d.h

diff --git a/riscv/insns/div_d.h b/riscv/insns/div_d.h
index 3b4756337f00e7cba76c24bcdc6caa6d7d71d498..884effcbcef48c10bbdda0b17ad10041ef3a9b31 100644 (file)
--- a/riscv/insns/div_d.h
+++ b/riscv/insns/div_d.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = float64_div(FRA, FRB);
+FRC = f64_div(FRA, FRB);
 set_fp_exceptions;