Upgrade to latest SoftFloat
[riscv-isa-sim.git] / riscv / insns / fdiv_s.h
index cf54c575c1d87e25fa88bccba608adf7932dd45f..66ac48da24a325c8081a8e179398b754236a6fc6 100644 (file)
@@ -1,5 +1,5 @@
 require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f32_div(FRS1, FRS2));
+WRITE_FRD(f32_div(f32(FRS1), f32(FRS2)).v);
 set_fp_exceptions;