Upgrade to latest SoftFloat

[riscv-isa-sim.git] / riscv / insns / fmin_s.h

diff --git a/riscv/insns/fmin_s.h b/riscv/insns/fmin_s.h
index cc673a0cab87f8ad12ff6d0cd05c150475809370..0ebb3a88e65bce3701d1607545c820afe695480d 100644 (file)
--- a/riscv/insns/fmin_s.h
+++ b/riscv/insns/fmin_s.h
@@ -1,5 +1,4 @@
 require_extension('F');
 require_fp;
-WRITE_FRD(isNaNF32UI(FRS2) || f32_lt_quiet(FRS1,FRS2) /* && FRS1 not NaN */
-      ? FRS1 : FRS2);
+WRITE_FRD(isNaNF32UI(FRS2) || f32_lt_quiet(f32(FRS1), f32(FRS2)) ? FRS1 : FRS2);
 set_fp_exceptions;