Upgrade to latest SoftFloat

[riscv-isa-sim.git] / riscv / insns / fmul_d.h

diff --git a/riscv/insns/fmul_d.h b/riscv/insns/fmul_d.h
index d74c316b679589609b246e463822c1bb021ab16f..04e74025781ae817d2127174af23c16eaf25141f 100644 (file)
--- a/riscv/insns/fmul_d.h
+++ b/riscv/insns/fmul_d.h
@@ -1,5 +1,5 @@
 require_extension('D');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f64_mulAdd(FRS1, FRS2, (FRS1 ^ FRS2) & (uint64_t)INT64_MIN));
+WRITE_FRD(f64_mul(f64(FRS1), f64(FRS2)).v);
 set_fp_exceptions;