Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / lr_d.h

diff --git a/riscv/insns/lr_d.h b/riscv/insns/lr_d.h
index 5c8eff1090b379896bf995ba441ca67ac123f322..3d2aacee9d2946aaa20f57a8d4f49ab91220fd48 100644 (file)
--- a/riscv/insns/lr_d.h
+++ b/riscv/insns/lr_d.h
@@ -1,2 +1,3 @@
 require_xpr64;
-RD = mmu.load_reserved_int64(RS1);
+p->get_state()->load_reservation = RS1;
+RD = MMU.load_int64(RS1);