Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / slli.h

diff --git a/riscv/insns/slli.h b/riscv/insns/slli.h
index bfaf4307df06497c9ed10b455f4cc8398772c031..151d97023f8be409106d7679606ec87efbd9eb5b 100644 (file)
--- a/riscv/insns/slli.h
+++ b/riscv/insns/slli.h
@@ -3,6 +3,6 @@ if(xpr64)
 else
 {
   if(SHAMT & 0x20)
-    throw trap_illegal_instruction;
+    throw trap_illegal_instruction();
   RD = sext32(RS1 << SHAMT);
 }