Use fence.i in Debug ROM.

[riscv-isa-sim.git] / riscv / mmu.h

diff --git a/riscv/mmu.h b/riscv/mmu.h
index 8fe3043bb77d4bcafe3a289983c7b6c6a4a7f9b6..a87b6af30480ec5d51ddea728bf9d83f1fc76253 100644 (file)
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -117,7 +117,6 @@ public:
       entry->tag = -1;
       tracer.trace(paddr, length, FETCH);
     }
-    entry->tag = -1;    // TODO: this is hack to work around Debug RAM code being cached
     return entry;
   }