[sim,pk] reorganized status register

[riscv-isa-sim.git] / riscv / trap.h

diff --git a/riscv/trap.h b/riscv/trap.h
index 61b44360f6cb139828be09152d28ee0fecf593e6..a5c32125fcbe130d80ba6df8f79736fb1b0f13ea 100644 (file)
--- a/riscv/trap.h
+++ b/riscv/trap.h
@@ -13,7 +13,7 @@
   DECLARE_TRAP(data_address_misaligned), \
   DECLARE_TRAP(load_access_fault), \
   DECLARE_TRAP(store_access_fault), \
-  DECLARE_TRAP(reserved1), \
+  DECLARE_TRAP(trap_vector_disabled), \
   DECLARE_TRAP(reserved2), \
   DECLARE_TRAP(reserved3), \
   DECLARE_TRAP(reserved4), \