Use new NaN discipline

[riscv-isa-sim.git] / softfloat / f64_to_i32.c

diff --git a/softfloat/f64_to_i32.c b/softfloat/f64_to_i32.c
index 8259ee2854247546a5917291b3f88e0709727c73..0778a8616775bca0fe0238fb039287c69a0aba89 100755 (executable)
--- a/softfloat/f64_to_i32.c
+++ b/softfloat/f64_to_i32.c
@@ -20,6 +20,7 @@ int_fast32_t f64_to_i32( float64_t a, int_fast8_t roundingMode, bool exact )
     sign = signF64UI( uiA );\r
     exp = expF64UI( uiA );\r
     sig = fracF64UI( uiA );\r
+    if ( ( exp == 0x7FF ) && sig ) sign = 0;\r
     if ( exp ) sig |= UINT64_C( 0x0010000000000000 );\r
     shiftCount = 0x42C - exp;\r
     if ( 0 < shiftCount ) sig = softfloat_shift64RightJam( sig, shiftCount );\r