Use new NaN discipline
[riscv-isa-sim.git] / softfloat / f64_to_i64.c
index 0e6ddcde58d4d063ce30f7b8b5ff9bb72bf2e165..676e944dd6ceb48ada3d224be07ea9281db25976 100755 (executable)
@@ -28,6 +28,8 @@ int_fast64_t f64_to_i64( float64_t a, int_fast8_t roundingMode, bool exact )
             softfloat_raiseFlags( softfloat_flag_invalid );\r
             return\r
                 ! sign\r
+                    || ( ( exp == 0x7FF )\r
+                             && fracF64UI( uiA ) )\r
                     ? INT64_C( 0x7FFFFFFFFFFFFFFF )\r
                     : - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r
         }\r