move flexible ports fn to MultiOutControlBase

[ieee754fpu.git] / src / add / nmigen_add_experiment.py

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index 54b69f83683b35ed01df0e0ddbed10088772b783..62880a41a34997e437155e52e54e617d0c7d4fa9 100644 (file)
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -1897,14 +1897,6 @@ class FPADDMuxOutPipe(CombMuxOutPipe):
         stage = PassThroughStage(iospec)
         CombMuxOutPipe.__init__(self, stage, n_len=self.num_rows)
 
-    def ports(self):
-        res = [self.p.i_valid, self.p.o_ready] + \
-                self.p.i_data.ports()
-        for i in range(len(self.n)):
-            res += [self.n[i].i_ready, self.n[i].o_valid] + \
-                    self.n[i].o_data.ports()
-        return res
-
 
 class FPADDMuxInOut:
     """ Reservation-Station version of FPADD pipeline.